Unidirectional Ring Ethernet and Media Access Controller … · Unidirectional Ring Ethernet and...

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, VOL.17, NO.5, OCTOBER, 2017 ISSN(Print) 1598-1657 https://doi.org/10.5573/JSTS.2017.17.5.697 ISSN(Online) 2233-4866

Manuscript received Apr. 24, 2017; accepted Aug. 14, 2017 Electrical Engineering, Korea Advanced Institute of Science and Technology(KAIST), Daejeon, 34141, Korea E-mail : [email protected]

Unidirectional Ring Ethernet and Media Access Controller with Automatic Relaying for

Low-complexity In-vehicle Control Network

Injae Yoo, Jihyuck Jo, Youngjin Ju, and In-Cheol Park

Abstract—This paper proposes an Ethernet-based in-vehicle control network and its hardware realization. Since modern premium-class vehicles contain nearly a hundred electronic control units (ECUs), multiple control networks needed for the ECUs become considerably complex. In order to reduce the network complexity, the proposed network connects the ECUs by employing an Ethernet-based unidirectional ring topology. In addition, a new Ethernet media access controller (MAC) is proposed to automatically relay mismatched frames. As a result, the proposed ring network can be constructed without any switching device. A hardware platform employing the proposed MAC as a network controller is implemented on a field programmable gate array to evaluate the realistic performance of the proposed network. Experimental results show that the proposed MAC increases the communication speed by 123%. Moreover, the performance of the proposed network with a large number of ECU nodes is evaluated using the OMNET++ simulation tool, which shows that the proposed network provides the ECUs with much higher communication speed than the conventional CAN and FlexRay do. Index Terms—Electronic control unit, Ethernet, in-vehicle control network, network controller, ring network

I. INTRODUCTION

The number of electronic control units (ECUs) in a vehicle is increasing rapidly according to the demand for safer, eco-friendly automobiles. For instance, it is common to have almost a hundred ECUs in a modern luxury car. Since the ECUs communicate with each other by using several types of in-vehicle networks, multiple networks are interconnected by expensive switching devices and gateways [1, 2].

Currently, local interconnect network (LIN), controller area network (CAN), and FlexRay are in wide use for the in-vehicle control network [3-6]. The LIN is mainly used for low-speed body control systems such as electric windows and central locking because of its limited bandwidth of 20 Kbps. On the other hand, the CAN and FlexRay are used to implement driving functionalities such as powertrain and chassis control systems, as they support 1 Mbps and 10 Mbps, respectively. However, the maximum number of ECU nodes which can be connected in a CAN network is limited by 16 and that in a FlexRay network by 64. As a result, multiple networks are widely employed, and the nodes are clustered into separate groups depending on their functions and performances required [1].

To reduce the network complexity, this paper proposes a unidirectional ring Ethernet as a promising in-vehicle control network [7]. Exploiting the high bandwidth of Fast Ethernet, multiple control networks in a vehicle can be combined into an Ethernet-based ring network. Constructing the unified ring network enables ECU nodes to be connected based on their locations, reducing

698 INJAE YOO et al : UNIDIRECTIONAL RING ETHERNET AND MEDIA ACCESS CONTROLLER WITH AUTOMATIC RELAYING …

the wiring cost and eliminating gateways compared to the conventional approach. In addition, a new media access controller is proposed to construct the proposed network without any additional switching device, which is called an Ethernet media access controller associated with automatic relaying (MAC-AR). By employing the proposed MAC-AR as a network controller, each ECU node can operate as a relaying device. A hardware platform including the MAC-AR is designed and implemented on a field programmable gate array (FPGA) board to measure the realistic performance of the unidirectional ring Ethernet. Experiment results show that the proposed MAC-AR improves the network performance by 123%. More precisely, the maximum effective throughput of the proposed network consisting of three ECU nodes is above 15 Mbps. To investigate the performance for a large number of nodes, moreover, the proposed ring network is simulated using the OMNET++ simulation tool and the INET framework [8, 9], which reveals that the proposed network is sufficient to connect more than 100 ECUs.

II. BACKGROUND

Ethernet has been considered as an in-vehicle network for diagnosis and infotainment in a number of previous works [1, 2, 10]. Since the original Ethernet is a best-effort network, the previous works have focused on finding a way to meet real-time constraints. For instance, the performances of IEEE 802.1 audio/video bridging (AVB) and Time-Triggered Ethernet (TTEthernet) were analyzed in the view point of in-vehicle networks [1]. On the other hand, the performance of switched Ethernet was evaluated as an automotive network with adopting a prioritization scheme for media access control (MAC) [10]. The proposed method is different from the previous ones, since Ethernet is considered as an alternative in-vehicle control network to replace CAN and FlexRay control networks.

1. Existing In-vehicle Control Networks

In the CAN network, ECU nodes connected by a

shared bus can communicate at a maximum bandwidth of 1 Mbps, while the FlexRay protocol provides a higher data rate of up to 10 Mbps both in the bus and star

topologies. In addition, the maximum length of a CAN message is restricted to 8 bytes, and that of a FlexRay message to 254 bytes. Meanwhile, the CAN with flexible data rate (CAN FD) standard has been recently specified in which the bit rate of existing CAN is increased 8 times and the message length is increased to 64 bytes [11].

A main feature of the CAN and CAN FD protocols is avoiding collision in real time, which is called carrier sense multiple access with bitwise arbitration (CSMA/BA). Since CAN and CAN FD messages are prioritized by their identifier numbers, there is a possibility of starvation for low-priority nodes. In other words, a message coming from a high-priority node always dominates the bus whenever a collision happens on the bus.

On the other hand, the FlexRay protocol supports both time-triggered and event-triggered communications to remove the possibility of starvation. In the time-triggered phase, all ECU nodes share the bandwidth in a manner of time division multiple access (TDMA), thus each node can transmit at a specific time slot allocated to the node. Note that this approach reduces the bandwidth in effect because some nodes may have no data to be transmitted at their time slots. Therefore, the event-triggered phase is included to compensate for the loss. In the phase, messages remaining at a node are sent. As the FlexRay network needs to have a global synchronization method for TDMA and manage two different phases, it is associated with high complexity.

A number of previous works in the literature have dealt with the CAN and FlexRay networks. For example, [12] proposed a security protocol for the CAN network. Meanwhile, message scheduling methods for the time-triggered CAN and FlexRay networks were presented in [13-15]. Recently, an extensible FlexRay communication controller was proposed and implemented on a FPGA device [16].

2. Industrial Ethernet Networks

Meanwhile, variations of Ethernet called industrial

Ethernet have widely been used in industry to pursue decisive, real-time communication, which are different from the standard one in that master nodes are segregated from slave nodes.

For example, Ethernet Powerlink has an extended

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, VOL.17, NO.5, OCTOBER, 2017 699

data-link layer in order to provide an additional network scheduling mechanism [17]. Similar to the FlexRay protocol, the schedule is divided into an isochronous phase and an asynchronous phase. Ethernet Powerlink can be used in any topology, but all the topologies except the 1-to-1 connection require additional hub devices. Especially, if the nodes are connected in a ring, every slave node must employ a three-port hub device that has at least two Ethernet physical link controller (PHY) modules.

In addition, PROFINET IRT has the periodic cycle time divided into synchronous and asynchronous parts, which is similar to Ethernet Powerlink [18]. Also, in order to implement the PROFINET IRT bus, special hardware is required for both master and slave nodes.

On the other hand, EtherCAT divides an Ethernet frame into small segments that are then allocated to slave nodes one by one in order to utilize the bandwidth efficiently [19]. However, every slave node in an EtherCAT network needs an EtherCAT slave controller (ESC) consisting of a data-link layer processing unit and two PHY modules regardless of the topology.

As in-vehicle networks are more sensitive to cost and weight than factory applications, we propose a unidirectional ring Ethernet, which requires only one PHY module in each ECU and reduces a significant amount of cables. Though the industrial Ethernet supports ring networks, the proposed network is specially designed to lower cost and weight. Note that this paper proposes a low-cost framework, and sophisticated protocols can be implemented on top of the proposed framework.

III. PROPOSED UNIDIRECTIONAL RING

ETHERNET

Since the conventional star topology employed in common Ethernet networks is excessive for in-vehicle control applications, a unidirectional ring Ethernet is proposed in this paper. The overall structure of the proposed network is depicted in Fig. 1, where each ECU node has the standard Ethernet interface consisting of a PHY and a MAC module. The PHY module converts the digital data provided by the MAC into electrical signals adequate for the Ethernet media and vice versa. A main function of the MAC module is to validate frames

received from the PHY module, which is conducted by testing the cyclic redundancy check (CRC) code as well as matching the destination MAC address included in the frame. To realize the proposed ring network, however, two modifications are required.

First, the connections between the PHY module and network cables should be modified. The most popular cable used for Fast Ethernet, which is called Category 5 enhanced (CAT5e), consists of four twisted pairs of copper wires. However, only two of them, a transmission pair and a reception pair, are used to achieve a full-duplex 100 Mbps connection, where each twisted pair is used for differential signaling. Therefore, there are 4 pin contacts between a cable and a PHY module: TX+, TX-, RX+, and RX-. To construct the proposed unidirectional ring network, the transmission and reception twisted pairs must be split into two cables and connected such that the reception pair is linked to the nearest node in the counterclockwise direction and the transmission pair to the nearest node in the clockwise direction as shown in Fig. 1.

Second, the received frames whose destination addresses are not matched with the address of the MAC module must be forwarded to the next node. In other words, every node should operate as a relaying device. This relaying function is usually implemented in software running on the host processor, inducing a significant delay because the processor is interrupted by every frame received. To automatically relay mismatched frames without the processor’s intervention, a new media access controller, which is called an MAC-AR, is proposed in the next section. In Fig. 1, the concept of automatic relaying is depicted by the dashed arrow and

Fig. 1. The proposed unidirectional ring Ethernet network.


the solid arrow headed for the host processor represents a matched frame.

The most important advantage of the proposed network is that it can implement a simple ring topology that can save wiring costs without any switching devices. Given the performance superior to the existing CAN and FlexRay networks, moreover, the proposed ring network could be used to support several existing networks, achieving a remarkable cost reduction. The realistic performance of the proposed network is explained in detail in Section V.

Another advantage is that it is fully compatible to the conventional Ethernet. As explained above, the proposed network can be constructed by modifying the wiring and adding the automatic-relaying function to the MAC module. As the upper layers running on the host processor have nothing to do with these changes, the software stack including the Internet protocol (IP) and QoS-related protocols can be easily ported to the proposed network.

IV. PROPOSED MEDIA ACCESS CONTROLLER

WITH AUTOMATIC RELAYING

To realize the proposed network efficiently, we suggest a new Ethernet MAC hardware which automatically relays mismatched frames. Constructing the proposed network with the conventional MAC hardware requires additional switching devices or software modification to forward mismatched frames. These changes would lower the network performance or increase the overall cost.

1. Architecture

The overall architecture of the proposed MAC-AR,

which is depicted in Fig. 2, has two host interfaces and a media-independent interface (MII). The first host interface is to configure various MAC functions, and the second one to access Ethernet frame buffers implemented with a SRAM module. In addition, a commercial Ethernet PHY chip is connected through the MII.

The proposed hardware consists of five major components: a MII management unit, transmission (Tx) and reception (Rx) units, frame buffers, and a central control unit (CCU). The MII management unit

configures the internal registers of the external PHY chip according to the commands delivered from the host processor. Once the PHY chip is ready to communicate with other network nodes, Ethernet frames are transmitted and received through the Tx and Rx units.

The transmission procedure consists of three steps. First, the host processor stores a message to be transmitted to another ECU platform into a frame buffer. Second, the processor writes the corresponding commands into the registers of the CCU. According to the order given by the CCU, finally, the Tx unit constructs an Ethernet frame including the message loaded from the frame buffer and transmits the frame to the PHY chip. When the Tx unit accesses the frame buffer to fetch the message, the address of the message is managed by the CCU as depicted in Fig. 3(a).

Meanwhile, the Rx unit parses an incoming frame and stores its payload in a frame buffer. The processor informs the CCU of empty frame buffers that can be used to store newly received messages. While receiving a frame, the empty buffers are managed by the CCU as shown in Fig. 3(a). For example, the CCU records the address of a recently received payload, which is illustrated with the thin gray arrow in Fig. 3(a). After storing the payload, the Rx unit checks whether the destination MAC address of the frame is matched with the address of itself or not, and reports the result to the CCU. For a matched frame, the CCU generates an interrupt to the host processor to make the processor read the received message from the frame buffer. Once the processor accesses the buffer, the CCU reuses the location by changing it to an empty buffer.

The conventional MAC module either disregards

Fig. 2. The proposed Ethernet media access controller with automatic relaying.


mismatched frames or reports to the host processor as in the case of matched frames, degrading the overall performance. However, the proposed MAC-AR transmits mismatched frames to the PHY chip without invoking interrupts to the host processor. As shown in Fig. 3(b), the CCU manipulates the address managers to forward the payload of a mismatched frame as soon as possible. As a result, the mismatched payload becomes a transmission frame associated with the highest priority, and is immediately transmitted in order not to affect the workload of the host processor. After the relaying operation, the CCU regards the corresponding buffer as an empty one to be used to store a new incoming frame. When a mismatched frame is received, all the information needed for the relaying operation is captured in the CCU. Therefore, the time required for the relaying operation is negligible, except for the actual time of transmitting the mismatched frame to the PHY chip. In addition, the relaying operation is not preemptive. This means that normal transmissions that are already being performed are not interrupted by newly arriving mismatched frames. However, once a mismatched frame is received, a normal transmission frame must wait until the relaying operation is finished.

2. Implementation Results Table 1 summarizes the synthesis result of the

proposed MAC-AR along with various commercial network controllers. The proposed architecture synthesized in 0.13 μm CMOS technology operates at an operating frequency of 180 MHz, and it is implemented with 11.7k equivalent gates.

The proposed MAC-AR has almost the same complexity as other conventional 100 Mbps Ethernet MACs [20, 21]. On the other hand, commercial FlexRay and CAN controllers provide much lower throughput, but are much more complex than the proposed architecture [22-24]. Note that the CAN controller presented in [25] has lower complexity than that of the proposed one, but its throughput is 100 times slower.

V. NETWORK PERFORMANCE EVALUATION

USING HARDWARE PLATFORMS

1. Performance Evaluation Platform To evaluate the practical performance of the proposed

network, a hardware platform was implemented by employing a network controller designed based on the proposed MAC-AR. As presented in Fig. 4, the evaluation platform consists of a 32-bit RISC processor, a high-performance system bus, a peripheral bus, and several peripheral controllers including the proposed MAC-AR.

In addition, FreeRTOS, an open-source real-time operating system [26], was ported to the evaluation platform. An application is specially programmed to evaluate the network performance. The application is first stored in the NAND flash memory, and then loaded

(a)

(b)

Fig. 3. Frame buffer address management in (a) a normal situation, (b) a relaying situation.

Table 1. Comparison of network controller implementations

Controller Type Vendor Throughput Equivalent Gate Count

Proposed MAC-AR - 100 Mbps 11.7k a

Ethernet MAC [20] Mentor Graphics 100 Mbps 11.0k

Ethernet MAC [21] NEC 100 Mbps 11.0k FlexRay [22] Bosch 10 Mbps 110.0k FlexRay [23] Silvaco 10 Mbps 76.7k CAN-FD [24] Bosch 8 Mbps 31.0k

CAN [25] Silvaco 1 Mbps 5.5k a SRAM frame buffers are excluded.


into the system memory during the initialization phase. After the platform boots up, the application runs by fetching instructions from the system memory. As explained in the previous section, the processor configures the Ethernet PHY chip as well as the MAC-AR unit. Then, the platform can communicate with other ones through the proposed network. If a valid Ethernet frame is received, the MAC-AR generates an interrupt to be transferred to the processor through the interrupt controller. As FreeRTOS equips with powerful application programming interfaces (APIs) that can be used to handle interrupts and measure the processing time, it is possible to measure the network performance elaborately.

2. Performance Evaluation Results

A number of experiments have been conducted by

implementing the evaluation platform on an Altera Cyclone IV FPGA device. In particular, the external Ethernet PHY module is realized with a Marvell 88E1111 Ethernet transceiver chip, and three FPGA boards are used to emulate three ECU nodes connected in a ring network. The three ECU nodes are connected to the proposed unidirectional ring Ethernet by modifying the CAT5e cable as explained in Section III. The experiment environment is shown in Fig. 5.

All the three platforms execute the same FreeRTOS application that performs two tasks simultaneously. One

of the tasks transmits Ethernet frames periodically, while the other task verifies received frames and measures elapsed time. Note that two possible destinations of a transmission frame in node i are node (i+1) mod 3 and (i+2) mod 3, and 1 hop and 2 hops away, respectively. Two experiments have been conducted by setting destinations differently. First, the distance is fixed to 2 hops. For example, the destinations of all the frames transmitted from node 0 are always node 2. Meanwhile, the case of 1-hop communication is tested in the second experiment.

In all the experiments, the length of a frame is fixed to 72 bytes, as short messages are used in the conventional in-vehicle control networks [27]. The total elapsed time to transmit 256 frames in a node is measured with respect to various frame transmission periods. Note that an incoming frame can be dropped if the CCU in the MAC-AR block has no empty buffer to store the incoming frame. In the evaluation platform, the MAC-AR block is configured to have 3 frame buffers. Taking the ratio of successfully received frames to transmitted frames as a criterion, we investigate the best performance associated with no frame drop by decreasing the transmission period gradually. The experiment results are summarized in Table 2.

The effective throughput of a network node is calculated by counting the number of data bits transmitted and received by the host processor of the node for one second. Therefore, mismatched frames that are immediately relayed by the MAC-AR unit are not counted in the throughput calculation. If there is no

Fig. 4. A block diagram of the performance evaluation platform.

Fig. 5. The experiment environment connecting three nodes.


frame drop, the effective throughput of a node is calculated as

256×2(Tx & Rx frames)×72×8(bits) / elapsed time.

(1) Note that the effective throughput becomes smaller

than (1) if frame drops occur. The maximum effective throughputs of the proposed three-node network are 15.8 Mbps and 20.6 Mbps for the two experiments, which are both obtained by considering zero-drop cases. The measured throughputs are at least 1.5 times faster than the maximum bandwidth of FlexRay and 15 times faster than that of CAN, and the proposed network is based on a low-cost ring topology. Moreover, the maximum effective throughput can be significantly increased by providing more frame buffers.

Similar experiments are conducted to reveal the advantage of the proposed MAC-AR, and the results are compared with those resulting from the conventional method in which the FreeRTOS application forwards the received frame when the MAC address of the destination is not matched with that of the receiving node. The traditional MAC hardware generates an interrupt for each received frame irrespective of the destination. To investigate how the proposed automatic relaying affects the network performance, the 2-hop and 1-hop communications are tested for the conventional method employing the traditional MAC hardware. The experiment results are summarized in Table 3.

In case of 2-hop communication, the shortest transmission periods without frame loss measured using the proposed MAC-AR and the conventional MAC are 73.0 μs and 162.8 μs, respectively. As a result, the

maximum effective throughput of the conventional method is 7.1 Mbps, whereas the proposed MAC-AR improves it to 15.8 Mbps. Since the conventional method increases the workload of the processor by invoking a lot more interrupts than the proposed MAC-AR does, the messages received into the frame buffers cannot be processed as fast as the receiving rate so that some frames can be dropped in the conventional network. In case of 1-hop communication, on the other hand, all incoming frames have correct destination addresses. Therefore, the conventional method has no overhead due to processor interrupts caused by mismatched frames, and the performance of the conventional method is the same as that of the proposed method. In short, the proposed MAC-AR enhances the performance of the unidirectional ring network by 123% when there are frames to be relayed.

The performance of the proposed three-node network is again evaluated for the case that the destination is pseudo-randomly determined, i.e., the destination node is about 1.5-hop distance away from the transmission node. The experiment results are summarized in Table 4. The maximum effective throughput for zero-drop communication is 18.1 Mbps, which is slightly degraded compared to the 1-hop communication.

VI. NETWORK PERFORMANCE EVALUATION

BY SIMULATIONS

To investigate the performance of the proposed network with a large number of nodes, such a situation is configured on the OMNET++ simulation tool and simulated with the INET Framework [8, 9].

Table 2. Performances resulting from the proposed MAC-AR

Transmission Period

Successful Frame Reception Elapsed Time Effective

Throughput Fixed distance of 2 hops

169.5 μs 100.0% 43.4 ms 6.8 Mbps 113.3 μs 100.0% 29.0 ms 10.2 Mbps 73.0 μs 100.0% 18.7 ms 15.8 Mbps 71.7 μs 99.2% 18.2 ms 16.2 Mbps

Fixed distance of 1 hop 119.8 μs 100.0% 30.7 ms 9.6 Mbps 83.3 μs 100.0% 21.3 ms 13.8 Mbps 56.0 μs 100.0% 14.3 ms 20.6 Mbps 44.5 μs 99.5% 11.3 ms 25.9 Mbps

Table 3. Performances resulting from the conventional MAC

Transmission Period

Successful Frame Reception Elapsed Time Effective

Throughput Fixed distance of 2 hops

270.8 μs 100.0% 69.3 ms 4.3 Mbps 206.3 μs 100.0% 52.8 ms 5.6 Mbps 162.8 μs 100.0% 41.7 ms 7.1 Mbps 115.0 μs 96.0% 28.3 ms 10.4 Mbps

Fixed distance of 1 hop 119.8 μs 100.0% 29.5 ms 10.0 Mbps 83.3 μs 100.0% 21.7 ms 13.6 Mbps 56.0 μs 100.0% 13.4 ms 22.0 Mbps 44.5 μs 97.4% 11.1 ms 25.9 Mbps


1. Simulation Model A simulation model for the OMNET++ tool is

developed in network description (NED) and C++ languages. The connections between components in a network are described in NED, while the behavior of each component is programmed in C++ [8].

The INET framework provides a simple Ethernet-node model consisting of a host application module and a 100 Mbps full-duplex MAC module. However, the standard Ethernet modules should be modified to construct the proposed unidirectional ring network. First, a simulation model for the proposed MAC-AR is designed by modifying the C++ source code describing the conventional MAC module. A received frame whose destination MAC address is not matched with the address of the MAC module is changed to a transmission frame to be immediately sent out. Second, the C++ source code describing the host application module is modified to select the destination pseudo-randomly, whereas the original one transmits a frame to a fixed destination. As the number of network nodes is given as a parameter, the application module of a node can decide a destination among the nodes except the node itself. Lastly, the interface of the Ethernet node model is modified to have two split ports for transmission and reception, which is achieved by revising the corresponding NED file.

The length of a frame is fixed to 72 bytes like in the previous experiments performed for the hardware platform, and the length of a cable connecting two nodes is configured to 24 m, the maximum length specified in FlexRay. Meanwhile, the MAC-AR model is configured

to have sufficient frame buffers in order not to lose any frame.

2. Simulation Results

The performance of the proposed network is estimated

in simulations by varying the number of ECU nodes. The destination of a frame is pseudo-randomly chosen as stated in the previous subsection. As the destination of an ECU node is usually predetermined according to the applications, the performance may be enhanced in practice. The total number of frames received by all the application modules in the network is measured to calculate the effective throughput that is defined as

(The number of Rx frames) × 2 / (The number of ECU nodes) × 72(bytes) × 8(bits) / simulation time. (2) The simulation results are summarized in Table 5. After the simulation is terminated, there are some

transmitted frames that do not arrive in their destination and remain in frame buffers. Such frames decrease the effective throughput as shaded in Table 5, but the remaining frames eventually arrive in their destinations if the number of frame buffers is sufficiently large.

The effective throughput measured in the simulation is visualized in Fig. 6. The transmission rate in the horizontal axis represents the reciprocal of the transmission period. The performance of the three-node network constructed by FPGA devices, which is summarized in Table 4, is illustrated with the dashed line in the figure. Note that the performances of the three-node network evaluated by the hardware platform and in the simulations are similar to each other.

3. Discussion

As shown in Fig. 6, the effective throughput decreases

as the number of ECU nodes connected in the network increases. If the frame transmission rate is slower than 400 Hz, however, all the cases show the same performance. Note that more than 52% and 82% ECUs connected in the CAN and FlexRay networks transmit frames at the rates ranging from 10 to 100 Hz [27]. Therefore, the result reveals that the performance of the proposed network is high enough for in-vehicle control

Table 4. Performances resulting from the proposed MAC-AR that selects the destination pseudo-randomly

Transmission Period

Transmission Rate a

Successful Frame

Reception Elapsed Time Effective

Throughput

10 ms 100 Hz 100.0% 1638.4 ms 180 Kbps 5 ms 200 Hz 100.0% 1016.9 ms 290 Kbps

2.5 ms 400 Hz 100.0% 567.1 ms 520 Kbps 1.25 ms 800 Hz 100.0% 347.0 ms 850 Kbps 625.0 μs 1.6 KHz 100.0% 165.7 ms 1.78 Mbps 312.5 μs 3.2 KHz 100.0% 77.6 ms 3.80 Mbps 156.25 μs 6.4 KHz 100.0% 40.7 ms 7.25 Mbps 64.4 μs 15.5 KHz 100.0% 16.3 ms 18.1 Mbps 51.9 μs 19.3 KHz 97.9% 13.0 ms 22.2 Mbps

a (transmission period)-1


applications, and applicable to the case of 128 ECU nodes.

In case of high transmission rates, the proposed network provides the ECUs with much higher communication speed than the conventional networks do. For example, the effective throughput exceeds 1.5 Mbps when 64 ECU nodes are connected. In the time-triggered phase of FlexRay, all ECU nodes share the 10 Mbps bandwidth in a manner of TDMA. Therefore, the effective throughput of a low-priority FlexRay node is in

general degraded by a factor proportional to the number of nodes. The proposed network improves the worst-case performance of FlexRay by almost 5 times, since the effective throughput of a 64-node FlexRay network is 313 Kbps(=10 Mbps/64×2) in the time-triggered phase. Similarly, as only one node is permitted to transmit at a time in the CAN network, the effective throughput of a CAN node is much less than the network bandwidth, 1 Mbps. On the other hand, the CAN FD technology provides up to 8 times higher bandwidth for each node connected to the network than the conventional CAN, but since it uses the same communication protocols as the CAN, the effective throughput of the CAN FD is also much less than the proposed network.

In addition, Table 6 compares the performance of the proposed network with the two industrial Ethernet networks, EtherCAT and PROFINET IRT [18, 19]. The effective throughput of each industrial Ethernet is calculated by estimating the minimum achievable cycle time according to the number of nodes connected to the network. For the cycle time estimation, practical formulas presented in [28] are used and a line topology that is widely used for both networks is assumed. Also, the frame size is assumed to be 72 bytes, as in the proposed network. On the other hand, the performance of the proposed network shown in Table 6 is the maximum effective throughput with no frame drop. In addition, the

Table 5. Network performance estimated in simulations

The Number of Received Frames Simulation Time

Transmission Period

Transmission Rate 3 ECU Nodes 16 ECU Nodes 32 ECU Nodes 64 ECU Nodes 128 ECU Nodes

300 (100%) a 1600 (100%) 3200 (100%) 6400 (100%) 12800 (100%) 1 s 10 ms 100 Hz

115 Kbps 115 Kbps 115 Kbps 115 Kbps 115 Kbps 300 (100%) 1600 (100%) 3200 (100%) 6400 (100%) 12759 (99.7%)

0.5 s 5 ms 200 Hz 230 Kbps 230 Kbps 230 Kbps 230 Kbps 230 Kbps

300 (100%) 1600 (100%) 3200 (100%) 6400 (100%) 12676 (99.0%) 0.25 s 2.5 ms 400 Hz

461 Kbps 461 Kbps 461 Kbps 461 Kbps 456 Kbps 600 (100%) 3200 (100%) 6400 (100%) 12773 (99.8%) 13543 (52.9%)

0.25 s 1.25 ms 800 Hz 922 Kbps 922 Kbps 922 Kbps 920 Kbps 488 Kbps

480 (100%) 2560 (100%) 5120 (100%) 8825 (86.2%) 5582 (27.3%) 0.1 s 625.0 μs 1.6 KHz

1.84 Mbps 1.84 Mbps 1.84 Mbps 1.59 Mbps 502 Kbps 960 (100%) 5120 (100%) 10216 (99.8%) 8303 (40.5%) 6182 (15.1%)

0.1 s 312.5 μs 3.2 KHz 3.69 Mbps 3.69 Mbps 3.68 Mbps 1.50 Mbps 556 Kbps

1920 (100%) 10239 (100%) 12198 (59.6%) 8400 (20.5%) 7173 (8.76%) 0.1 s 156.25 μs 6.4 KHz

7.37 Mbps 7.37 Mbps 4.39 Mbps 1.51 Mbps 646 Kbps 4659 (100%) 15469 (62.3%) 11028 (22.2%) 9179 (9.24%) 8700 (4.38%)

0.1 s 64.4 μs 15.5 KHz 17.9 Mbps 11.1 Mbps 3.97 Mbps 1.65 Mbps 783 Kbps

a The number of frames received by all host application modules during the simulation time (The ratio of received frames to total transmitted frames).

Fig. 6. Effective throughput of the proposed unidirectional ring network with respect to frame transmission rate.


effective throughput presented in parentheses is the maximum when successful frame reception is greater than 90%.

In Table 6, the performance of the proposed network and the two industrial Ethernet networks are almost the same. However, the performance of EtherCAT and PROFINET IRT is estimated assuming an ideal case where one master node communicates with slave nodes in a fixed order every cycle. On the other hand, it should be noted that the performance of the proposed work is measured by simulating the worst case where each node selects one of the remaining nodes pseudo-randomly and transmits the frame every cycle. In addition, since the performance of the proposed network is measured assuming a small frame buffer capable of storing only three received frames per node, the performance can be greatly improved by employing a practical-sized buffer.

In conclusion, the proposed unidirectional ring network that can be constructed with a low-cost ring topology can connect more than 100 ECUs without any performance degradation when the transmission rate is low, and provides superior performance to the conventional networks when the transmission rate is high. Therefore, multiple conventional control networks including CAN and FlexRay can be integrated into a single Ethernet network, which can reduce the cost dramatically by eliminating the switching devices and gateways compared to the conventional approach. However, the proposed network is vulnerable to disconnection due to the ring topology. The drawback can be solved by applying other complementary methods.

For example, a switching device can be used to build an emergency channel between safety-critical ECUs. Since the proposed network with the MAC-AR provides high performance with very low complexity, a considerable advantage is still expected even if the complementary method is added.

VII. CONCLUSIONS

This paper has proposed a low-complexity in-vehicle control network based on unidirectional ring Ethernet, which can be a promising alternative to the conventional CAN and FlexRay networks. The proposed network connects ECUs in the form of unidirectional ring without any switching device. To enhance the performance of the proposed network, a new MAC block that relays mismatched frames automatically has been presented. By employing the block, a performance evaluation platform was realized on a FPGA board. The practical performance of the proposed network was evaluated after porting a real-time operating system to the evaluation board. The experiment proves that the proposed automatic relaying is significantly effective in enhancing the network performance. Compared to the conventional method that invokes an interrupt for every received frame, the automatic relaying improves the network performance by 123%. Furthermore, the performance of the proposed network with a large number of nodes was estimated by conducting intensive simulations. Simulation results show that the performance of the proposed network is superior to those of the conventional networks, and high enough to support more than 100 ECUs in a single ring network.

ACKNOWLEDGMENTS

This work was supported by the Center for Integrated Smart Sensors funded by the Ministry of Science, ICT & Future Planning as Global Frontier Project (CISS-2011-0031860).

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Table 6. Performance comparison of Ethernet-based networks

Proposed

Unidirectional Ring Ethernet

EtherCAT b [19] PROFINET IRT c [18]

Test Scenario

Pseudo-randomly chosen destinations

Fixed scheduling of one master and multiple slave nodes

3 Nodes 17.9 Mbps 25.3 Mbps 15.0 Mbps 16 Nodes 7.4 Mbps 4.8 Mbps 3.6 Mbps

32 Nodes 1.8 Mbps (3.7 Mbps a) 2.4 Mbps 1.9 Mbps



a When the ratio of successful frame reception ≥ 99.0% b Effective throughput = (Minimum achievable cycle time)-1 × the EtherCAT telegram size allocated to each slave node c Effective throughput = (Minimum achievable cycle time)-1 × the PROFINET IRT packet size


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Injae Yoo received the B.S. and M.S. degrees in electrical engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, in 2011 and 2013, respectively, where he is currently working toward the Ph.D. degree in

the School of Electrical Engineering, KAIST. His current research interests include the algorithms and architectures for error-correcting circuits, and the automotive electronics.

Jihyuck Jo received the B.S. and M.S. degree in electrical engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, in 2012 and 2014, respectively, where he is currently working toward the Ph.D. degree. His

current research interests include algorithms and architectures for vision systems, general-purpose microprocessors, and in-vehicle networks.

Youngjin Ju received the B.S. degree in electrical engineering from Sogang University, Seoul, Korea, in 2015. He is currently working toward the M.S. degree in the School of Electrical Engineering from Korea Advanced Institute of Science and

Technology (KAIST), Daejeon, Korea. His current research interests include VLSI design for multimedia applications.

In-Cheol Park received the B.S. degree in electronic engineering from Seoul National University, Seoul, Korea, in 1986, and the M.S. and Ph.D. degrees in electrical engineering from the Korea Advanced Institute of Science and Technology

(KAIST), Daejeon, Korea, in 1988 and 1992, respectively. Since June 1996, he has been an Assistant Professor and is currently a Professor with the School of Electrical Engineering, KAIST. Prior to joining KAIST, he was with the IBM T. J. Watson Research Center, Yorktown, NY, USA, from May 1995 to May 1996. His current research interests include computer-aided design algorithms for high-level synthesis and very large scale integration architectures for general-purpose microprocessors.

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