The Basic Organization of Computers
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Transcript of The Basic Organization of Computers
based on stored program design
processor system CPU memory
input/output system input/output
devices secondary storage
Electronic Digital Computers
manages the instruction-execution cycle FETCH – DECODE – EXECUTE coordinates the activities of other devices
Central Processing Unit
memoryaddressregister
instructionregister
memorydataregister
programcounter
arithmeticlogic unit
Inside the CPU
memoryaddressregister
instructionregister
memorydataregister
programcounter
accumulator(workregister)
arithmeticlogic unit
Inside the CPU
memoryaddressregister
instructionregister
memorydataregister
programcounter
accumulator(workregister)
arithmeticlogic unitsystem
clock
Inside the CPU
1. address of thenext instruction istransferred fromPC to MAR
2. the instruction islocated in memory
FETCH the instruction
control unitsends signalsto appropriatedevices to causeexecution of theinstruction
EXECUTE the instruction
Data Movement Operations moving data from memory to the CPU moving data from memory to memory input and output
Arithmetic and Logical Operations integer arithmetic comparing two quantities shifting, rotating bits in a quantity testing, comparing, and converting bits
Types of Processor Operations
Program Control starting a program halting a program skipping to other instructions testing data to decide whether to skip over
some instructions
Types of Processor Operations
PROCESSOR REGISTERS
A processor has many registers to hold instructions, addresses, data, etc
The processor has a register, the Program Counter (PC) that holds the memory address of the next instruction to get
Since the memory in the Basic Computer only has 4096 locations, the PC only needs 12 bits
In a direct or indirect addressing, the processor needs to keep track of what locations in memory it is addressing: The Address Register (AR) is used for this
The AR is a 12 bit register in the Basic Computer
PROCESSOR REGISTERS When an operand is found, using either direct
or indirect addressing, it is placed in the Data Register (DR). The processor then uses this value as data for its operation
The Basic Computer has a single general purpose register – the Accumulator (AC)
PROCESSOR REGISTERS
The significance of a general purpose register is that it can be referred to in instructions
e.g. load AC with the contents of a specific memory location; store the contents of AC into a specified memory location
Often a processor will need a scratch register to store intermediate results or other temporary data; in the Basic Computer this is the Temporary Register (TR)
PROCESSOR REGISTERS
The Basic Computer uses a very simple model of input/output (I/O) operations
Input devices are considered to send 8 bits of character data to the processor
The processor can send 8 bits of character data to output devices
The Input Register (INPR) holds an 8 bit character gotten from an input device
The Output Register (OUTR) holds an 8 bit character to be send to an output device
PROCESSOR REGISTERS
Registers in the Basic Computer
11 0PC
15 0IR
15 0TR
7 0OUTR
15 0DR
15 0AC
11 0AR
INPR0 7
Memory
4096 x 16
CPU
Machine Cycle
A Machine cycle is a series of operations performed to execute a program instruction.
It consists of two parts:
1) Instruction cycle
2) Execution cycle
Instruction Cycle1) Fetching2) Decoding
During the instruction cycle, the CPU fetches (Gets) a command or data from main memory and decodes it (Determines what it means)
Execution Cycle1) Executing2) Storing
During the execution cycle, the CPU executes the instruction (Performs the Operation on the data), and may store the instruction's result in memory/Register
Processing Speeds There are three ways in which processing speeds
are measured:1) Time to complete one machine cycle in fractions
of a second.2) Time to complete instructions in millions of
instructions per second.3) Time in floating point operations per second.
Factors Affecting Processing Speed Registers – temp memory area – 32 bit Memory and computing power - RAM System clock – Hz – cycles - GHz The bus – the highway The data bus – CPU & devices The address bus – CPU & RAM Cache memory – L1(CPU resident), L2 (External)