Technical ManualXR50series0207

57
Digital AV Control Receiver PAVC Co, Network Business Group Matsushita Electric Ind.Co.,Ltd SA-XR50E/EB/EG ( SA-XR70/XR55 ) Technical Guide

description

Manual Electronico para marca PANASONIC

Transcript of Technical ManualXR50series0207

Page 1: Technical ManualXR50series0207

Digital AV Control Receiver

PAVC Co, Network Business GroupMatsushita Electric Ind.Co.,Ltd

SA-XR50E/EB/EG ( SA-XR70/XR55 )

Technical Guide

Page 2: Technical ManualXR50series0207

2CONTENTS

1. GENERAL DESCRIPTION --- Page 3

2. SUMMARY OF SYSTEM CIRCUIT DIAGRAM --- Page 7

3. SIGNAL INPUT SELECTOR CIRCUIT (AUTOMATIC) --- Page 9

4. DIR/CODEC CIRCUIT, A/D CIRCUIT --- Page 13

5. DSP SIGNAL ENCODE CIRCUIT (THEATER CHANNEL SIGNALS) --- Page 20

6. SYSTEM CONTOROL CIRCUIT (SUB /MAIN MICRO-P) --- Page 25

7. PWM MODULATOR CIRCUIT --- Page 36

8. H-BRIDGE AMPLIFIRE CIRCUIT (D/A FILTER) --- Page 40

9. TROUBLE SHOOTING --- Page 46

10. NEW HDMI INTERFACE INFORMATION --- Page 51

11. ADDITIONAL INFORMATION --- Page 56

Page 3: Technical ManualXR50series0207

31. GENERAL DESCRIPTION1-1. Features A) High sound quality reproduction for all DVD audios, DVD videos, music CD andcompressed source. -1. Full-digital amplifire enabling High sound quality. * Audio signal from digital input through Amplifier output stage is completely digitalized, and is output to speaker output terminal. Source of High sound quality can be faithfully reproduced because worked by sampling frequency up to 192KHz. * In addition, High sound quality created by DVD-Audio can also faithfully reproduced by design intended for High sound quality which convert analogue signal to 192KHz and perform signal processing with 32bit by using 32bit DSP. -2. High speed digital arithmetic processing. * Wide-band reproduction without frequency dependence in enabled by means of digital arithmetic processing which processes digital signal by high speed in 98MHz. * S/N ratio at ordinary sound level is improved by VGDA (variable gain digital amplifier) technology. By this clear and higher faithfule sound approaching original sound can be reproduced. -3. High effeciency * Digital amplifier can suppress extra heat loss (energy efficiency 90% or more), and effeciently convert input signal to audio energy. * By this, Amplifier with a little generation of heat/electricity consumption in which the result and the earth environment are considered has been achieved. -4. Wide pwer bandwidth with 88kHz reproduction. * Wide power bandwidth equal to that of hight class analogue amplifier and excellent S/N ratio in 103dB are realixed. -5. "Re-Master" equipped can reproduce not only DVD but also the voice of the compression audio of WMA/MPEG Audio Layer etc. -6. Low extension facility called "Bass Synthesizer" to be equipped to realizes super-low reproduction.

B) High sound quality decoder "DTS 96/24" is equipped in addition to 6.1ch decoder of Dolby digital EX and DTS-ES. -1. "Dolby Digital - SURROUND EX". * Dolby Digital - EX(Extra Surround) is an acoustic format developed by Dolby Research Institute and Lucas Film company, and was adopted in movie. "Star Wars: Episode 1 the Phantom Menace". After that, it was applied to domestic acoustic format as 「Dolby Digital - SURRUND EX」. * This format possesses 「SURROUND BACK (SB)channel」 in addition to 5.1ch SURROUND SYSTEM. By this, more rich detailed sound field has been realized with greatest presence and spread. * The information of back SB added is encoded into 5.1ch SURROUND signal, and is exchangeable with existing 5.1ch SYSTEM. * AAC decoder is installed, and multi ch reproduction of multi ch voice and the digital versatile disc audio delivered in the BS digital broadcasting with which the presence overflows is more possible.

-2. "DTS-ES(NEO: 6)". * DTS-ES is new Multi Channel Digital Signal Format developed by DTS(Digital Theater System) company. "ES" in DTS-ES is abbreviated of "Extended Surround" This is new format which add extended surround signal to conventional Digital surround format(5.1ch) and makes 6.1ch, which this 6.1ch enables more sound fidelity and extendibility in comparison to DTS(5.1ch). * DTS-ES has two types, one is "DTS-ES Discrete 6.1ch" , other is DTS-ES Matrix 6.1ch. And, both of two are interchangeable with conventional DTS(5.1ch) in playback. * DTS-ES has a function possible to artificially make 6ch surround of 2ch source both digital and analogue. This is called "DTS NEO:6 surround mode.

Page 4: Technical ManualXR50series0207

4 [ DTS-ES Discrete 6.1ch ] This is format of which each channel of 6.1ch incl. added SB ch is independently recorded by method of Digital Discrete. [ DTS-ES Matrix 6.1ch ] This format of which SB ch processed by matrix encode in advance is inserted to SL/SR ch, and output to SL/SR/SB ch at playback after performing Matrix decoder. [ DTS NEO: 6 CINEMA ] Making highly of Separate characteristic this mode is decoded, which show good effect similar to that of 6.1ch when playback of 2ch source. Accordingly, this mode is suitable for playback of cinema sound. [ DTS NEO: 6 MUSIC ] Front channel (FL/FR) signal is stable in its tone quality because playing it back non-through Decoder. In addition, it shows natural tone by an influence of surround signal output from Center channel and Surround channels (SL/SR/SB). Accordingly, this mode is suitable for playback of music sound.

[ DTS-ES Discrete 6.1ch ] [ DTS-ES Matrix 6.1ch ] [ DTS NEO: 6 CINEMA / MUSIC ]

-3. Latest high sound quality decoder "DTS 96/24"is usable. * DTS 96/24 is a multi-channel digital signal format developed by Digital Theater Systems Co.,Ltd. * Wide frequency bandwidth exceeding 40kHz is realized by expanding sample frequency up to 96kHz or 88.2kHz. * Moreover, wide frequency bandwidth and dynamic range equivalent to PCM with 96kHz/24bit are realized. By this, the multi-channel surround eqivalent to DVD audio is satisfactory.

-4. Various modes equipped to enjoy movie and music. * SFC function equipped (MUSIC MODE:LIVE, POP/ROCK, VOCAL, JAZZ, DANCE, PARTY, AV /MOVIE MODE: DRAMA, ACTION SPORTS, MUSICAL, GAME, MONO) can appropriately reproduce according to various sources and works including Dolby Pro Logic II and DTS NEO:6. * In addition, function "Central focus" equipped can shift serif and vocal to the vicinity of the center of screen. * Function "Multi Rear" equipped can emphasize the extension of sounds from rear channel, and also others function equipped can adjust sound field to modes or user's taste.

-5 Various terminals equipped to enable system expanding. * Component video input /output (2in /1out), S Video input /output, in addition, AV amplifier of the DVD 6ch input of the enhancement terminal of the digital voice input (four systems /Optical: 2, Coaxial: 2), the outputs (one system), reception desk A/V input, and speaker A/B switches, equipment.

Page 5: Technical ManualXR50series0207

1-2. Comparison of Specifications 5 Specifications SA-XR50P, PC SA-XR45/25P, PC SA-XR10PP

( '04 Receiver ) ( '03 Receiver ) ( '02 Receiver ) (6.1ch Theater) (6.1ch Theater) (5.1ch Theater)

Power consumption 135W 130W 115W( In standBy condition ) 1W 1W 1WPower supply AC120V /60Hz AC120V /60Hz AC120V /60Hz

Dimensions ( W x H x D ) 430 x 83 x 376mm 430 x 74 x 375mm 430 x 52 x 334mm(16-15/16" x 3-9/32" (16-15/16" x 2-29/32" (16-15/16" x 2-1/16"

x 14-13/16") x 14-3/4") x 13-5/32")Weight 4.2kg (9.3 lb.) 4.2kg (9.2 lb.) :XR45 3.5kg (7.7 lb.)

4kg (8.8 lb.) :XR25DIN Power : 1kHz, T.H.D. 1% 2 x 100W (6 ohm) 2 x 100W (6 ohm) - - - -

AMPLIFIER Power Output : Front L/R 2 x 100W (6 ohm) 2 x 100W (6 ohm) 2 x 100W (6 ohm) SECTION Each channel Driven Center 100W (6 ohm) 100W (6 ohm) 100W (6 ohm)

1kHz, T.H.D. 0.9% Surround L/R 2 x 100W (6 ohm) 2 x 100W (6 ohm) 2 x 100W (6 ohm)Back 100W (6 ohm) 100W (6 ohm) - - - -

Load impedance Front L/R 6 - 8 ohm 6 - 8 ohm 6 - 8 ohmCenter 6 - 8 ohm 6 - 8 ohm 6 - 8 ohmSurround L/R 6 - 8 ohm 6 - 8 ohm 6 - 8 ohmBack 6 - 8 ohm 6 - 8 ohm - - - -

Total harmonic distortion : T.H.D. 0.09% (6 ohm) 0.3% (6 ohm) 0.9% (6 ohm) 20Hz - 20kHzFrequency response : CD /TV /DVD 4Hz - 88kHz, +/- 3dB 10Hz - 44kHz, +/- 3dB 10Hz - 44kHz, +/- 3dB DVD 6ch /DVR /VCR1, VCR2 /TAPEInput sensitivity : CD /TV /DVD 27mV (200mV, IHF'66) 27mV (200mV, IHF'66) 27mV (200mV, IHF'66) DVD 6ch /DVR /VCR1, VCR2 /TAPEInput impedance : CD /TV /DVD 22k ohm 22k ohm 22k ohm DVD 6ch /DVR /VCR1, VCR2 /TAPES/N ratio : TV /DVD /DVR /VCR1 103dB (IHF'66) 98dB (IHF'66) 98dB (IHF'66) (Digital input)Tone controls Bass 50Hz : +10dB to -10dB 50Hz : +10dB to -10dB 50Hz : +10dB to -10dB

Treble 20kHz: +10dB to -10dB 20kHz: +10dB to -10dB 20kHz: +10dB to -10dBSubwoofer frequency response 7Hz - 200Hz 7Hz - 200Hz 7Hz - 200Hz (-6dB)Digital input terminal Optical 2port 2port :XR25, 3port :XR452port

Coaxial 2port 1port 1portDigital output terminal Optical 1port 1port - - - -

Coaxial - - - - - - - - - - - -FM TUNER Frequency range 87.9MHz - 107.9MHz 87.9MHz - 107.9MHz 87.9MHz - 107.9MHz SECTION

Sensitivity 11.2dBf (2uV, IHF'58) 11.2dBf (2uV, IHF'58) 11.2dBf (2uV, IHF'58)

Total harmonic Mono 0.2% 0.2% 0.2% distortion : T.H.D. Stereo 0.3% 0.3% 0.3%S/N ratio Mono 73dB 73dB 73dB

Stereo 67dB 67dB 67dBFrequency response 20Hz - 15kHz : +1dB, -2dB 20Hz - 15kHz : +1dB, -2dB 20Hz - 15kHz : +1dB, -2dB

Image rejection at 98MHz 40dB 40dB 40dB

Stereo separation 1 kHz : 40dB 1 kHz : 40dB 1 kHz : 40dB10kHz : 30db 10kHz : 30db 10kHz : 30db

Antenna terminal 75ohm (Unbalanced) 75ohm (Unbalanced) 75ohm (Unbalanced)

Page 6: Technical ManualXR50series0207

6 Specifications SA-XR50P, PC SA-XR45/25P, PC SA-XR10PP

( '04 Receiver ) ( '03 Receiver ) ( '02 Receiver )AM TUNER Frequency range 530kHz - 1710kHz 530kHz - 1710kHz 530kHz - 1710kHz SECTION

Sensitivity 55dB (20uV, 330uV/m) 55dB (20uV, 330uV/m) 55dB (20uV, 330uV/m)

IF rejection at 1000kHz 50dB 50dB 50dB

VIDEO Output voltage at 1V input 1V +/-0.1Vp-p 1V +/-0.1Vp-p 1V +/-0.1Vp-p SECTION (Unbalanced) (Unbalanced) (Unbalanced)

Maximum input voltage 1.5Vp-p 1.5Vp-p 1.5Vp-p

Input /Output impedance 75 ohm 75 ohm 75 ohm

S - Video terminal Input TV / DVD /DVR / VCR1 TV /DVD /VCR:XR25 - - - -TV /DVD /DVR /VCR:XR45

Output TV Monitor TV Monitor - - - - Component video Input TV /DVD TV /DVD - - - -

Output TV Monitor TV Monitor - - - -REMOTE Control keys 56 keys 56 keys 67 keysCONTROL UNIT Dimensions ( W x H x D ) 51 x 30 x 195mm 54 x 27 x 204mm 56 x 31.5 x 190mm

(2 x 1-3/16" x 7-21/32") (2-1/8" x 1-1/16" x 8-1/32") (2-7/32" x 1-1/4" x 7-15/32")Weight 133g (4.7oz.) 141g (4.97 oz.) 146g (5.15oz.)

Power source (UM-3) x 2 (UM-3) x 2 (UM-3) x 2

Page 7: Technical ManualXR50series0207

72. SUMMARY OF SYSTEM CIRCUIT DIAGRAM2-1. SYSTEM CIRCUIT DIAGRAMA) This unit is composed as shown in the following whole system circuit diagram.

B) Explanation of each signal is as follows ; -1. Input audio signal

OPT 1/2, COAX 1/2 : Digital Front L/R (PCM) or 6.1ch (Bit-Stream)CD,TV, DVD, VCR, TAPE : Analog Front L/RDVD C/SUBW : Analog Center, Sub-WooferDVD LS/RS : Analog Surround L/R

-3. Output audio signalSUBW OUT : Analog Sub-Woofer

-3. Input video signalDVD, TV, VCR(DVR) : Analog video

-4. Output video signalTV OUT : Analog video

-5. PCM and Bit-Stream signalPCM (Pulse Code Modulation) : Linear PCM for L/R Stereo 2ch Bit-Stream : 6.1ch or 5.1ch Encode sganal ( Dolby Degital, DTS)

-6. PWM signalPWM(Pulse Width Modulation) : Logic modulation of PCM signal for Digital amplifire.

-7. Digital-AMP gain control of H-Bridge power supply circuitVGDA(Variable Gain Digital Amp) : Audio output signal is amplified by the voltage gain control of H-Bridge power supply circuit.

Sub uPM38039MC-xxxFP

( 5V )

MasterVolumeButton

BUFF/ LPF

InputSelector

A/DCS5361

DIRAK4114

A/DCS5361

H-Bridge

H-Bridge

H-Bridge

Back upPower

SwitchingRegulator

FL

FR

FC

LS

RS

SB

CD, TV,DVD, VCR,TAPE

DVDC/SUBW

DVDLS/RS

DVD, TV,VCR

TV OUT

SUBW OUT

OPT 1/2 ,COAX 1/2

A/DCS5361 DSP

CS494xx

25

4

3

3

LEDDriver

2

DC-DCconverter

DSP_OSC

5

5

5

5

5

6 to 5, 3.3, 2.5+/-14.5V, FL ACSA-XR30/50/70

5

2ndAudio

SecondAudio Out

A/DATT

(XR70 only)

MCK_SEL

Video-SelNJM2296NJM2586

OSDLC74781

2

6

2003. 6. 18

RDS_CKRDS_ST

SEL/TN/DA_CKSEL/TN/DA_DT

SEL_STVCR_RECMT_2ND

OSD_CKOSD_DTOSD_ST

5V 5V

5V

5V

5V

AD_M0 / 1AD_OVF / OVSAD_RESET

OSC_PWR

2.7~3.6V(5V input OK)

3.3V(5V input OK)

2

2

DIR_INT0 , 1DIR_RESETDIR_CSCDTO

SCDCLKSDOUT

2.5V & 3.3V

5 2

SDINDSP_RESETDSP_FCSDSP_CSINTREQFINTREQ

SMUT

E

V_A

, B, C

2

5V

5V 5V

REQSREQMM_CKS2M_DTM2S_DT

AC_S

YNC

POW

ER_R

ELAY

DC_D

ET

SEL/TN/DA_CKSEL/TN/DA_DTDA_ST

MUTE_SUB

A/D_

ATT

(B_P

ROOF

)

2 2

3.3V 3.3V

3.3V(5V input OK)

uPRewriter

FL DriverNJU3426

FLD

2

2

3

D/AAK4384

RDSLC72723TUNER

TUN_SDTUN_DI/STTUN_CE

FlashRewriter

6

HP

D/AAK4384

3

INIT_IN

2

Modulator

TAS5076

/MUT

E

/AMP

_RES

ET

SDA

/ SCL

DEC_

GND

DEC_

OUT

ROMCorrection

3

uPRewriter

ROMCorrection

Main uP M38039MC-xxxFP ( 5V ) /S

HORT

_DET

THRM

_DET

ERR_RCVRY

AMP_

CNT1

3

3

3 2

RemoteControl

REMO

TE

KEY

1, 2

2

LED2

_CLK

FL_C

S

FL/LE

D_CK

FL/LE

D_DT

AM BeatProof

SelectorEncoder

2 SEL_

ENC

_A, B

RELAY

SP_A

, B(X

R50/7

0)

/MT_

ALL

(XR70 only)

SUBW

L/R

C/SB

LS/RS

RELAY

MMD

(XR7

0)

2

HDMI / uP (XR70)

LED1

_CLK

(XR7

0)

PCM1084

PWM --> D.Amp

PCM

PCM

PCM

PCM

PCM

PCM

PCM or Bit-Stream (6.1ch)

Analog

Analog

Analog

Analog

Decode Dolby.D-EX DTS-ES AAC, etc

LEVEL AdjVR/TONETRIM Con.

D-AMP Gain( 3V -- 0V )

VGDAD-AMP Gain max

(40V -- 10.5V)

Analog

Analog

Analog

--> D.Amp --> D/A

--> D.Amp --> D/A

--> D.Amp --> D/A

PWM --> D.Amp

PWM --> D.Amp

--> D.Amp --> D/A

--> D.Amp --> D/A

--> D.Amp --> D/A

Page 8: Technical ManualXR50series0207

83. SIGNAL INPUT SELECTOR CIRCUIT3-1. AUDIO INPUT SELECTOR SETTINGA) This unit automatically detects whether input is Digital or Analog. Also, the user can fix the input mode. They are controlled by the program in the microprocessor ICs. ( Sub : IC1014 / Main : IC6901)

* As " IN MODE " setting ; AUTO : Automatically detects the input signal and be played. ANALOG : Fixes the input signal to analog and be played. DIGITAL : Fixes the input signal to digital and be played. PCM FIX : Fixes the input signal to PCM and be played.

* As " AUTO " setting ; An initial setting is analog input. Main-microprocessor always monitor the digital input signal. And digital input signal is locked by information from Sub-microprocessor, in case that input signal is degital signal. Main-microprocessor switches the selector circuit from analog input source to digital input source. Also, then from digital input condition, if digital input signal isn't locked by Sub-microprocessor, Main-microprocessor switches the selector circuit to the analog input source two seconds later.

[ AUDIO INPUT SELECTOR SETTING ]IC401

XR30 XR50 XR70

---- DVD DVD

TV TV TV

DVR/VCR

IN

VCR REC VCR2 VCR2OUT XR30

CD CD CD

TUNER TUNER TUNER

DVD TAPE TAPE

---- TAPE TAPE REC ---- REC or

2nd AUDIO

* "SEL_CLK" is clock signal for the input selector control.* "SEL_DATA" is data signal for the input selector control.* "SEL_STB" is strobe signal for the input selector control.

Fig. - 1

DVR/VCR1 DVR/VCR1

to 2nd AUDIO SELECTOR

from 2nd AUDIO SELECTOR

to OP AMP

NJM731S1

S3

S4

S5

S6

S2

S7

S8XR30/50

( For XR70 Only )

LEVEL SHIFT

LATCH CIRCUIT

SHIFT REGISTER

SEL_STB

SEL_CLK

SEL_DATA

( For XR70 Only )

Page 9: Technical ManualXR50series0207

9

XR30 XR50/70DVD O X X O X X X O XTV X O X O X X X O X DVR/VCR ,DVR/VCR X X O X X X X O XVCR2 X X X O X X O XCD, AUX X X X O X O X O XTUNER X X X O X X O O XTAPE ( XR30: DVD ) X X X O X X X X OTAPE MONITOR ON --- --- --- --- --- --- X OMUTING ON --- --- --- --- --- --- --- X O

--- : Do not care in switching of MUTING ON/OFF, too.

Fig. - 2

* If S7 and S8 concurrently become ON condition, input circuit itself may get to oscillate because it turns to closed circuit loop. It's the same with relation S3 and S4 in XR30 series. In order to avoid the above problem, microcomputer controls the timing of switching so that the said SW would not concurrently become ON condition. The above switching timing : Refer to " Fig. - 6 the timing chart ".* XR30 VCR REC switch must be OFF when DVR/VCR selector is selected.* As for XR50/XR70, these have VCR_REC port for VCR REC MUTE and this port should be set to "L" when VCR1 is selected.* A TEPE REC output can be switched to the "SECOND AUDIO OUTPUT" terminal by XR70 setup.* When a DIGITAL input is chosen ( at DIGITAL LOCK in AUTO INPUT MODE, and the time of DIGITAL INPUT MODE selection), all the above mentioned analog input selectors are set as OPEN.

3-2. VIDEO INPUT / OUTPUT SELECTOR SETTING

[ SETTING OF VIDEO SELECTOR ]IC301, IC361, IC362

Fig. - 3

S1 S2 S3 S4 S5 S6 S7 S8

NJM259

SW2

SW1 MUTE 1

MUTE 2

b

a

a

a

b

b

b

a

MONITOR

VCR1 RECVCR REC

TV

DVD

VCR2MUTE 3

b

a

No

a

a

SW3

SW4

DVR/VCR1DVR/VCR

No used Q1

Q2

Q3

Vin1

Vin2

Vin3

Vin4

Vin5

b

b

(SW5)

Page 10: Technical ManualXR50series0207

10 Contorol

Fixing V_A V_B V_C *1 MON. NO VCR1SW1 SW2 SW3 SW4 SW5 OUT USED RECMUTE2 MUTE3 --- --- MUTE1 Q1 Q2 Q3

H H L H H DVD DVD DVD

Fig. - 4

1) Switch setting ; a : 'L' = ON , 'H' = OFF b : 'H' = ON , 'L' = OFF2) Selector switching is controlled by signal of microprocessor : "V_A / V_B / V_C"3) *1 : It is controlled according to "OR" condition of signal "V_A / V_B / V_C". *2 : DVR / VCR1 or DVR / VCR4) The "MUTE 1" is controlled by the signal which was made by adding control "V_A" and "V_B".5) The timing of POWER OFF is changed at the same time as the FL display OFF.6) In the position except the above video selectors such as TUNER, it is set to "VCR1 (VCR)".

3-3. SECOND AUDIO OUTPUTA) It is effective only for XR70. This is the function which outputs sauce different from what is reproduced by the main part to a SECOND AUDIO OUTPUT terminal. (In XR30/50 setup, control of the following selector is unnecessary.) Voice selector switch is set up according to a "SECOND AUDIO OUTPUT" setup in SETTING MODE. The control signal for voice selector IC (NJM7313) control is shared, and the SECOND AUDIO selector IC (NJM7312) is switched. However, when having set up a SECOND AUDIO OUTPUT setup in addition to "SOURCE", TUNER cannot be outputted to SECOND AUDIO.

IC401

Fig. - 5

Selected Output

POWER OFF H L L L L OFF OFF OFF

VCR 1 *2 H L H L H VCR1 VCR1 OFF

TV TV TV

DVD

TV H H L L H

VCR2 VCR2 VCR2( Only for XR50/XR70 )

VCR2H H H H H

DVD

TV

DVR/VCR1

VCR2

CD

TUNERfrom INPUT SELECTOR

for TAPE REC OUT

TAPE

NJU731

TAPE REC or2nd AUDIO

S1

S2

S3

S4

S5

S6

S7

S8

Page 11: Technical ManualXR50series0207

113-4. TIMING CHARTA) Mute timing for switching * In selector switching, a switching mute signal is output by AF_MUTE port and the SUBW_MUTE port. But, if any port is in the condition of the 'H' output fixation, do not make change just as it is. The preliminary output is 40 ms to the selector switching and the lasting output is 100 ms. But, when changed to TUNER from the selector except TUNER, to renew PLL, AF muting must be applied to the output of the tuner, too, at the same time. In the following timing, TUNER selector is set to OPEN. * The timing that there is not

a part of TUNER OPEN in usual selector switching.

MT_ALL * When switching a selector to TUNER, later by 40 ms that AF_MUTE was output,

Selector OPEN RF_MUTE is made ON.RF_MUTE ( RF_MUTE ) And RF_MUTE is made OFF

before by 100 ms that AF_ MUTE is turned off.

* Because the ( L+R ) signalData for which was delayed for 100 Selector ms when the SFC function

was ON is MIXed by FRONT, 40ms 100ms the remainder of AF MUTE

Fig. - 6 is 100 ms.

Page 12: Technical ManualXR50series0207

12 4. DIR /CODEC CIRCUIT, A/D CIRCUIT4-1. DIR /CODEC CIRCUIT (DIR IC: IC1007 / AK4114)A) DIR IC is called "DIGITAL AUDIO INTERFACE RECEIVER". That is controlled by control signal of sub -microprocessor ,and its function is as follows. It generates Bit CLOCK(BICK) and L/R Channel CLOCK(LRCK) based on Master CLOCK signal(XT1) at the same timing of inputing digital signal. Then, digital input signal is converted to L/R audio serial data(SDTO), and is output to DSP IC.

Master CLOCK signal,Bit CLOCK signal and L/R Channel signal are digital signal called Timing signal necessary to process L/R audio serial data,and these signals function as the following. * Master CLOCK signal : function as basic clock in processing digital signal. * Bit CLOCK signal: function as timing clock to process Audio serial data. * L/R Channel CLOCK: as timing signal to output each signal,dividing L/R signal.

B) This DIR IC is composed as shown in the following circuit diagram.

IC1007

RX0 X'talRX1 8 to 3 Clock Oscillator ClockEX2 Input Recovery GeneratorEX3 SelectorRX4RX5 DEMRX6 DAIF AudioRX7 Decoder I/F

TX0

TX1 DIT

AC3/MPEG Error & Q - Subcode uP I/F Detect STATUS Buffer

Detect

Fig. - 7

* The above circuit diagram shows circuit condition at "Serial control mode"in DIR IC. * Mode of DIR IC is set to "Serial control mode" when input terminal "P/SN" is "L". And, mode becomes "Parallel control mode" when "P/SN" is "H".* "Serial control mode" has two control methods,one is "4-wire serial mode" and the other is "IIC"mode. Control method becomes ""4-wire serial mode" when input terminal "IIC" is "L".* "4-wire serial mode"composed of "CSN","CCLK","CDTI"and "CDTO" is controlling DIR IC, when "4-wire serial mode", "Serial control mode".

Timing chart of each CLOCK and Audio serial interface and control signal of DIR IC are shown to next.

No usedXT1 XT0

Ext Clock (From crystal)

AVSS AVDD R

MCKO1MCKO2

LRCK

SDTOBICK

DAUX

PDN

CSN(OCKS0)CCLK(OCKS1)CDTO(CM0)CDTI(CM1)

P/SN="L" IICINT1INT0B,C,U,V OUTVIN

Page 13: Technical ManualXR50series0207

13C) Timing chart of Clock signal

VIH VIL

dECLK = tECLKH x fECLK x 100 = tECLKL x fECLK x 100

dMCK1 = tMCKH1 x fMCK1 x 100 = tMCKL1 x fMCK1 x 100

dMCK2 = tMCKH2 x fMCK2 x 100 = tMCKL2 x fMCK2 x 100

VIH VIL

dLCK = tLRH x fs x 100 = tLRL x fs x 100

Fig. - 8

D) Timing chart of Serial Interface signal (For Audio siganal)

VIH VIL

VIH VIL

VIH VIL

Fig. - 9

LRCK

BICK

SDTO

DAUX

tBLR tLRB tBCKL tBCKHtBCK

50%DVDD

tDXS tDXH

tLRM tBSD

MCKO1

MCKO2

LRCK

XTI

50%DVDD

50%DVDD

1/f ECLK

1/f MCK1

1/f MCK2

1/fs

tECLKH tECLKL

tMCKH1 tMCKL1

tMCKH2 tMCKL2

tLRH tLRL

Page 14: Technical ManualXR50series0207

14

VIH VIL

VIH VIL

VIH VIL

Hi-Z

Fig. - 10

F) DIGITAL INPUT AND OUTPUT CONTROL * AK4114 has function of 8 routes for digital input (RX0-RX7) and 2 routes for digital output(TXO/I). Its function is to switch input to sellected input SELCTOR by three control signals IPS0, IPS1 and IPS2, and also to concurrently switch digital output to the same selected SELCTOR by two control signals, OPS00-02, OPS11-12.

* ISP2-0 signals are included in the command data(C1-0) of CDTI.

* ISP2-0 is used to select the receiver channel, and OPS2-0 is used to select the source for output channel(TX0/1). Output channel must be set the same of input channel. The following table shows its assignment ;

0 0 00 0 10 1 00 1 11 0 0

Fig. - 11

0 0 0 <--- Fixed <--- No used

Fig. - 12

IPS2 IPS1 IPS0 Input Data XR30/50/70

RX0 COAX1 : DVDRX1 OPT2 : DVRRX2 OPT1 : TVRX3 COAX2 : CDRX4 HDMI

101 - 111 RX5 - RX7 No UsedRecovery Data Selecting

OPS02 OPS01 OPS00 Output Data

RX0100 - 111 RX1 - RX7

Through Output Data selecting (TX0)

<--- No used

CSN

CCLK

CDTI

CDTO

tCCS tCCK

tCCKL tCCKH

tCDS tCDH

C0C1 R/W A4

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15

0 0 0 0 <--- COAX10 0 0 1 <--- OPT20 0 1 0 <--- OPT10 0 1 1 <--- COAX20 1 0 0 <--- HDMI0 <--- No used1 x x x <--- No used

Fig. - 13

* In case of HDMI input, TX1 output data is output only on condition that fs is 48KHz or less.

G) MASTER CLOCK OUTPUT CONTROL * The master clock is output from the terminal MCKO1. * The output of master clock is selected by the sampling frequency of input signals.

<The sampling frequency of input signals>0 0 0 256fs 256fs 256fs (fs = 32kHz,44.1kHz,48kHz) Default1 0 1 256fs 128fs 256fs No used2 1 0 512fs 256fs 512fs No used3 1 1 128fs 64fs 128fs (fs = 88.2kHz,96kHz,176kHz,192kHz)

Fig. - 14* Selection for clock output ; OCKS1 : '0' = Serial mode , '1' = Parallel mode

OCKS0 : '1' = Serial mode , '0' = Parallel mode

H) MASTER CLOCK OPERATION MODE * The operation mode of master clock is selected by the input mode.

<The input mode>0 0 0 --- ON ON PLL RX (Digatal) Default1 1 1 --- OFF ON X'tal DAUX (Analog)

0 ON ON PLL RX1 ON ON X'tal DAUX

3 1 1 --- ON ON X'tal DAUX No uesed

Fig. - 15* Selection for operation mode of master clock ; CM1 : '0' = Serial mode , '1' = Parallel mode

CM0 : '1' = Serial mode , '0' = Parallel mode

Clocksource

SDTO

MCKO2 X'tal

PLL X'talMode CM1 CM0 UNLOCK

No OCKS1 OCKS0 MCKO1

RX2

DIT OPS12 OPS11 OPS10 Output Data

RX0RX1

DAUXThrough Output Data selecting (TX1)

RX3RX4

101 - 111 RX5 - RX7

2 1 0 (AUTO)

Page 16: Technical ManualXR50series0207

16I) SAMPLING FREQUENCY AND PRE-ENPHASIS DETECTION * The sampling frequency is detected in the comparison with the X'tal frequency. * Then it is output to "FS3-0" bit of the control register.

0 0 Default0 1 Fixed1 01 1 No Used

0 0 0 00 0 0 10 0 1 00 0 1 11 0 0 01 0 1 01 1 0 01 1 1 0

Fig. - 16

4-2. A/D CIRCUIT ( A/D IC: IC1009, IC1013 / CS5361 )A) A/D IC is called "MULTI-BIT AUDIO ANALOG / DIGITAL CONVERTOR (A/D)" controlled by control signal of sub-microprocessor ,and its function is as follows. Convert input analogue signal from each SELECTOR terminal to digital signal. Generate Serial CLOCK(SCLK) and L/R Channel CLOCK(LRCK) based on Master Clock (MCLK) supplied from DIR IC. Further convert digitalized signal to SURROUND L/R Audio serial data (SDOUT) and output it to DSP IC, synchronizing with the two CLOCKs said Serial CLOCK(SCLK) and L/R Channel CLOCK(LRCK).

B) This A/D IC(CS5361) is composed as shown in the following circuit diagram.IC1009, IC1013

Fig. - 17

96kHz176.4kHz

44.1kHz

192kHz

Reserved48kHz32kHz

88.2kHz

11.2896MHz12.288MHz24.576MHz

XTL1 XTL0 Reference X'tal Frequency

( Channel status using )

fsFS3 FS2 FS1 FS0

Voltage Reference

LP FilterDigitalDecimationFilter

DAC

HighPassFilter

LP FilterDigitalDecimationFilter

DAC

HighPassFilter

Serial Output interface

VCOM REF_GND /OVFL VL SCLK LRCK SDOUT MCLK

/RST

DIF

M/S

/HPF

MDIV

MODE0(M0)

MODE1(M1)

FILT+

AINL-AINL+

AINR-AINR+

S/H

S/H

Page 17: Technical ManualXR50series0207

17C) A/D_RESET --- /RST terminal : Reset (Input) * When power is turned on, this terminal is settled to 'L' to reset A/D.

D) AD_M0, AD_M1 CONTROL --- M0, M1 terminal : Mode Selection (Input) * This terminal is A/D sampling frequency selection.

DIV=0 --- Fixed

Fig. - 18

0 00 11 01 1

Fig. - 19

E) A/D_OVF, A/D_OVS INPUT --- /OVFL terminal : Overflow Mode (Input)A/D_OVF : Front L/R channel A/D overflow signal input.A/D_OVS : C/LS/RS/SUBWOOFER channel A/D overflow signal input.

* This terminal is signal input. This input terminal is 'H' normally. When A/D input signal is excessive high, this terminal is output "Low". While 'L' is detected, "OVFW" bit of connection data to the Main-microprocessor is set. When DVD 6ch is selected, both "A/D_OVF"input and "A/D_OVS"input is checked. However, in "DVDV 2ch", "A/D_OVS"input is ignored.

2kHz - 5kHz50kHz - 100kHz100kHz - 192kHz

Single Speed ModeDouble Speed ModeQuad Speed Mode

Reserved

24.576Commom Master Clock Frequency

M1 M0 Mode Output Sample Rate (fs)

192

16.38422.579224.576

22.579211.289612.288

8.19211.289612.2888.192

DIV = 1MCLK

11.289612.288

DIV = 0MCLK (MHz)

6488.2

22.579224.576

32 16.384

SAMPLE RATE(kHz)

96176.4

44.148

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18

4-3. A/D CIRCUIT (A/D IC: IC1015 / PCM1804)A) This A/D IC's function is as follows. Convert input analogue signal from each SELECTOR terminal to digital signal. Generate Serial CLOCK(BCLK) and L/R Channel CLOCK(LRCK) based on Master Clock (SCKI) supplied from DIR IC. Further convert digitalized signal to Front L/R Audio serial data (SDATA) and output it to DSP IC, synchronizing with the two CLOCKs said Serial CLOCK(BCLK) and L/R Channel CLOCK(LRCK).

B) This A/D IC(PCM1804) is composed as shown in the following circuit diagram.

IC1015

Fig. - 20

Page 19: Technical ManualXR50series0207

19 5. DSP SIGNAL ENCODE CIRCUIT (THEATER CHANNEL SIGNALS)5-1. DSP CIRCUIT (DSP IC: IC1006 / CS494003)A) DSP IC is called "MULTI-STANDARD AUDIO DECODER". That is controlled by control signal from sub -microprocessor ,and its function is as follows. This DSP IC has operation processing function which is to separatly output each decoded signal to each ch, decoding the following signal inputted as L/R audio serial data(SDTO/SDATA). (5.1ch --> 6.1ch : Front L/R, Center, Surround L/R/Back, SUB-Woofer) <Input signal to DSP IC> * 5.1ch PCM signal of L/R audio signal converted to PCM signal through DIR or A/D IC and SURROUND L/R and Center/Sub-woofer. * Bit Stream signal containing 6.1ch (Dolby Degital-EX, DTS-ES etc) At the same time, DSP IC is controlling audio such as sound, tone and Trim(6.1ch) level, and output those signales to PWM circuit (Pulse Width Modulation).

Bit CLOCK(BICK/BCLK) from DIR IC,A/D IC and clock signal of Shift CLOCK(SCLK) and L/R Channel are controlled by Sub-microprocessor as timing signal.

B) This DSP IC(CS494003) is composed as shown in the following circuit diagram.

IC1006

Fig. - 20

Fig. - 21

(CS494003)

(To Sub Micro-p)

SW ch

C/SB ch

LS/RS ch

L/R ch

Page 20: Technical ManualXR50series0207

20C) DSP CODE for each SOUND MODE is as following.

Fig. - 22

D) DSP CLOCK setting is as following.

Fig. - 23

* Bass Manager /Tone is set as x1 fs at RE-MASTER.* Bass Manager /Tone is set as x2 fs at DTS 96 / 24.

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21E) PLAYBACK MODE and INPUT SOURCE is as following.

A … DTS LOGO MARK, 2 … Dolby MARK

Fig. - 24* SFC is effective only to 2CH source. PL2, NEO:6 and SFC can be chosen exclusively.

*3)

Page 22: Technical ManualXR50series0207

22(1) Internal procedure of *1) part is DTS-ES matrix(2) PL2 also can be selected like as ANALOG/PCM.(3) Shaded area is an automatic selection.(4) '◆' mark and shaded area are the default mode.(5) PL2 or NEO:6 can be selected. Default mode is PL2.(6) In decoding of DOLBY DIGITAL/AAC 2/0 Lt/Rt source, ANALOG/PCM and 2/0 encoded source, the selection of PL2 or NEO:6 is common. However, if STEREO or SFC is selected in ANALOG/PCM or 2/0 encoded source decoding, 2/0 source of DOLBY DIGITAL/AAC is replayed with PL2.(7) PCM96/192 source can be replayed only STEREO mode.(8) PCM 96/192, DTS 96/24 source can not be replayed when TONE is ON or RE-MASTER is ON.(9) As for except 3/2 source, ENHANCED SURROUND can not be enabled.(10) *2) part can not be replayed. Therefore, it is replayed as normal DTS and shows "DTS", not "DTS 96/24".(11) In DVD 6CH INPUT mode, SOUND MODE switching is disabled and the mode is fixed as own mode, DVD 6CH.(12) In *3) part, MAIN/SUB/DAUL mode can be selected. "STEREO" indicator does not light.

F) GAIN COMPENSATION is as following. Gain adjustment is done by matrix procedure in DSP in order to prevent clipping of each signals. It is compensated by Sub microprocessor control as follows.

Fig. - 25*1) OFFSET only +3 dB in Trim Volume.*2) Lower 3dB of levels of L/C/R/LFE by turning ON AUTOMATIC_L/C/R/LFE_ATTENUATION, and OFFSET all channels only +3dB in Trim Volume.*3) Above * 2) is carried out. However, Trim Volume of all channels is Offseted only +6 dB. -->(That is above mentioned *1 ) and * 2) is performed.)

Page 23: Technical ManualXR50series0207

23*4) Lower 3dB of SUM_INPUT_X_LEVEL of Bass Manager of channels other than a SL/SR/SB channel. --> (+3dB of levels of a SL/SR/SB channel is raised relatively.)

SILEV_L/SILEV_R/SILEV_C = 0x16C311 (-15dB) → 0x101D3F (-18dB)、SILEV_LFE = 0x47FACD (-5dB) → 0x32F52C (-8dB)

3dB (X=L, C, R, LFE) of BASS_MGR_INPUT_X_LEVEL of Bass Manager is lowered (0x7FFFF->0x5A9DF6). The setting value of Trim Volume of all channels is OFFSETed only +3dB.

Page 24: Technical ManualXR50series0207

246. SYSTEM CONTROL CIRCUIT (SUB /MAIN MICRO-P)6-1. SUB MICRO-P CIRCUIT (SUB MICRO-P IC: IC1014 / M38039MFxxx)A) SUB MICRO-P IC is called "Sub-microprocessor", and mainly perform signal control of DIR IC, A/D IC and DSP IC etc, establishing mutual communication with MAIN MICRO-P. At the same time, perform MUTE control of PWM output signal, gain control of DIGITAL AMP and controlling sound level by encoding process. (Volume) And also it has function to re-write Sub microprocessor program, communicating with ROM Correction when it's necessary to updata program by any reason.

B) This SUB MICRO-P IC(M38039MFxxx) is composed as shown in the following circuit diagram.

Fig. - 25

IC1014

Fig. - 26

IC1014

IC6901

(sub)

Page 25: Technical ManualXR50series0207

25

Fig. - 27

C) TERMINAL FUNCTION of SUB MICRO-P is as following.

(To DSP IC)

Page 26: Technical ManualXR50series0207

26

Fig. - 28

Page 27: Technical ManualXR50series0207

27D) MASTER VOLUME CONTROL is as following. MASTER VOLUME CONTROL controls sound volume by controlling MASTER VOLUME inside DSP and Voltage variable switching power supply, and This MASTER VOLUME CONTROL is controlled by operation of Encoder( Vol_ENCD_A/B input) for MASTER VOLUME.

Data is updated,and at the same time data for sound volume indication is transmitted to main micro- processor, when either MASTER ENCODER is operated, or recetion data (REMOTE VOL UP/GOWN flag) is received from main micro-processor.

It's controlled with the output state of TEST operation continued under TEST NOISE operation. At that time MUTE doesn't function even if MASTER VOLUME is minimum. In case that recepttion data of [VOLUM UP/DOWN] code of remotecontrol continue over 0.5 sec, switching time in a step is being set to the time specified by [chang of time] of setting value of Volume data, and it gets Volume level continuously moving up and dow.

E) VOLUME ATTENATION CONTROL is as following.

Fig. - 30-90

-80

-70

-60

-50

-40

-30

-20

-10

0

0 45 90 135 180 225 270 315Turn Angle

Volume Curve

Atte

nuat

ion

To Sub Micro-P

Fig. - 29

Page 28: Technical ManualXR50series0207

28

Fig. - 32

( Note ) VOLUME ATTENUATION CONTROL controls sound volume by UP and DOWN, and which is being set to initial level when UP and down of VOLUME is alternately operated.

*1) Attenuation amount of VOLUME is normally specified at the interval of 2 or 3 dB step. However, it's set to control attenuation amount by 1 dB step when each interval of reception data is over 40msec.

Fig. - 31

F) SPECIFICATION of VOLUME CONTROL is as following. Volume is controlled by DSP volume in the master volume range from the maximum to -20dB. It is controlled by power supply voltage of digital amplifier to -40dB. Furthermore, when master volume is lowered, DSP volume is controlled again.

Fig. - 33 Fig. - 34

XR50/70/30

-20dB-40dB

Power supply voltage of Digutal amplifire * XR50/70/30 -20dB to -40dB * XR55 series -28dB to -40dB * XR57 series -32dB to -44dB

-40-41-42

-20

-20

-20-59

-20

-20

Page 29: Technical ManualXR50series0207

29G) MUTE CONTROL of SUB/ MAIN MICRO-P is composed as shown in the following circuit diagram.

Fig. - 35

* Sub Micro-P is controlling MUTE mainly for the change in audio signal, etc.* Main Micro-P is controlling MUTE mainly for the switching noise of person's operation, and abnormality power supply, etc.

/SREST

TAS5076

Page 30: Technical ManualXR50series0207

306-2. MAIN MICRO-P CIRCUIT (MAIN MICRO-P IC: IC6901 / M38039MFxxx)A) MAIN MICRO-P IC is called "Main-microprocessor" and mainly perform switching control of I/O SELECTOR IC, signal control of Panel operation, Remote control and FL DRIVER IC etc, establishing mutual communication with SUB MICRO-P. At the same time, perform MUTE control of switching noise, signal control of PWM MODULATOR IC (DIGITAL AMP) and controlling sound mode by encoding process. And also it has function to re-write Main microprocessor program, communicating with ROM Correction when it's necessary to updata program by any reason.

B) This Main MICRO-P IC(M38039MFxxx) is composed as shown in the following circuit diagram.

IC6901

Fig. - 36

(sub)

(/MT_ALL) for L/R/C/LS/RS/SB

(/AMP_RESET) for TAS5076 Hardware Reset(THERMAL) for Thermal Warning Detection (CLIPPER)

(/SHORT_DET) for Output Short Detection (OVERLOAD)

MUTE CONTROL

(/MT_HP) to Head Phones

(/MT_SUB) for Sub Woofer

Page 31: Technical ManualXR50series0207

31

Fig. - 37

C) TERMINAL FUNCTION of MAIN MICRO-P is as following.

FL DRIVE CONTROL

Page 32: Technical ManualXR50series0207

32

Fig. - 38

* H/L : High or Low (The fixation output)* I/O : input and output* Nch : N-ch open drain* PU-R : Pull-up Resister* L/S : Level Shifter

Page 33: Technical ManualXR50series0207

33D) ROTARY ENCODER INPUT CONTROL is as following. ROTARY ENCODER generate 24 pulses and make matrix consisting of four combinations as shown in Fig.-39. And using this matrix, Up/Down of ROTORY ENCODER is discriminated. Sampling period at each port(RA and RB) is less than 750μsec.

Fig. - 39〔UP〕 The condition transfer : 0→1→3→2→0→1→3→2→0

The way of detecting: The combination of the change is 013, 132, 320, 201.〔DOWN〕 The condition transfer : 0→2→3→1→0→2→3→1→0

The way of detecting: The combination of the change is 310, 102, 023, 231.

< NOTE > There is chattering in RA, RB. And actually, the input is sometimes discrete as follows, too. But does each operation even if it detects the combination of UP/DOWN.

Status 0 1 1 3 2 0 1 3 3 3 2 3 2 0 1 0 0

* RA, RB level is memorized as two pieces of passing data. And data is checked by Micro- P as the combination of three data which contains the latest data. When three data are agreed, it is judged as the UP/DOWN pulse.

UP UP

RA

To Main Micro-P

Fig. - 40

Page 34: Technical ManualXR50series0207

34E) Function setting of initial condition is as following.

* The cold start : The status at the shipping.

* The hot start : Power ON in return from BACK UP or power ON with the "POWER" button.

Fig. - 41

F) Intercommunication function of Main micro-P and Sub micro-P is as following. Main micro-P use the "/Sbusy1" output of "SIO1" function and Sub micro-P communicates using the "/Sbusy1" input and the "/Sready1" output.

Main : It is used as the function of the "/Sbusy1" output. (SCLK is input.) Sub : It is used as the function of the "/Sbusy1" input and "/Sready1" output. (SCLK is output.) REQM : The communication request is output from Main micro-P. (The "/Sbusy1" output function set by SIO1.) REQS : The communication request is output from Sub micro-P. SIO1M/ SIO2M : SIO1/ SIO2 register of Main micro-P/ Sub micro-P. SOUT/ SIN : A duplex transmission.

Fig. - 42

Page 35: Technical ManualXR50series0207

357. PWM MODULATOR CIRCUIT7-1. PWM MODULATOR CIRCUIT (6CH AUDIO PWM PROCESSOR IC: IC6801 / TAS5076PFC)A) It's called "DIGITAL AUDIO PWM PROCESSOR IC", and 6ch audio signal except for 6.1ch audio signal from Audio PCM is inputte,. and the PCM signal is converted in IC and is outputted to H-Bridge Digital AMP circuit of next stage.

Also, this IC has function of six independent volume controls and mute.

B) This AUDIO PWM PROCESSOR IC(TAS5076PFC) is composed as shown in the following circuit diagram.

IC6801

Fig. - 43

L/R ch

LS/RS ch

C/SB ch

Signal ControlClocks

L/R ch

LS/RS ch

C/SB ch

HIP2100H-Bridge

HIP2100H-Bridge

Page 36: Technical ManualXR50series0207

36C) TERMINAL FUNCTION of AUDIO PWM PROCESSOR IC is as following.

Fig. - 44

Page 37: Technical ManualXR50series0207

37 Each PCM signal(16,20 ands 24bit) from Audio PWM IC go through Supplementary filter. And its sampling frequency changes to 352.8KHZ or 384KHZ, increasing between 4 times and 8 times from original sample. frequency. Then, PCM signal is converted to PWM signal with its sampling frequency remaining. AS to PCM signal, signal level of each sample is given to integer value.   On the other hand, maximum amplitude of sample signal of PWM is specified based on pulse width. ( 0, 1 signal --> Duty ratio signal )

Fig. - 45

E) Clock and Serial Data Interface is as following. TAS5076PFC is composed of six functional elements: * Clock, PLL, and serial data interface (I2S) * Reset /power-down circuitry * Serial control interface (I2C) * Signal processing unit * Pulse-width modulator (PWM) * Power supply

This IC's clock and serial data interface contain an input serial data slave and the clock master /slave interface. The serial data slave interface receives information from a digital source such as a DSP, S/PDIF receiver, analog-to-digital converter (ADC), digital audio processor (DAP), or other serial bus master. The serial data interface has three serial data inputs that can accept up to six channels of data at data sample rates of 32 kHz, 44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz, 176.4 kHz, or 192 kHz. The serial data interfaces support left justified and right justified for 16, 20, and 24 bits. In addition, the serial data interface supports the DSP protocol for 16 bits and the I 2 S protocol for 24 bits. This IC can function as a receiver or a generator for the MCLK_IN (master clock), SCLK (shift clock), and LRCLK (left/right clock) signals that control the flow of data on the three serial data interfaces. This IC is a clock master when it generates these clocks and is a clock slave when it receives these clocks. This IC is a synchronous design that relies upon the master clock to provide a reference clock for all of the device operations and communication via the I2C. When operating as a slave, this reference clock is MCLK_IN. When operating as a master, the reference clock is either a TTL clock input to XTAL_IN or a crystal attached across XTAL_IN and XTAL_OUT. The clock and serial data interface has two control parameters: data sample rate and clock master or slave.

F) Normal-Speed, Double-Speed, and Quad-Speed Selection is as following. The data sample rate is selected through a terminal (DBSPD) or the serial control register 0 (0x02). The data sample rate control sets the frequencies of the SCLK and LRCLK in clock slave mode and the output frequencies of SCLK and LRCLK in clock master mode. There are three data rates: normal speed, double speed, and quad speed. Normal-speed mode supports data rates of 32 kHz, 44.1 kHz, and 48 kHz. Normal speed is supported in the master and slave modes. Double-speed mode is used to support sampling rates of 88.2 kHz and 96 kHz. Double speed is supported in master and slave modes.

PCM PWM( Out put signal)fs=384kHz fs=384kHz

< 16

bit

><

16 b

it >

Page 38: Technical ManualXR50series0207

38 Quad-speed mode is used to support sampling rates of 176.4 kHz and 192 kHz. The PWM is placed in normal speed by setting the DBSPD terminal low or by setting the normal mode bits in the system control register 0 (0x02) through the serial control interface. The PWM is placed in double speed mode by setting the DBSPD terminal high or by setting the double speed bits in the system control register. Quad-speed mode is supported; in slave mode it is auto-detected, and in master mode it is invoked using the I2C serial control interface. In slave mode, if this IC is not in double speed mode, quad-speed mode is automatically detected when MCLK_IN is 128 Fs. In master mode, the PWM is placed in quad-speed mode by setting the quad-speed bit in the system control register through the serial control interface. If the master clock is well behaved during the frequency transition (the high or low clock periods are not less than 20 ns), then a simple speed selection is performed by setting the DBSPD terminal or the serial control register. When the sample rate is changed, this IC temporarily suspends processing, places the PWM outputs in a hard mute (PWM P outputs low, PWM M outputs high, and all VALID signals low), resets all internal processes, and suspends all I 2 C operations. This IC then performs a partial re-initialization and noiselessly restarts the PWM output. This IC preserves all control register settings throughout this sequence. If desired, the sample rate change can be performed while mute is active to provide a completely silent transition.

If the master clock input can encounter high clock or low clock period of less than 20 ns while the data rates are changing, then /RESET must be applied during this time. There are two recommended control procedures for this case, depending upon whether the DBSPD terminal or the serial control interface is used.

Fig. - 46

G) Clock Master/Slave Mode (M_S) is as following. Clock master and slave mode can be invoked using the M_S (master slave) terminal. This terminal specifies the default mode that is set immediately following a device RESET. The serial data interface setting permits the clock generation mode to be changed during normal operation. The transition to master mode occurs following a /RESET when M_S terminal has a logic high applied. The transition to slave mode occurs following a /RESET when M_S terminal has a logic low applied.

H) Clock Master Mode is as following. When M_S = 1 following a RESET, the TAS5076 provides the master clock, SCLK, and LRCLK to the rest of the system. In the master mode, the TAS5076 outputs the audio system clocks MCLK_OUT, SCLK, and LRCLK.

This IC's device generates these clocks plus its internal clocks from the internal phase-locked loop (PLL). The reference clock for the PLL can be provided by either an external clock source (attached to XTAL_IN) or a crystal (connected across terminals XTAL_IN and XTAL_OUT). The external source attached to MCLK_IN is 256 times (128 in quad mode) the data sample rate (Fs). The SCLK frequency is 64 times the data sample rate and the SCLK frequency of 48 times the data sample rate is not supported in the master mode. The LRCLK frequency is the data sample rate.

Normal-Speed, Double-Speed, and Quad-Speed Operation

Page 39: Technical ManualXR50series0207

398. H-BRIDGE AMPLIFIER CIRCUIT (D/A FILTER) 8-1. H-BRIDGE AMPLIFIER CIRCUIT

Lch/ Rch (H-BRIGE DRIVER IC: IC6101/IC6201, IC6102/IC6202 ; HIP2100)LS ch/ RS ch/ C ch/ SB ch (DIGITAL AMP POWER STAGE CONTROLER IC : IC6812, IC6813 ; TAS5182)

A) H-BRIDGE AMPLIFIER CIRCUIT consists of "H-Bridge DRIVER IC" for amplifying audio signal and "DIGITAL AMP POWER STAGE CONTROL IC for amplifying audio signal in LS/LRch and C/SBch. Each "+/-" phase signal of 6ch converted to PWM is separately inputted,and is amplified through Bridge circuit composed of 4 MOSFET in the shape of H type, and then is outputted to next LC filter circuit. In addtion to conversion into PWM, Audio signal is further amplified by expanding dynamic range by raising power supply voltage for H-Bridge circuit. And this control method is called VGDA (Variable Gain Digital AMP).

B) DIGITAL AMP POWER STAGE CONTROLER IC(HIP2100) is composed as shown in the following circuit diagram. ( For each L /R ch )

IC6101/ IC6201, IC6102/ IC6202

Fig. - 47

Page 40: Technical ManualXR50series0207

40D) TERMINAL FUNCTION of H-Bridge DRIVER IC is as following.

Fig. - 48

E) Digital /Analog Filter Circuit is as following. ( For each L /R ch )

D/A Filter = PWM signal -> Audio signalFs=384kHz -> 20kHz

Fig. - 50

* Should be measured by Differential method.

Fig. - 49

* Differential Amplifier wave

Page 41: Technical ManualXR50series0207

41F) DIGITAL AMP POWER STAGE CONTROLLER IC(TAS5182) is composed as shown in the following circuit diagram. ( For each LS /RS ch, C /SB ch )

Fig. - 51

Page 42: Technical ManualXR50series0207

42G) TERMINAL FUNCTION of DIGITAL AMP POWER STAGE CONTROLER IC is as following.

Fig. - 52

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43

H) Digital /Analog Filter Circuit is as following. ( For each LS /RS ch )

D/A Filter = PWM signal -> Audio signalFs=384kHz -> 20kHz

Fig. - 54

Fig. - 53

Page 44: Technical ManualXR50series0207

44

I) Digital /Analog Filter Circuit is as following. ( For each C /SB ch )

D/A Filter = PWM signal -> Audio signalFs=384kHz -> 20kHz

Fig. - 56

Fig. - 55

Page 45: Technical ManualXR50series0207

459. TROUBLE SHOOTING9-1. TROUBLE SHOOTINGA) This "Trouble Shooting" can be used for Digital Amplifier SA-XR25/XR45/XR30/XR50/XR70 series. << Procedures for Trouble Check >> * The solution is earliest when confirming trouble according to the following procedure.

A -1) Symptom : Can't Power ON. ( Can't operate the unit. )

Method of check in non connection ( All IN/Out )

Connect AC cord

Replace the fuse F1

Check DC Power of the main-microprocessor (VCC Pin 57) OK ?

Yes

No

Check the connection the main PCB and the panel PCB ? (CN951A/B, FL_LED_CLK, DATA LED_ST1 ) OK ?

Yes

No

Check the connection the main PCB and the panel PCB (FFC's defective, etc)

Check the LED driver IC on panel PCB ? (LED -- IC951:Pin2, 3, 4 DATA, CLOCK, LCK ) OK ?

Yes

No

Standby LED light ?

No

Yes

Check the fuse F1 OK ?

No

Yes

Replace the LED (D952, etc)

Check the parts on BK +5.7V line (L6801, D6901,Q724, T721, etc)

Check the Clock of the main-microprocessor(10MHz, IC6901:Pin22/23) OK ?

No

Yes

Check the parts on 5.7V line (D951, R948, etc)

Check the voltage of VDD/ Q1 in IC951 (VDD: +5V , Q1: 0V) OK ?

Yes

No

Replace the LED driver IC951

Check " DATA/ CLOCK/ LCK " --> Always "LOW" or "HIGH" --> IC951: NG

Page 46: Technical ManualXR50series0207

46

Replace the X'tal of the clock ( X6901 ) Replace the main-microprocessor ( IC6901 )

Check AC_SYNC of main-microprocessor  (IC6901:Pin20) OK ?

Yes

No

Check the parts on AC_SYNC line(R6905, Q721, T721, etc)

Power switch ON

Power ON by Front Key :OKPower ON by Remote-controller :OK

Power ON by Front Key :OKPower ON by Remote-controller :NG

Power ON by Front Key :NGPower ON by Remote-controller :OK

Power ON by Front Key :NGPower ON by Remote-controller :NG

Check the shutdown of powerafter wait a few minutes

Check the Remote-controllerand Remote-sensor block

Check the connection the panel PCBand the main PCB( Key1, Key2 line )

Check the change of voltageby the power switch

( IC6901:Pin 64, +5V --> 0V )

Check the operation switch ( Short )or

Replace the Diode on VREF line( D6902 )

Check the voltage on key1,key2 in the main-microprocessor( IC6901:Pin 64/63, +5V )

OK ?

No

Yes

Check the Reset signal on main-microprocessor ( /RESET:19pin +5V ) OK ?

Yes

No

Check the parts on /RESET line(Q6901, D6904, C6913, etc)

Page 47: Technical ManualXR50series0207

47

FL Signal wave

Check the operation of RELAY ( RLY721 ) OK ?

No

Yes

Check the connection the panel PCBand the power PCB

( FL_0V, FL_+5V line )

Replace the RELAY( RLY721 )

Check the RELAY ( RLY721:Pin3 0V ) OK ? No

Yes

Replace the switch Tr( Q723 )

Check the connection theAC RELAY line

( CN605A/B:13pin )

Check the main-microprocessor

( IC6901:Pin 34 )

Check the FL_0V, FL_5V line ( W902 : 3pin, -19V 4pin, -24V ) OK ?

Yes

No Check the Diode( D901 )

Check the power of FL Driver IC901 ( VDD: 48pin, +5V Vfdp: 39pin, -30V ) OK ?

Yes

No Check the power supply line( VDD: 5.7V, -VP: -30V )

Check the serial communication of FL Driver IC901 ( Csb: 42pin, CLK: 43pin

S1: 44pin) OK ?

Yes

NoCheck the connection the main-microprocessor and FL driver IC

( CN951A/B )

Replace the FL Display( FL901 )

Check the out put of FL driver IC901 ( 3pin --- 35pin ) OK ?

Yes

No

Replace the FL driver IC( IC901 )

- VP(-30V)

GND

+ 5V

Check the switch Tr ( Q723:base 0.6V ) OK ?

Yes

No

Page 48: Technical ManualXR50series0207

48 A -2) Symptom : No indication on FL. ( AC relay cuts after a few seconds, become to Standby mode )

A -3) Symptom : The "F76" indication on FL. ( AC relay cuts after a few seconds, become to Standby mode )

The power supply cuts after a fewseconds. (After that, standby LED only does light)

Remove the connection of PVDD power supply between the power supply PCB and the main PCB. (CN606: +VDD) (After that, enter again the power button)

Check PVDD circuit line (D711, T701, etc)

The symptom change ?

No

Yes

If the entering of power supply is OK, and FL display is OK, H- BRIDGE AMP circuit is defective.Check the resistance value in Hot /GND connection of each SP ch. (CN601/602, BTL SP +/- : 4-6 kohm is OK)

Standby LED light

Check the output voltage in the power supply PCB ( +/-15V supply , D+5V, A+5V line, etc)

Check the power supply voltage in the I/O PCB ( +/-15V supply, D+5V, A+5V line, etc)

Power ON

The connection isremoved, and check the operation,

Yes

No

Check the connection the power supply PCB and the input PCB (CN401: Power supply line of the selector ICs)

OK ?

Yes

No

Power supply PCB and input PCB connection, and check the operation

Page 49: Technical ManualXR50series0207

49 A -4) Symptom : Display doesn't change with the volume Up/Down. ( The power supply of the unit can be turned on. )

( For the stereo ) ( For the multichannel )

A -5) Symptom : The "F70" indication on FL

FL display becomes "OVER LOAD"before the display of "-20dB" appears

Replace each H-BRIDGE AMPLIFIER(IC6101/ IC6201, IC6102/ IC6202)

In the analog input, in thesetting of the stereo andmultichannel

Replace each DIGITAL AMP POWER IC. (IC6812/ IC6813)

Check the power supply of each D-AMP drive IC (+VDD, +DVDD)

Displayed as "F70 DSP" or "F70 PWM" after Power ON

Check the connection between the main PCB and the DSP PCB. (CN906 - CN1002: AU 0 -- AU 3 signal line)

Check abnormality of DSP IC and PWM Modulator IC or nearby circuit, because the communication error has happened. (AUO -- AU3, MCLK/BCLK/LRCLK )

Up the volume

Power AMP driver IC is Hot ?No

Yes

Page 50: Technical ManualXR50series0207

50 A -6) Symptom : The sound of the speaker doesn't output. ( Check the digital amplifier operation by

all channel mode. )

( Output of signals from DSP IC. )

No connection to IN/OUT

Raise the rotation of the volume to -20dB.

Switch to the all channel output service mode.

Check in the input of I2C and AUDIO DATA on PWM Processor IC (MCLK/SCLK/LRCLK, SDIN1-3,SDA,SCL) OK ?

Yes

No

Defective of DSP IC or check the selector IC.

Check the DC voltage between the speaker's "+/-" polarity and the "GND" chassis on set.

DC voltage in each speaker terminal 20V -- 21V ?

No

YesCheck the circuit line of the H- BRIDGE AMP IC (IC6101/IC6201,IC6102/IC6202 IC6812, IC6813)

Check the connection in each speker terminals

Page 51: Technical ManualXR50series0207

5110. NEW HDMI INTERFACE INFORMATION10-1. Operation of HDMI systemA) What is HDMI ? HDMI (High Definition Multimedia Interface) is wideband transmission interface for not compression digital video and digital audio. The signal of DVD-AUDIO only analog transmission was admitted so far, it is possible to transmit digital signal data by adopting the copyright protection function named HDCP (High-bandwidth Digital Content Protection System). The connection is the couple and an analog connection was replaced to HDMI connection.

B) Basic operation B-1) Sound signal The digital sound data is output to DSP by formatting IEC958 (SPDIF) or IIS. * Compressed data (Dolby Digital, DTS, etc) : IEC958 (SPDIF) output * Liner PCM (96kHz/24bit x 6ch, 192kHz/24bit x 2ch, etc) : I2S output The no sound signal data is output to the HDMI output (For TV). B-2) Video signal The digital video data is output to TV without processing by the receiver.

C) Operation for HDMI selection When select "DVD" from other selector position. * If DVD player connected with the HDMI input is power on, the “HDMI DVD" input is selected and then light on "HDMI LED". Otherwise, “DIGITAL IN" or "ANALOG IN" is selected. HDMI does not operate if nothing is connected to HDMI input even if TV is connected from HDMI output.

10-2. Defective analysis of HDMI systemA) Self-diagnosis for HDMI of SA-XR70

B) Message when error occurred. B-1) Error message displayed on DVD player * U70-1 : Message when it is not possible to communicate between DVD player and HDMI equipment. * U70-2 : Message when communication between DVD player and HDMI equipment was able to

be cut on the way.

Analysis : The communication between XR70 and DVD player is done at the I2C format by "DDC_SCL (JK2001 15pin)" and "DDC_SDA (JK2001 16pin)" on the HDMI input terminal. Therefore, these communication lines are checked.

DVD(S97)

SA-XR70

HD

MI o

ut

HD

MI i

n

HD

MI o

ut T V

HD

MI i

n

U70-1U70-2 U70-1-1

U70-1-2U70-3

Page 52: Technical ManualXR50series0207

52 B-2) Error message displayed on SA-XR70. * U70-1-1 : Message when failing to authentication by HDCP with DVD player or TV with HDMI. * U70-1-2 : Message when video format with DVD player is different. * U70-3 : Message when it is not possible to communicate between TV with HDMI and SA-XR70.

Analysis : "U70-1-2" is due to the error of the communication "DDC_SCL" and "DDC_SDA" on the HDMI input terminal (JK2001). "U70-1-1" is due to the error of the communication "DDC_SCL" and "DDC_SDA" on the HDMI input terminal (JK2001) or the HDMI output terminal (JK2003)."U70-3" is due to the error of the communication "DDC_SCL" and "DDC_SDA" on the HDMI output terminal (JK2003).

--> Usually, the most doubtful one is defective soldering.

C) The video or the sound isn't emitted by the HDMI connection. C-1) The video signal doesn't appear on the screen.

Analysis : The video signal sent from the DVD player is send out to the TV by IC2002 : SiI9190.When the video signal does not screen but the sound signal is normally,checked the peripheral of HDMI output terminal (JK2003) and IC2002.

C-2) The sound doesn't appear from the speakers.

Analysis : The sound signal is output from SPDIF/SD0/SD1/SD2/WS/SCK/MCLKOUT of IC2001 : SiI9031 and sent to the DSP block at pass through IC2009 : SN74LVC244.When the sound of CD and DVD-VIDEO not come out, checked the line of SPDIF. And if the sound of DVD-AUDIO not come out, checked each line of SD0/SD1/SD2/WS/SCK/MCLKOUT.

Page 53: Technical ManualXR50series0207

5310-3. HDMI SYSTEM for SA-XR70

SA-XR70 HDMI SYSTEM

T V

DVD(S97)

HDMI in

HD

MI outDigital Video

Audio 5.1ch

Digital Video

HD

MI in

HD

MI out

Analog Video

Analog Video

VCR

Analog Video

Analog AudioDigital Audio

Digital Amplifier

SA-XR70

T V (STB)

Analog Audio

Analog Video

Digital Audio

SP SP

HDMIDigital Video signal RGB , YCbCr (480i ~ 1080i)

Digital Audio signal Dolby Digital , DTS , AAC LPCM - 33kHz ~ 96kHz/5.1ch 192kHz/2ch

Page 54: Technical ManualXR50series0207

5410-4. HDMI Block Diagram for SA-XR70

SA-XR70 HDMI BLOCK DIAGRAM

HDMI RECEIVERIC2001 SiI9031

HDMIRX 1

TMDSC 0

DDC

TMDSC 1

TMDS

TMDS

HD

MI D

VD

IN

(19pi

n)

5V

HPD

EDID ROMIC2011

BR24L04

HDMIRX 2

HDCPkey ROM

----------HDCP &Repeater

Decryption Q0 - Q23 Hsync Vsync DCLK DE

MCLK LRCLK BCLK I2S0 I2S1 I2S2 SPDIF

VIDEO

AUDIO- ∞

HDMITRANSMITTE

RIC2002 SiI9190

DITIC2005AK4114

M P UIC2003 M30624FGP

S_CKS_SIH_SOCSREQ

TO DSP

TODSPMPU

TOPOWERSUPPLY

BK_3.3VBK_5V

ON : HDMI

OFF : Other Selector

TMDS

I2CSLAVE

HDCPkey ROM

----------HDCP &

Encryption

HD

MI D

VD

IN

(19pi

n)

TMDSC 0

DDC

TMDSC 1

TMDS

TMDS

5V

HPD

HD

MI O

UT (

19pi

n)

TMDSHDMITX

I2CSLAVE

BK_5V

AUDIO

Page 55: Technical ManualXR50series0207

5511. ADDITIONAL INFORMATION11-1. SYSTEM CIRCUIT DIAGRAM FOR SA-XR55A) SA-XR55 is composed as shown in the following whole system circuit diagram.

Page 56: Technical ManualXR50series0207

11-2. Comparison of Specifications 56 Specifications SA-XR55E, EB, EG SA-XR55P, PC SA-XR50P, PC

( '05 Receiver ) ( '05 Receiver ) ( '04 Receiver )GENERAL Category name Digital AV Control Amplifier Digital AV Control Amplifier Digital AV Control Amplifier

(7.1ch Theater) (7.1ch Theater) (6.1ch Theater)Power consumption 135W 135W 135W( In standBy condition ) 0.3W 0.2W 1WPower supply AC230 - 240V /50Hz AC120V /60Hz AC120V /60Hz

Dimensions ( W x H x D ) 430 x 107.5 x 394mm 430 x 107.5 x 394mm 430 x 83 x 376mm(16-15/16" x 4-7/32" (16-15/16" x 3-9/32"

x 15-1/2") x 14-13/16")Weight 4.6kg 4.6kg (10.1 lb.) 4.2kg (9.3 lb.)

DIN Power : 1kHz, T.H.D. 1% 2 x 100W (6 ohm) 2 x 100W (6 ohm) 2 x 100W (6 ohm)

AMPLIFIER Power Output : Front L/R 2 x 100W (6 ohm) 2 x 100W (6 ohm) 2 x 100W (6 ohm) SECTION Each channel Driven Center 100W (6 ohm) 100W (6 ohm) 100W (6 ohm)

1kHz, T.H.D. 0.9% Surround L/R 2 x 100W (6 ohm) 2 x 100W (6 ohm) 2 x 100W (6 ohm)DIN 1kHz T.H.D 1kHz Back (L/R) 2 x 100W (6 ohm) 2 x 100W (6 ohm) 100W (6 ohm)Load impedance Front L/R 6 - 16 ohm 6 - 8 ohm 6 - 8 ohm

Center 6 - 16 ohm 6 - 8 ohm 6 - 8 ohmSurround L/R 6 - 16 ohm 6 - 8 ohm 6 - 8 ohmBack (L/R) 6 - 16 ohm 6 - 8 ohm 6 - 8 ohm

Total harmonic distortion : T.H.D. 0.09% (6 ohm) 0.09% (6 ohm) 0.09% (6 ohm) 20Hz - 20kHzFrequency response : CD /TV /DVD 4Hz - 88kHz, +/- 3dB 4Hz - 88kHz, +/- 3dB 4Hz - 88kHz, +/- 3dB DVD 6ch /DVR /VCR1, VCR2 /TAPEInput sensitivity : CD /TV /DVD 200mV 27mV (200mV, IHF'66) 27mV (200mV, IHF'66) DVD 6ch /DVR /VCR1, VCR2 /TAPEInput impedance : CD /TV /DVD 22k ohm 22k ohm 22k ohm DVD 6ch /DVR /VCR1, VCR2 /TAPES/N ratio : TV /DVD /DVR /VCR1 103dB (IHF, A) 103dB (IHF'66) 103dB (IHF'66) (Digital input)Tone controls Bass 50Hz : +10dB to -10dB 50Hz : +10dB to -10dB 50Hz : +10dB to -10dB

Treble 20kHz: +10dB to -10dB 20kHz: +10dB to -10dB 20kHz: +10dB to -10dBSubwoofer frequency response 7Hz - 200Hz 7Hz - 200Hz 7Hz - 200Hz (-6dB)Digital input terminal Optical 2port 2port 2port

Coaxial 2port 2port 2portDigital output terminal Optical - - - - - - - - 1port

Coaxial - - - - - - - - - - - -FM TUNER Frequency range 87.5MHz - 108.0MHz 87.9MHz - 107.9MHz 87.9MHz - 107.9MHz SECTION

Sensitivity 1.5uV (IHF'58) 11.2dBf (2uV, IHF'58) 11.2dBf (2uV, IHF'58)

Total harmonic Mono 0.2% 0.2% 0.2% distortion : T.H.D. Stereo 0.3% 0.3% 0.3%S/N ratio Mono 60dB 73dB 73dB

Stereo 58dB 67dB 67dBFrequency response 20Hz - 15kHz : +1dB, -2dB 20Hz - 15kHz : +1dB, -2dB 20Hz - 15kHz : +1dB, -2dB

Image rejection at 98MHz 40dB 40dB 40dB

Stereo separation 1 kHz : 40dB 1 kHz : 40dB 1 kHz : 40dB10kHz : --- 10kHz : 30db 10kHz : 30db

Antenna terminal 75ohm (Unbalanced) 75ohm (Unbalanced) 75ohm (Unbalanced)

Page 57: Technical ManualXR50series0207

57 Specifications SA-XR55E, EB, EG SA-XR55P, PC SA-XR50P, PC

( '05 Receiver ) ( '05 Receiver ) ( '04 Receiver )AM TUNER Frequency range 522kHz - 1611kHz (9k) 530kHz - 1710kHz 530kHz - 1710kHz SECTION 530kHz - 1620kHz (10k)

Sensitivity (at 999kHz) 55dB 55dB (20uV, 330uV/m) 55dB (20uV, 330uV/m)

IF rejection at 1000kHz 50dB 50dB 50dB 999kHz

VIDEO Output voltage at 1V input 1V +/-0.1Vp-p 1V +/-0.1Vp-p 1V +/-0.1Vp-p SECTION (Unbalanced) (Unbalanced) (Unbalanced)

Maximum input voltage 1.5Vp-p 1.5Vp-p 1.5Vp-p

Input /Output impedance 75 ohm 75 ohm 75 ohm

S - Video terminal Input TV / DVD /DVD RECORD TV / DVD /DVD RECORD TV / DVD /DVR / VCR1

Output TV Monitor TV Monitor TV MonitorComponent video Input TV /DVD/DVD RECORDERTV /DVD/DVD RECORDERTV /DVD

Output TV Monitor TV Monitor TV MonitorREMOTE Control keys 56 keys 56 keys 56 keysCONTROL UNIT Dimensions ( W x H x D ) 51 x 30 x 195mm 51 x 30 x 195mm 51 x 30 x 195mm

(2 x 1-3/16" x 7-21/32") (2 x 1-3/16" x 7-21/32")Weight 133g 133g (4.7oz.) 133g (4.7oz.)

Power source (UM-3) x 2 (UM-3) x 2 (UM-3) x 2