System synthesis and processor selection in the SES environment in the S 3 E 2 S environment Márcio...

System synthesis and processor selectionSystem synthesis and processor selectionin the Sin the S3EE2S environmentS environment

Márcio Kreutz, Luigi Carro, Flávio Wagner, Marcio OyamadaMárcio Kreutz, Luigi Carro, Flávio Wagner, Marcio Oyamada

SBCCI 99SBCCI 99NatalNatal

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OutlineOutline11•IntroductionIntroduction

•Application and Processors characteristicsApplication and Processors characteristics

•Processors selectionProcessors selection

•Case studyCase study

•ConclusionsConclusions

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IntroductionIntroduction22•Specification, simulation and synthesis of Specification, simulation and synthesis of embedded electronic systemsembedded electronic systems

•Distributed OO modelingDistributed OO modeling•Whole system behaviour describedWhole system behaviour described

•Granularity defined by user as C++ functionsGranularity defined by user as C++ functions

•Abstract behavioursAbstract behaviours•Decomposed into Digital Objects (DO) or Decomposed into Digital Objects (DO) or

Analogic Objects (AO).Analogic Objects (AO).•DO mapped to processorsDO mapped to processors

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Application ModelingSIMOO MET (Model Editor Tool)33

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C++ function specification44

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Application characterization

• An application can be defined by its An application can be defined by its instructions types:instructions types:• control control jump, branch, conditional br.;jump, branch, conditional br.;• memory accessmemory access load, store; and load, store; and• processing operationsprocessing operations add, or, mult add, or, mult

55

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Application characteristicsApplication characteristics66•Type of data usedType of data used•Size of required binary wordSize of required binary word•Maximum allowed execution timeMaximum allowed execution time•Number of requested basic blocks (i.e., contiguous Number of requested basic blocks (i.e., contiguous instructions without a branch)instructions without a branch)•Number of instructions in each basic blockNumber of instructions in each basic block•Number of data points, and how they are stored Number of data points, and how they are stored •(local memory, register, large size memory)(local memory, register, large size memory)•Number of memory acc. in each basic blockNumber of memory acc. in each basic block•Data dependenciesData dependencies

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Functions mapping to processorsFunctions mapping to processors77

•Application and Performance profilesApplication and Performance profiles

•Processor characteristics testing Processor characteristics testing

according to the instructions types as: according to the instructions types as:Control: PPC = CControl: PPC = C

C + M + PC + M + P

Memory: PPM = MMemory: PPM = M

C + M + PC + M + P

Processing: PPP = PProcessing: PPP = P

C + M + PC + M + P

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Processors characteristicsProcessors characteristics88•Size of binary wordSize of binary word•Types of instructionsTypes of instructions•Memory operand accessing modesMemory operand accessing modes•Execution time of each instruction, in clock CyclesExecution time of each instruction, in clock Cycles•Number of busses to access memoryNumber of busses to access memory•Type of memoryType of memory•Number of registersNumber of registers•Control instructionsControl instructions•Use of pipeline and depth of eventual pipelineUse of pipeline and depth of eventual pipeline•Use of harvard architecture or notUse of harvard architecture or not

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Characteristics of tested ProcessorsCharacteristics of tested Processors99# of reg. Control

cyclesMem. Acc.

Cycles# ofbuses

Op. cycles Mult inst.cycles

8051 8 3 2 1 3 48

Risco 32 1+2 2 1 1 1

C25 544 4+2 1(internal) 2 1 1

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Processor selection block diagramProcessor selection block diagram1010

Digital Objects

CDFG

PP for each processor

Mapping

SimulationSIMOO Classes

Processors characteristics

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Processor selectionProcessor selection1111•Processor libraryProcessor library

•each one with specific characterisiticseach one with specific characterisitics•CISC, RISC, DSP, microcontrollers, ...CISC, RISC, DSP, microcontrollers, ...

•How does each processor execute a How does each processor execute a

function function behaviourbehaviour ?? ??•Creation of a CDFG for all functionsCreation of a CDFG for all functions

•to get the application and performance profilesto get the application and performance profiles

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Loop

MUL MUL

ADD

Vel1Vel1

Int1 Int2

Int3

ADD

Int4

DIV

22

Int5

MUL

Tsampling

meanmean

Vel_prev

ATTRIB

velvel

ATTRIB

Vel_prevVel_prev

Acel_vAcel_v Acel_h Acel_h

CALL

Control

Data flow

PODOS integration CDFGPODOS integration CDFG

Control

Processing

Memory access

1212

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Case studyCase study1313 PODOS Integration algorithmPODOS Integration algorithm

for(int i; i < n; i++) {

vel1= sqrt((acel_v*acel_v) + (acel_h*acel_h));

mean = (((vel_prev + vel1)/2) * Tsampling);

vel_prev= vel1;

vel = mean;

}

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vel_prev= vel1;

vel = mean;

}

Memory accesses: 4 READ and 2 WRITE

Memory access cycles

8051 Risco C25

6 * 2 2 1

12 12 6 / 2 buses = 3

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Case studyCase study1515PODOS Integration algorithmPODOS Integration algorithm




vel_prev= vel1;

vel = mean;

}

7 REG accesses

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vel_prev= vel1;

vel = mean;

}

3 MULT operation

Processing cycles

8051 Risco C25

3 * 48 1 1

96 3 3

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mean = (((vel_prev + vel1) / 2) * Tsampling);

vel_prev= vel1;

vel = mean;

}

1 DIV operation

Processing cycles

8051 Risco C25

1* 48 1 1

48 1 1

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vel_prev= vel1;

vel = mean;

}

3 ADDs

Processing cycles

8051 Risco C25

3* 3 1 1

9 3 3

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vel_prev= vel1;

vel = mean;

}

2 ATTRIB

Processing cycles

8051 Risco C25

2* 3 1 1

6 2 2

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vel_prev= vel1;

vel = mean;

}

2 Control operations

Control cycles

8051 Risco C25

2* 3 1 4

6 2 8

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Podos Integration results

0

0,1

0,2

0,3

0,4

0,5

0,6

0,7

0,8

0,9

8051 Risco C25 AP

Control

Memory

Processing

2121

Performance Profiles

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Digital Filter results

0

0,1

0,2

0,3

0,4

0,5

0,6

0,7

0,8

8051 Risco C25 AP

Control

Memory

Processing

2222


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0

0,1

0,2

0,3

0,4

0,5

0,6

0,7

8051 Risco C25 AP

Control

Memory

Processing

Dot Product Results2323


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ConclusionsConclusions2424•Synthesis based on a library of processorsSynthesis based on a library of processors

•Exploration of the characteristics of all Exploration of the characteristics of all function presented in applicationfunction presented in application

•Mapping to processors made through Mapping to processors made through processors characteristicsprocessors characteristics

•multiprocessor systemmultiprocessor system

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2525•Distributed protocol selection and Distributed protocol selection and synthesissynthesis

•Merge objects in processorsMerge objects in processors

•Code generationCode generation

•SIMOO MET integrationSIMOO MET integration

Future worksFuture works

System synthesis and processor selection in the SES environment in the S 3 E 2 S environment Márcio...

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