STATEFLOW AND SIMULINK TO VERILOG COSIMULATION OF SOME EXAMPLES Student: Pham Van Dung Professor:...

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STATEFLOW AND SIMULINK TO VERILOG COSIMULATION OF SOME EXAMPLES Student: Pham Van Dung Professor: Chi-Jo Wang

Transcript of STATEFLOW AND SIMULINK TO VERILOG COSIMULATION OF SOME EXAMPLES Student: Pham Van Dung Professor:...

Page 1: STATEFLOW AND SIMULINK TO VERILOG COSIMULATION OF SOME EXAMPLES Student: Pham Van Dung Professor: Chi-Jo Wang.

STATEFLOW AND SIMULINK TO VERILOG

COSIMULATION OF SOME EXAMPLESStudent: Pham Van DungProfessor: Chi-Jo Wang

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Overview

1. Project Description2. HDL Simulink coder3. Simulink Toolbox and Implementation

1. Introduction2. PID3. Park Transform

4. Stateflow Toolbox and Implementation1. Introduction2. Sum of Product

5. Conclusion1. Limitations2. Future work References

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Project Description

In recently years, a new methodology for designing chips was in the middle stages of development at some Research Center all over the world. It was conceived to change many of the perceptions and experiences associated with building the digital portion of such a device. This research effort was to find a way to quickly and reliably build direct-mapped hardware. Such an approach would yield much shorter design cycles and benefit from the increased energy efficiency of dedicated hardware.

It was this realization that spawned this research project. HDL Simulink coder, a Stateflow and Simulink to HDL translator, was designed to convert a description of a state machine or simulink model into a hardware description (HDL). The goal of this project was to provide a quick and easy path from state machine description or Simulink model to hardware with a reasonable amount of area and power inefficiency over hand-written VHDL.

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HDL Simulink coder

HDL Coder generates portable, synthesizable Verilog and VHDL code from MATLAB functions, Simulink models, and Stateflow charts. The generated HDL code can be used for FPGA programming or ASIC prototyping and design.

HDL Coder provides a workflow advisor that automates the programming of Xilinx and Altera FPGAs. You can control HDL architecture and implementation, highlight critical paths, and generate hardware resource utilization estimates. HDL Coder provides traceability between your Simulink model and the generated Verilog and VHDL code, enabling code verification for high-integrity applications adhering to DO-254 and other standards.

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Simulink Toolbox and Implementation

Simulink, as shown in Fig 1, also developed by MathWorks, is a commercial tool for modeling, simulating and analyzing multi domain dynamic systems. Its primary interface is a graphical block diagramming tool and a customizable set of block libraries. It offers tight integration with the rest of the MATLAB environment and can either drive MATLAB or be scripted from it. Simulink is widely used in control theory and digital signal processing for multi-domain simulation and Model-Based Design.

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Vehicle Electrical and Climate Control Systems using Simulink toolbox

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PID and Implementation

A “proportional–integral–derivative controller” (PID controller) shown in Fig 2 is a generic control loop feedback mechanism (controller) widely used in industrial control systems. It is the most commonly used feedback controller. It calculates an "error" value as the difference between a measured process variable and a desired setpoint. The controller attempts to minimize the error by adjusting the process control inputs.

PID controller

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e(n)K(n)u pp

1)-e(nK1)-(nu(n)u iii

)n(eK)n(eK)n(u

(n)u(n)u Yn(n)

ipi

ip

11

Where Kp is proportional gain

and Ki is integral gain.

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