Specifications, Design and Performance

MDT-ASD PRR

C. Posch 1 30-Aug-02

Specifications, Design and Performance

SpecificationsFunctional

Analog

ArchitectureAnalog channel

Programmable parameters, serial control port

Prototyping - measurements and testsFunctionality and performance test results

Overview

MDT-ASD PRR


Functional Specifications

Leading edge timing measurementGoal: single tube position resolution 80 m

Charge measurement Pulse width encoding - Wilkinson ADC, for time slew correction

Modes of operation Time-over-Threshold (ToT) mode ADC mode

Plus: Calibration/Test pulse injection Channel modes: Boundary scan Programmability of analog and functional parameters Serial control data I/O, communication protocol

MDT-ASD PRR


Analog Specifications

Gain: 3 mV/ primary e- (~10 mV/fC) Dynamic Range (linear): 1.5 V (500 primary e- )

Peaking time: 15 ns Shaping: bipolar, area balance < 500 ns Input impedance: ZIN = 120 Noise: ENC < 6000 e- (~ 4 primary e-) Crosstalk: Channel-channel, < 1% Signal path: differential Power supply: Single, 3.3 V Power consumption: < 35 mW/channel

MDT-ASD PRR



Analog




Architecture

MDT-ASD PRR


Analog Channel – block diagram

MDT-ASD PRR


Wilkinson Charge ADC

Signal Rundown

S1ASD output pulse information:

edge timingwidth charge

• A Wilkinson type ADC measures the charge in the leading edge of the MDT signal within a given time window and encodes it into a pulse width. (Charge-to-Time Conversion)

• The information will be used for time slew correction.

• Other applications: Diagnostics, chamber monitoring, dE/dx, …

MDT-ASD PRR


Calibration pulse injection

MDT-ASD PRR


Programmable Parameters I

Timing Discriminator Threshold:

Range: -256 – 256 mV Resolution: 2 mV (8-bit) Nominal: +60 mV (20 primary e-)

Hysteresis: Range: 0 – 20 mV Resolution: 1.33 mV (4-bit) Nominal: 10 mV

Wilkinson Charge ADC Integration Gate:

Range: 8 – 45 ns Resolution: 2.5 ns (4-bit) Nominal: 14.5 ns

“Run-down” current: Range: 2.4 – 7.3 A Resolution: 0.7 A (3-bit) Nominal: 4.5 A

Discriminator Threshold: Range: 32 – 256 mV Resolution: 32 mV (3-bit) Nominal: 32 mV

MDT-ASD PRR


Programmable Parameters II

Dead Time: ADC mode: Logic does not accept/process new hit Range: 300 - 800 ns Resolution: 70 ns (3-bit) Nominal: 800 ns

Calibration/Test Pulse Injection Range: 10 - 80 fC (50 – 400 fF Caps @ LVDS 200mV) Resolution: 10 fC (3-bit) Each channel individually selectable (8-bit mask register) “Delayless” (RC time constant 150 ps)

Chip Mode: Time-over-Threshold (ToT), ADC mode

Channel Output Mode: Active, Set HI, Set LO

Total number of setup bits: 53 Serial I/O, shift + shadow registers, daisy chain

MDT-ASD PRR

C. Posch 10

30-Aug-02

Full custom design (standard cells in serial data interface)

I/O pads ESD protected Die 3.2 × 3.7 mm, 70

bonding pads QFP80 package Fabrication process:

0.5 m CMOS, triple-metal, 1 poly, N-well, Analog option with linear capacitor, silicide block for poly resistors (HP AMOS14TB)

Fabrication process, layout

MDT-ASD PRR

C. Posch 11

30-Aug-02


Analog




Prototyping - measurements and tests

MDT-ASD PRR

C. Posch 12

30-Aug-02

DC Measurements

Scan pre-amp bias network DC levels - possible to extract transistor parameters (Kp, V0)

VDD and GND levels at equally spaced test points along the pre-amplifier power bus

Power bus voltage drop

3.245

3.2475

3.25

3.2525

3.255

3.2575

3.26

3.2625

3.265

1 2 3 4 5 6 7 8 9 10 11

test point #

VD

D p

oten

tial [

mV

]

0

2

4

6

8

10

12

14

16

18

20

GN

D p

oten

tial [

mV

]

Pre-amp bias network voltages

0

0.5

1

1.5

2

2.5

3

-500 -300 -100 100 300 500

deviation from working point[uA]

bias

vol

tage

[V]

vb1 vb2

vb3 vb4

MDT-ASD PRR

C. Posch 13

30-Aug-02

Sensitivity

Sensitivity:10 mV/fC

Probe attenuation 10:1Single ended pulses,40, 60, 80, 100 fC

1000

800

600

400

200

sha

pe

r p

ea

k vo

ltag

e [m

V]

10080604020input charge [fC]

W_coef={27.067,10.042}W_sigma={5.47,0.0882} Gain = 10.042 mV/fC

MDT-ASD PRR

C. Posch 14

30-Aug-02

Bipolar Shaper

Area balance after 400 ns

Shaper pulse

Integral

ToT mode shaper pulse reconstruction + theoretical fit

MDT-ASD PRR

C. Posch 15

30-Aug-02

10

8

6

4

2

0

time

sle

w [n

s]


Time Slew

Time slew for expectedinput signal range of theorder of 2 – 3 ns

Discriminator time walk

-0.2

0

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

0 50 100 150 200 250 300

DISC1 threshold = 50% of shaper pulse amplitude [mV]

Dis

crim

inat

or t

ime

wal

k [n

s]

MDT-ASD PRR

C. Posch 16

30-Aug-02

Non-linear converter transfer characteristic (compressive)

Calibration per single tube: ch-ch variations variable parameter settings

nominal threshold

200

150

100

50

Wilk

inso

n p

ulse

wid

th [n

s]


Gate time: 8 ns 15 ns 25 ns 45 ns

Charge Measurement: Wilkinson ADC

MDT-ASD PRR

C. Posch 17

30-Aug-02

Wilkinson output pulse - 48 channelsfor typical settings and input signal

Channel - Channel Variations

0

2

4

6

8

10

12

14

16

18

75 86 96 107 118 129 139 150

MEAN: 110SIGMA: 12.46

11.33%

0

2

4

6

8

10

12

14

620 640 660 680 700 720 740 760 780

Deadtime window - 48 channelssame settings and input signal

MEAN: 701SIGMA: 40.6

5.79%

MDT-ASD PRR

C. Posch 18

30-Aug-02

Main Threshold DAC

8-bit VDACRange: 512 mVLSB: 2 mVMAX diff. Nonlin.: 250 VMAX int. Nonlin.: 1.5 mV

8-bit voltage DAC (threshold) - transfer characteristic

-256

-192

-128

-64

0

64

128

192

256

0 32 64 96 128 160 192 224 256

input code (decimal)

ou

tpu

t vo

ltag

e [m

V]

8-bit voltage DAC - differential non-linearity

-0.3

-0.2

-0.1

0

0.1

0.2

0.3

0 32 64 96 128 160 192 224 256


DN

L e

rro

r [m

V]

8-bit voltage DAC - integral non-linearity

-0.5

0

0.5

1

1.5

2

0 32 64 96 128 160 192 224 256


INL

err

or

[mV

]

MDT-ASD PRR

C. Posch 19

30-Aug-02

Power Consumption

Power consumption vs. Vdd

29.898

35.046

22

24

26

28

30

32

34

36

38

40

42

2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.6

supply voltage Vdd [V]

po

we

r co

nsu

mp

tion

[mW

]

Power consumption with loaded and unloaded LVDS drivers

MDT-ASD PRR

C. Posch 20

30-Aug-02

Noise behaviour and non-systematic errors

Time Measurement The timing information carried by the ASD output signal is recorded and

converted by the AMT (Atlas Muon TDC) time-to-digital converter at a resolution of 0.78 ns.

Charge Measurement The AMT can be set to provide a dynamic range for the pulse width

measurement of 0 - 200 ns with a bin size of 0.78 ns. If the ASD is programmed to produce output pulses up to a maximum of

200 ns, then the combination of the ASD and the AMT chip represents a charge-ADC with a resolution of 7 - 8 bits.

Non-systematic errors in the timing and charge measurement due to electronic noise in the ASDs and AMTs, and quantization errors set a limit to the performance of the system.

MDT-ASD PRR

C. Posch 21

30-Aug-02

1.0

0.8

0.6

0.4

0.2

0.0

(le

ad

ing

ed

ge

) [n

s]


no termination 380 Ohm TR

Time measurement

The time-to-digital conversion in the AMT shows a RMS error of 305 ps, including 225 ps of quantization error . The resulting total error of the time measurement, covering all noise sources from the front-end down to the A/D conversion, will typically be of the order of 360 ps RMS.

Measured RMS error of the leading edge time measurement at the output of the ASD as a function of threshold overdrive.

(Y. Arai)

MDT-ASD PRR

C. Posch 22

30-Aug-02

Charge measurement

The pulse-width conversion in the AMT has a RMS error of 430 ps (including quantization error). The resulting total error of the charge measurement, covering all noise sources from the front-end down to the A/D conversion, will typically be < 800 ps RMS. This corresponds to a typical error of well below 1% of the measured charge for the vast majority of signals

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0.0

(p

ulse

wid

th)

[% o

f me

asur

ed

cha

rge

]


Integration Gate [ns] 11 13.75 17.5

380 Ohm TR

2.0

1.5

1.0

0.5

0.0

(pul

se w

idth

) [%

of m

eas

ure

d ch

arg

e]


no termination 380 Ohm TR

integration gate: 11 ns

MDT-ASD PRR

C. Posch 23

30-Aug-02

Measurement Errors - Summary

Time Measurement

Total noise in the range of 360 ps RMS (typical)

Charge Measurement

Total noise in the range of << 1% of measured charge

All other sources of error in the readout electronics are systematic e.g. converter non-linearties, channel-channel variations

Can in principle be calibrated out to any extent (automatized, using the pulse injection system)

MDT-ASD PRR

C. Posch 24

30-Aug-02

Known Issues

Floating Substrate Guard Ring One of the guard ring structures composed of substrate contacts was

unintentionally left unconnected (floating). No adverse effects have been noticed.

Programmable Deadtime The artifical deadtime window at its maximum setting has a mean length of ~

700 ns for a typical input signal. This is of the order of the maximum drift time. This could be an issue if different gas mixture or pressure than nominal is being used.

MDT-ASD PRR

C. Posch 25

30-Aug-02

Conclusions

Final ATLAS MDT front-end prototype fabricated and successfully tested

Shows complete functionality, meets all design specifications design ready for production

ATLAS demand: 46,000 pieces Automatic PCI bus production tester in

preparation

Specifications, Design and Performance

Documents

Transcript of Specifications, Design and Performance