Some challenges in strain metrologyfor IC manufacturing -The case of X-ray

topography

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topography

Dr. Juan J Perez-CamachoIntel Ireland Analytical Labs

April 2010

Contents

• Moore’s law:– Recent innovations at Intel.• Strained Silicon• High-k + Metal Gate

• 2010 vs 2003 ITRS strain metrology requirements

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requirements• Some diverging drivers• Options for extension of stress/strain metrology• The case of X-ray topography

– Silicon Damage– Packaged and stacked ICs

40 Years of Moore’s Law at Intel:

3Source: M.Bohr, 09, Intel

Strained transistors

• “The unexpected acceleration of the use of strained silicon without SOI has resulted in new metrology and characterization requirements earlier than expected in the 2001 Roadmap.”

(ITRS 2003, Metrology Chapter)

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(ITRS 2003, Metrology Chapter)

• Intel made a significant breakthrough in the 90nm process generation by introducing strained silicon on both the NMOS and PMOS transistors.

http://www.intel.com/pressroom/kits/advancedtech/

Introduction of Intel’s Uniaxial Strain Silicon Transistor technology

5Source: T.Ghani, 09, Intel

Strain Silicon Techniques

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Source: M. Bohr, Intel, “The Invention of Uniaxial Strained Silicon Transistors at Intel”, 2007.http://download.intel.com/pressroom/kits/advancedtech/pdfs/Mark_Bohr_story_on_strained_silicon.pdf

45nm High-k + Metal Gate Transistors

7Source: T.Ghani, 09, Intel

Intel Logic Technology Roadmap

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•Strained Transistor technology is well-established.•The introduction of 32nm represents the fourth generation of strain technology at Intel.

Four generations of strained Silicon

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The ITRS update on strain metrology

10Source: A.C. Diebold , “ITRS Chapter: Metrology for the Semiconductor and PV Industries”, Future Fab International, Issue 32, Jan 2010, www.future-fab.com

Divergent drivers in the ITRS roadmap for strain/stress metrology?

WaferSize(linear)

300 mm

450 mm

Ignoring other dimensions: sensitivity, measurement time, effect of sample preparation, etc …

Requirement to apply to bigger samples/wafers.

CoherentGradientSensing

SIRD

XRT

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Confocal Raman

Feature size (Log) [Moore’s law]

AtomicNanoMicromm

200 mm

Requirement to increase resolution.

SensingSIRD

XRD

Photo-reflectance

Laser Interferometry

Die level flatness

EBSDSEM

CBED(TEM)

NBD(TEM)TERS

Can we add other techniques or extend the existing ones?

Some of the options:

• Develop techniques with a very large dynamic range.

• Correlate macro techniques to nano techniques.

• Use simulation to extend from what we measure to what we need to

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• Use simulation to extend from what we measure to what we need to know.

• Design for strain metrology: tailor the metrology test structures to the available techniques.

• Extend to the nano scale those techniques which have been successfully used for decades in the macroscopic characterization of materials.

What about stress during processing?

• Global wafer conditions affect the results of local processing.

• This might have been ignored to a large extend.

• Our understanding is not necessarily scalable.

• Global strain interacts with local features.

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• Global strain interacts with local features.

• At molecular level, matter is not a continuum.

• How are the processing conditions, the device properties, and the system behavior affected by stress and strain during processing?

ProcessingConditions

Device Properties

System Behavior

The atomic origins of surface stress

• Surface stress is an important factor, required to understand & control atomic surface phenomena.

• What is the effect of wafer level stress on local processing?

Sample Bending

e.g. Halogen

Si sample

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• What is the effect of local processing on wafer level stress?

Sample Bending

Tensile Surface Stress

Compressive Surface Stress

Courtesy: Niall Kinahan, David Meehan, Tetsuya Narushima, & John J. Boland, (CRANN)

STM & SSM

System for simultaneous STM and SSM

xP

yP

zP

TJ

e.g. Halogen

Sample Pusher to artificially apply stress

Conventional stable STM

Cantilever bending method using capacitance detection

15Tetsuya Narushima, Niall T. Kinahan, John J. Boland, Rev. Sci Instrum. 78, 053903 (2007).

Oxidation start Stop

X-ray topography (XRT)or

X-ray diffraction imaging (XRDI)

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X-ray diffraction imaging (XRDI)

A case study

The problem: “Silicon damage, due to wafer handling, may

result in wafer breaks”

• How does the damage look like?• What is the risk of fracture?• How do we characterize the damage in order to assess the risk of fracture?

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the risk of fracture?

• This is an example of the divergent drivers:– A requirement to apply characterization to full wafers.– A requirement to have a good resolution in the characterization.

Wafer handling impacts: how do they look?

Impact at

Defects act as global stress

concentrators & could result in wafer fracture.

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Impact at this level

SEM

What is the risk of crack propagation?

• Fracture mechanics: critical crack sizes of Si wafers as a function of thin-film stress level and/or wafer curvature during processing.

• Only valid for moderate temperatures.

• Temperature induced slip band

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• Temperature induced slip band nucleation (during rapid thermal annealing) not considered.

Source: J. M. Molina-Aldareguia & J. Segurado, “Analytical Determination of Critical Crack

Sizes in Si wafers”, Intel European Research and Innovation Conference, Leixlip, September

2008

t = critical crack size

Some of the options for anassessment of mechanical damage?

“X-ray topography is another technique offering promise for defect detection.” (ITRS 2007)

WaferSize(linear)

300 mm

450 mm

CoherentGradientSensing

SIRD

XRT

20Feature size (Log) [Moore’s law]

AtomicNanoMicromm

200 mm

Confocal Raman

SensingSIRD

TERS

TEM

300 mm wafer analysis: Coherent Gradient Sensing (CGS) Infrared Depolarization (SIRD)

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C.-E. Rousseau, “Critical Examination of the Use of Coherent Gradient Sensing in Measuring Fracture Parameters in Functionally Graded Materials”, Journal of Composite Materials 2006; 40; 1763

Geiler et al., “Photoelastic stress evaluation and defect monitoring in 300-mm-wafer manufacturing”, Materials Science in Semiconductor Processing, Volume 5, Issues 4-5, August-October 2002, Pages 445-455.

300 mm wafer analysis: X-ray Topography

•White beam topography•Laue pattern, each reflection a topograph of the same crystal position

22Courtesy: Dr. A. Danilewsky & ANKA synchrotron

Plan view

Position of slit

300 mm wafer analysis: lab vs synchrotron

Lab based XRT Synchrotron XRT

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Section topographs

Courtesy: Prof. P. McNally (DCU), Dr. A. Danilewsky (Freiburg Univ)

300 mm Si quality evaluation:Synchrotron XRT digital vs film – Section Transmission

Film

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A. N. Danilewsky, J. Wittge, A. Rack, T. Weitkamp, R. Simon, P. McNally, “White Beam Topography of 300 mm Si – Wafers”, 12th International Conference on Defects-Recognition, Imaging and Physics in Semiconductors (DRIP XII), Berlin, (2007)

DigitalCamera

SIDAM, an EU funded research project on Silicon Damage

• Consortium led by:– Prof. Brian Tanner & Prof. Keith Bowen (Durham University)

• Participants: – Dr. Reyes Elizalde, CEIT, San Sebastian.– Dr. Andreas Danilewsky, Freiburg Univ– Prof. Patrick McNally, Dublin City University– Prof. Tilo Baumbach, ANKA Synchrotron, Karlsruhe– David Jacques et al.. Jordan Valley Semiconductors UK

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• Goal: How to derive quantitative, predictive information from the XRDI images, about defects which are probably going to be critical, thus enabling a new metrology of wafer inspection.

• Aim: Preventative metrology, to diagnose catastrophic failure in problem-solving mode and to qualify tools and handling procedures against the introduction of “killer” micro-cracks.– quantification of the XRDI images, – modeling of the stress patterns introduced by the various defects, – modeling of the influence of different thermal gradients in RTA processes upon the defects concerned.

Crack trace

Lateral crack, scallop or chip

Contact impression

Controlled nano-indentation to simulate impact

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Shear faults

Courtesy: Dr. A. Danilewsky (Freiburg Univ) & Dr. R. Elizalde (CEIT, San Sebastian)

Nano-indent induced strain fields

• Relatively isotropic strain fields.• Good correlation with preliminary

Finite Element Analysis.• There seems to be a minimum

critical loading below which cracking will not initiate.

Transmission

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D. Allen et al. , Nuclear Instruments and Methods in Physics Research B, 268 (2010) 383-387.

Reflection

Imaging indents by cross section XRT

Cross section

28Courtesy: Prof. Courtesy: Prof. P.McNally (DCU), Dr. R. Elizalde (CEIT), P.McNally (DCU), Dr. R. Elizalde (CEIT), and Dr. Danilewsky (Freiburg)and Dr. Danilewsky (Freiburg)

High temperature in situ XRT study of controlled nano-indents

• 100-500 mN• A small number of 60º

dislocations originate at the micro-cracks.

• No bundles, & no slip bands for temp <800 C

Double ellipsoidal mirror at ANKA

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Courtesy: Dr. Danilewsky (Freiburg)

A. Danilewsky et al. , Nuclear Instruments and Methods in Physics Research B, 268 (2010) 399-402.

Small samples

XRT of 200 mm wafers with controlled indents and RTA cycle

• <200 mN• Substantial slip in [001] and [010]

directions after 1000 C plateau annealing, with no correlation to indents.

30Fig. 6: BedeScan image of the full 200 mm wafer that had been subjected to plateau annealing. reflection, MoKα radiation. (100) Wafer, notch <011>.

Fig. 1 (b): Plateau annealing sequence

J. Wittge et al., X-ray diffraction imaging of dislocation generation related to microcracks in Si-wafers, 58th Annual Conf.on Applications of X-ray Analysis : Denver X-ray Conf., Colorado Springs, July 27-31, 2009

200 mm wafers

Plateau annealing

Nucleation of dislocations at indentsafter Rapid Thermal Annealing

• For >500 mN• Some indents had acted as the generation points for spectacular sources.

Indent

Indent generated series ofdislocation loops

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]040[ Fig. 7: Transmission white beam image of slip bands and dislocation sources associated with 500mN indents after plateau annealing. 040 reflection.

X

Y Z

generated dense slip band

Wittge et al., “X-ray diffraction imaging of dislocation generation related to microcracks in Si-wafers”, 58th Annual Conf.on Applications of X-ray Analysis, Colorado Springs, 2009

Wafer damage metrology - conclusions

• Silicon damage is typically due to wafer handling.

• Increased thermal ramp rates associated with device manufacturing reinforce the need for wafers without mechanical integrity defects, which act as stress concentrators & result in wafer fracture.

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• Wafer handling and edge defect characterization metrologies must be optimized to prevent wafer failure.

• Current research on how to derive quantitative, predictive information from XRT/XRDI images, may enable a new preventative metrology of wafer inspection.

Stacked Si: Synchrotron XRT –in commercially available Organic Packages

Collaboration with Prof. P. McNally (DCU), and Dr. A. Danilewsky (Freiburg) at ANKA Synchrotron, Karlsruhe

33Large area back reflection section topograph, using the (-2 2 8) reflection

X-ray radiography

• External cover and battery removed.

• No sample prep.

Mobile phone!

X-ray radiography

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Mobile Phone: Synchrotron XRT

X-ray radiography

X-ray topography

• External cover and battery removed.

• No sample prep.

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Collaboration with Prof. P. McNally (DCU), and Dr. A. Danilewsky (Freiburg) at ANKA Synchrotron, Karlsruhe

• No cover, battery on. • The Mobile was actually on!

Mobile Phone:Synchrotron XRT

Laue pattern

Position of slit

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