Solid-State Imaging: Architectures and Techniques · Active Pixel Sensor (APS) @ r o w d e c o d e...

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Solid-State Imaging: Solid-State Imaging: Architectures and Techniques Architectures and Techniques E. Charbon & P. Seitz E. Labonne Swiss Federal Institute of Technology, Lausanne Institute of Microtechnology, University of Neuchâtel CSEM Research Center for Nanomedicine, Landquart

Transcript of Solid-State Imaging: Architectures and Techniques · Active Pixel Sensor (APS) @ r o w d e c o d e...

Page 1: Solid-State Imaging: Architectures and Techniques · Active Pixel Sensor (APS) @ r o w d e c o d e r (s c a n c i r c u i t) ADC n bits Column decoder (scan circuit) row

Solid-State Imaging:Solid-State Imaging:Architectures and TechniquesArchitectures and Techniques

E. Charbon & P. SeitzE. Labonne

Swiss Federal Institute of Technology, LausanneInstitute of Microtechnology, University of NeuchâtelCSEM Research Center for Nanomedicine, Landquart

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CMOS Imagers

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• Provide an introduction to the design and analysisof CMOS image sensors

• Develop basic understanding of the performancemeasures and tradeoffs involved in the design ofthe CMOS imagers

Objectives

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• A. Theuwissen, “Solid-State Imaging with CCDs”,SSS&T Library, 1995

• P. R. Gray, P. J. Hurst, S. H. Lewis, R. G. Meyer,“Analysis and Design of Analog Integrated Circuits(4th ed.)”, Wiley, 2001

• P. E. Allen, D. R. Holberg, “CMOS Analog CircuitDesign (2nd ed.)”, Oxford University Press, 2002

Textbooks

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Outline

1. Introduction

2. Non-idealities

3. Performance

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• CMOS imager chain (pixels matrix / amplifier / converter)

• CMOS imager features and readout principles

• Different types of photo detectors

• Pixel features (few transistors, pixel size, fill factor)

• Matrix features (spatial resolution, readout speed, dynamic

range, conversion gain, noise)

• Main pixel architectures

1. Introduction

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CMOS Imager ChainCMOS imagers convert photons onto an electric signal.

Analog

voltagex MUX

Amplification part

Photons ADCPhoto -currentDigital

signal

pixelAnalog

voltagex MUX

Amplification part

Photons ADCPhoto -currentDigital

signal

pixel

1D Imager 2D Imager

Pixels array

Column Amplifiers

row

de

co

de

rColumn decoder

ADC

Pixels row

Column Amplifiers

Column decoder

ADC

Apps:Scanner, photocopier, fax,…

Apps:Camera, video camera, …

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@<row>

pixel ro

w d

ecod

er

Sample & Hold

Sample& Hold

Sample& Hold

ADC nbitsColumn decoder

pixel

pixel

pixel

pixel

pixel

pixel

pixel

pixel

pixel

pixel

pixel

row i-1

row i+1

row i+2

@<col>

col j col j-1 col j+1

row i

2D CMOS Imager Readout

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CMOS Imager Features

OPTIMUM

Photo detector area the larger

PIXEL Sensitivity the higher

Pixel size the smaller

Fill factor the bigger

MATRIX Pixels number the larger

Noise the smaller

Conversion gain the higher

IMAGER SNR the higher

FEATURES Dynamic range the higher

Readout speed the higher

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CMOS Imager Features

OPTIMUM

Photo detector area the larger

PIXEL Sensitivity the higher

Pixel size the smaller

Fill factor the bigger

MATRIX Pixels number the larger

Noise the smaller

Conversion gain the higher

IMAGER SNR the higher

FEATURES Dynamic range the higher

Readout speed the higher

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PhotodetectionPhotodetector

→ converts photons in electron-hole pairs:

Photodetector choice depending on:

• Target wavelength• Quantum efficiency• Sensitivity• Absorption and reflection coefficients

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Quantum Efficiency

Wave length _ (µm)

Visible light

ultra violets infra rouges1010.1

Quantum efficiency (%)

Wave length _ (µm)

Visible light

ultra violets infra rouges1010.1

Quantum efficiency (%)Quantum efficiency (%)

Quantum Efficiency (η) ratio betw. photo-generated andcollected electron-hole pairs and number to incidentphotons number ratio Silicon is a good candidate

Picture from J-L VERNEUIL Ph.D (Limoges University, 2003)

UV IR

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Sensitivity

Sensitivity (S) defines the generated photocurrent to theincident light flux ratio.

Wave length _ (µm)1.71.10.7 1.51.30.9

1.0

0.8

0.6

0.4

0.2

0

Sensitivity (A/W)

QE

SiGe

InGaAs

90%

70%

50%

30%

10%

Picture from J-L VERNEUIL Ph.D (Limoges University, 2003)

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Silicon Photodetectors

• Photoconductor• Metallurgical junction

– Photodiode– Avalanche photodiode– Pinned photodiode

• Voltage induced junction– Bipolar photogate– MOS photogate

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Photoconductors

Req

ID

Req

ID

Physicaldevice

Symbol Electric characteristic

P

VD

photons

P

VD

photons Résistance

1,E+05

1,E+06

1,E+07

1,E+08

1,E+09

1,E-02 1,E-01 1,E+00 1,E+01 1,E+02 1,E+03

Résistance

Resistance Req(Ω)

Luminosity (lux)10-2 10-1 100 101 102 103

108

107

106

105

104

Si

+ high sensitivity

- non-linear characteristic

- - high response time

Applications fields:

• devices count

• mechanism monitoring (switch)

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Photodiode

+ linear sensitivity

+ short response time

- dark current

Applications fields:

• photometry

•light pulses measures

Photodiode response

in function of the luminosity

Physical device

Symbol

Higher luminosity

Dark

Low luminosity

VD

Idark

Iph1

Iph2

ID

working area

Vbreakdown

P

N

Iph

VD

photons

ID

VD

ID

VD

Si

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Avalanche Photodiode

+ + photon sensitive

- - higher shot noise

Applications fields:

• precision imaging(fluorescence detection)

• high speed imaging

Avalanche Photodiode

response

VD

Idark

ID

working area

(Geiger mode)

Vbreakdown

Physical device Symbol

P

N

Iph

VD

photons

ID

VD

ID

VD

Si

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Pinned Photodiode

+ + high sensitivity

- response time

Applications fields:

• photometry

Photodiode response

for 3 different luminosities

Higher luminosity

Dark

Low luminosity

VD

Idark

Iph1

Iph2

ID

working areaPhysical device

Symbol

P

N

Iph

VD

photons

ID

VD

ID

VD

Si

IBuried N

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Bipolar Photogate

+ linear sensitivity

- high dark current

- temperature sensitivity

Applications fields:

• Photometry

• Mechanism monitoring(ex: switch)

N

PIph

VD

photons

N

SymbolPhysical device

Ic

VD

Ic = _.Iph + Idark

dark

Low luminosity

VD

Idark

_Iph

Ic

IC/ V

DPhotoMOS characteristic

N

PIph

VD

photons

N

N

PIph

VD

photons

N

SymbolPhysical device

Ic

VD

Ic

VD

Ic = _.Iph + Idark

dark

Low luminosity

VD

Idark

_Iph

Ic

Ic = _.Iph + Idark

dark

Low luminosity

VD

Idark

_Iph

Ic

IC/ V

DPhotoMOS characteristic

Si

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MOS Photogate

+ linear sensitivity

- high dark current

- temperature sensitivity

Applications fields:

• Photometry

• Mechanism monitoring(ex: switch)

Iph

VGphotons

N

SymbolPhysical device PhotoMOS characteristic ??

N

poly

Iph

VGSID

VD

ID

VD

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CMOS Imager Features

OPTIMUM

Photo detector area the larger

PIXEL Sensitivity the higher

Pixel size the smaller

Fill factor the bigger

MATRIX Pixels number the larger

Noise the smaller

Conversion gain the higher

IMAGER SNR the higher

FEATURES Dynamic range the higher

Readout speed the higher

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Pixels

Fill factorRtio betw. light sensitive area and pixel area ratio (%)

Pixels integrate the photo detector and few transistors

fill factor ~40% fill factor 20% fill factor 9%T. Chen et al, "How small should pixel size be?"

Proceedings of the SPIE Electronic Imaging 2000

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Pixels

Pixel design is a trade-off between silicon area and imagerperformances:

• photo detector area (cost / fill factor / sensitivity)

• pixel area (cost / performances: technology, speed, SNR,number of functionalities and so number of transistors insidethe pixel)

Pixel architecture evolution PPS APS DPS Passive Pixel Sensor Active Pixel Sensor Digital Pixel Sensor 1T/pixel 3T, 4T, 5T/pixel… ~100T/pixel

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Passive Pixel Sensor (PPS)

@<row>rowdecoder(scancircuit)

ADC n

bits

Column decoder (scan circuit)

row i-1

row i+1

row i+2

@<col>

row i

col j-1

pixel

pixel

pixel

pixel

col j-1

pixelpixel

pixelpixel

pixelpixel

pixelpixel

col j

pixel

pixel

pixel

pixel

col j

pixelpixel

pixelpixel

pixelpixel

pixelpixel

col j+1

pixel

pixel

pixel

pixel

col j+1

pixelpixel

pixelpixel

pixelpixel

pixelpixel

col j+2

pixel

pixel

pixel

pixel

col j+2

pixelpixel

pixelpixel

pixelpixel

pixelpixel

G

Photodiode array with row and column select switch transistors.

+ high fill factor - - - very high output capacity, slow

Row

dec

oder

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PPS with Column Amplifier

@<row>

rowdecoder(scancircuit)

ADC n

bits

Column decoder (scan circuit)

row i-1

row i+1

row i+2

@<col>

row i

col j-1

pixelpixel

pixelpixel

pixelpixel

pixelpixel

col j

pixelpixel

pixelpixel

pixelpixel

pixelpixel

col j+1

pixelpixel

pixelpixel

pixelpixel

pixelpixel

col j+2

pixelpixel

pixelpixel

pixelpixel

pixelpixel

G G G G

+ high fill factor - high output capacity

Row

dec

oder

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Active Pixel Sensor (APS)

@<row>

rowdecoder(scancircuit)

ADC n

bits

Column decoder (scan circuit)

row i-1

row i+1

row i+2

@<col>

row i

col j-1 col j col j+1 col j+2

G G G G

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

Photodiode and amplifier inside the pixel

+ high gain, higher speed - lower fill factor

Row

dec

oder

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APS with Columnwise ADC

@<row>

rowdecoder(scancircuit)

n

bits

Column decoder (scan circuit)

row i-1

row i+1

row i+2

@<col>

row i

col j-1 col j col j+1 col j+2

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

pixelpixel

G

ADC ADC ADC ADC

G G G

+ high gain - low fill factor

+ + high speed - - larger imager area

Row

dec

oder

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Digital Pixel Sensor (DPS)

+ high gain - - very low fill factor

+ + high speed - - large imager area

@<row>

rowdecoder(scancircuit)

n

bits

Column decoder (scan circuit)

row i-1

row i+1

row i+2

@<col>

row i

col j-1 col j col j+1

pixel

ADC

pixel

ADC

pixel

ADC

pixel

ADC

pixel

ADC

pixel

ADC

pixel

ADC

pixel

ADC

pixel

ADC

pixel

ADC

pixel

ADC

pixel

ADC

pixel

ADC

pixel

ADC

pixel

ADC

pixel

ADC

pixel

ADC

pixel

ADC

pixel

ADC

pixel

ADC

pixel

ADC

pixel

ADC

pixel

ADC

pixel

ADC

Row

dec

oder

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Pixel Sharing (APS)

A

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CMOS Imager Features

OPTIMUM

Photo detector area the larger

PIXEL Sensitivity the higher

Pixel size the smaller

Fill factor the bigger

MATRIX Pixels number the larger

Noise the smaller

Conversion gain the higher

IMAGER SNR the higher

FEATURES Dynamic range the higher

Readout speed the higher

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Number of Pixels per Array

CIF VGA SXGA UXGA QXGA non standard

352x288 640x480 1280x1024 1600x1200 2048x1536 format

100k 300k 1,3M 2M 3M 1G

Industrial applications,Consumers market

(mobile, webcam, photography…)

Scientific,astronomyapplications

Technology challenge and design challenge

Technology scaling,process uniformity, pixel

array without impurities …

High pixel output capacity, crosstalk effects, fast ADC

maintaining a good display rate …

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CMOS Imager Features

OPTIMUM

Photo detector area the larger

PIXEL Sensitivity the higher

Pixel size the smaller

Fill factor the bigger

MATRIX Pixels number the larger

Noise the smaller

Conversion gain the higher

IMAGER SNR the higher

FEATURES Dynamic range the higher

Readout speed the higher

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Charge to Voltage Conversion

The charge to voltage conversion allows to quantifythe imager capabilities to convert an incident photon in ahigher possible output voltage.

It is measured in V/e-.

It depends on the pixel sensitivity, full well capacity, pixelgain, column amplifier gain and noise level.

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SNRSignal to Noise Ratio is a measure of signal strengthrelative to background noise.

!!"

#$$%

&=

noise

signal

V

VSNR 10log20

SNR

Detected electrons number

avalanche photodiode

pinnedphotodiode

SNR

Detected electrons number

avalanche photodiode

pinnedphotodiode

Signal to Noise Ratio calculation in dB.

electronsnoisenumber

electronssignalnumber

N

S

__

__=

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a) b) c)

Same scene taken with different DR and integration time

a) 60dB DR and a short integration time (“Ibis 4 imager”)b) 60dB DR and a long integration time (“Ibis 4 imager”)c) 120dB DR (“Fuga imager”)

Dynamic RangeThe Dynamic Range (DR) quantifies the capabilityof the sensor to detect details at the same time inhigh and low illumination spots of a scene

Pictures from Fillfactory web site

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Readout SpeedThe readout speed quantifies the image displayrate capability of the sensor.

Measured in frame per second (fps) or in pixelper second (in Hz)

Specific applications, such as Particle ImageVelocimetry (PIV), require very high fps

State-of-the art:1Mfps (100 frames, CCD), Etoh et al.10kfps (352x288 pixels, CMOS), Kleinfelder et al.

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NoiseMain noise types• TN, temporal noise (thermal noise, kTC noise, flicker

noise (1/f) , shot noise, …)

• FPN, spatial noise (DSNU, PRNU, column FPN,technology origins (materials, litho, process variations)

a) b) c)

a) Column correlated fixed pattern noise;b) Pixel correlated fixed pattern noise;c) Sum of both: Imager fixed pattern noise.

Pictures from J Goy Ph.D (INP Grenoble, 2002)

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Digression: kTC NoiseThermal noise occurring when a switch is opened onto acapacitance

+Vi C

R

!

v 2(") = 4kTR

!

V 0

2(") =

1

j"C

1

j"C+ R

2

v 2(")

Vo

!

V 0

2

=1

2"

1

1+ j#CR

2

$4kTR

2$ d#

%&

&

'Parseval

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kTC Noise (Cont.)

!

V 0

2

=1

2"

1

1+ j#CR

2

$4kTR

2$ d#

%&

&

'

!

V 0

2

=kTR

"

1

1+# 2C2R2$ d#

%&

&

'

!

V 02

=kTR

CR"

1

1+ x2# dx

$%

%

& =kTR

CR"arctan(x)

$%

%

=kTR

CR"("

2+"

2) =

kT

C

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CMOS Imager Standard Features

OPTIMUM STANDARD VALUES

Photo detector area the larger few !m_

PIXEL Sensitivity the higher 0.1 -> 0.3 (A/W)

2,5x2,5!m_ (APS)

100x100!m_ (DPS)

Fill factor the bigger 10% -> 40%

MATRIX Pixels number the larger 100k -> 3M pixels

Noise the smaller < 1%

Conversion gain the higher few 10!V/e-

IMAGER SNR the higher 30->60dB

FEATURES Dynamic range the higher 50->80dB

Readout speed the higher 30-60 fps

Pixel size the smaller

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Readout Circuits

The column amplifiers (CA)circuits, one per column, allow:– to sample and hold pixels

output;– to amplify them;– to send them serially to the

ADC.

Column amplifier main features:• Low power (circuits repeated x times/matrix)• High readout speed (to maintain a high frame rate)• The same layout pitch than pixel (hard to design for a 2,5µm pixelpitch)

@<row>

rowdecoder

ADC n

bits

Column decoder (scan circuit)

row i-1

row i+1

@<col>

row i

col j-1

pixel

pixelpixel

pixelpixel

col j

pixelpixel

pixelpixel

pixelpixel

col j+1

pixelpixel

pixelpixel

pixelpixel

col j+2

pixelpixel

pixelpixel

pixelpixel

CA CA CA CA

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Pixel Noise Reduction (1)Non Correlated Double Sampling (CDS) methodimplementation in column amplifier circuits allow to reducepixel noise level:

1. First sample and hold reset signal2. Next sample and hold pixel signal3. Next subtract these both data to delete offset, kTC

noise, flicker noise and pixel FPN.

Vout_reset

Vout_signal

SH_signal

SH_reset

Column amplifier

Vout_pixelC_signal

C_reset

Vout_reset

Vout_signal

SH_signal

SH_reset

Column amplifier

Vout_pixelC_signal

C_reset

kTC noise

Reset

readout

Offset due to M RST switching

Reset

transistor

switch off Pixel readout

kTC noise

Picture from J Goy Ph.D (INP Grenoble, 2002)

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Pixel Noise Reduction (2)

Non Correlated Double Sampling (NCDS) method implementation:1. Sample and hold pixel signal2. Sample and hold reset signal3. Subtract these both data to delete offset, kTC noise, flicker noise

and pixel FPN

But CDS technique can not be implemented easily (memory).Non Correlated Double Sampling (NCDS) method allow toavoid this drawback.

KT/C noise

Offset = 2KT/C

Reset readout

Offset due to M RST switching

Reset transistor switch off

Pixel readout

KT/C noise

Offset = 2KT/C

Reset readout

Offset due to M RST switching

Reset transistor switch off

Pixel readout

As temporal noise is different for two successive frames, thissubtraction doesn’t subtract them AND induce a noise addition!

Picture from J Goy Ph.D (INP Grenoble, 2002)

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44

Column Amplifier Noise Reduction

DDS method implementation:• short circuit both capacities (Csignal & Creset)• compare both column amplifier outputs to measure the offset

Delta Difference Sampling (DDS) method allows todelete offset differences between column amplifiers

Vout_reset

Vout_signal

DDS

SH_signal

SH_reset

Column amplifier

Vout_pixel

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45

Basic Types of CMOS Pixels

• passive pixel (PPS)• linear active pixel (APS)• logarithmic active pixel (Log)• photogate active pixel

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46

Passive Pixel Sensor (1T/pixel)

+ + high fill factor (1T/pixel) - - high noise level - - high output capacity, slow readout

Metallurgical junction

Integration mode

Ysel

Vout_pixel

Column amplifier

P-Si

n+

P-Si

n+

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47

PPS Timing Operations

Ysel

M1

Vout_pixel

Vref

reset

Cint

1. The address transistor is turned on: acurrent flows via the resistance andcapacitance of the column bus becauseof (Vref – Vdiode)

2. This total charge is integrated by thecapacitor Cint, and output as a voltage

3. The column bus and diode voltages arereturned to Vref by the charge amplifier

4. The address transistor is turned off andthe voltage across Cint is removed bythe reset transistor

Timing operations

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48

PPS: Limits• Limits due to the column bus R & C

– limit the speed at which the pixel can be read out– increase the noise associated with the readout

• Limits due to the use of one charge amplifier percolumn– induce differences between amplifiers (Column FPN)– limit reset speed by the transistor maximum size that can fit into

the limited space available in the width of a column

→ Active Pixel Sensors, more complex, allow to compensatethese drawbacks.

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49

Linear Active Pixel (APS, 3T Pixel)

+ + Standard architecture+ + fill factor 20 - 40% + Good noise performance

• M2 voltage follower: impedanceconverter (high to low) to drivecolumn cap

• Single load transistor for eachcolumn: minimizes pixel area andpixel-to-pixel variations

3T APS pixel

Ysel

reset

Vbias

Vout_pixel

Part of the

column

amplifier

M2

M1

M3P-Si

n+

P-Si

n+

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50

3T APS Operations

!!!!

"

#

$$$$

%

&

!"

#$%

&+'=

L

W!C

IVVV

ox

tMphout

2

12

!!"

#$$%

&+''=K

IVVVVtMtMddout 21

Maximum output swing:Vbias - VT < Vout < Vdd - VtM1 – VtM2

Vph READOUT

M2

reset

I

Vout

M1

Vph READOUT

M2

reset

I

Vout

M1

Vph RESET

M2

reset

I

Vout

Vph RESET

M2

reset

I

Vout

K

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51

3T APS Timing Diagram with CDS

Vout_reset

Vout_signal

DDS

SH_signal

SH_reset

3 transistors pixel

YselM3

M2

resetM1

Column amplifier

Vout_reset

Vout_signal

DDS

SH_signal

SH_reset

3 transistors pixel

YselM3

M2

resetM1

Column amplifier

Vout_pixel

R e s e t

Y _ s e l

V o u t _ p ix e l

S H _ s ig n a l

S H _ re s e t

X _ s e l1

X _ s e l2

integration timepixels

readout

reset

pixels

readout

sequentially

column

amplifiers

readout

integration

start

Reset

Y_sel

Vout_pixel

SH_signal

SH_reset

X_sel1

X_sel2

R e s e t

Y _ s e l

V o u t _ p ix e l

S H _ s ig n a l

S H _ re s e t

X _ s e l1

X _ s e l2

R e s e t

Y _ s e l

V o u t _ p ix e l

S H _ s ig n a l

S H _ re s e t

X _ s e l1

X _ s e l2

R e s e t

Y _ s e l

V o u t _ p ix e l

S H _ s ig n a l

S H _ re s e t

X _ s e l1

X _ s e l2

R e s e t

Y _ s e l

V o u t _ p ix e l

S H _ s ig n a l

S H _ re s e t

X _ s e l1

X _ s e l2

integration timepixels

readout

reset

pixels

readout

sequentially

column

amplifiers

readout

integration

start

Reset

Y_sel

Vout_pixel

SH_signal

SH_reset

X_sel1

X_sel2

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52

3T APS and Column Amplifier

SHS

SHR

Ysel_AC

Vpol_N

DDSX_sel DDSX_sel

X_sel

X_sel

Vpol_P

Vpol_P

Vout_reset

Vout_signal

Creset

Vout_pixel

reset

Ysel

M2

M3

M1

3 transistors pixel

Column amplifier

Csignal

Pixel design trade off:• Compact layout / high fill

factor• Low power pixel / fast enough

Column amplifier design trade off:• S&H capacities (area/noise)• Output amplifiers (power/speed)

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53

3T Pixel: Limits NOISE

• Pixel level noise Gain variability :

Charge to Voltage factor different per pixel (PRNU,photo response non uniformity),

Amplifier per pixel -> gain variation between each pixelReadout noise (kT/C)

• Column level noiseColumn amplifier gain different for each column

→ Non correlated doubled sampling method→ C value tradeoff: Dynamic / kT/C noise

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54

3T Logarithmic Pixel

+ + fill factor 20 - 40%+ + + high dynamic range - low sensitivity in low illumination range - - - high noise level (FPN)

• Variant on the basic 3-transistor APS circuit allows fora logarithmic response from thesensor

• M1 work in weak inversionand a sub-threshold currentflows

YselM3

M2

M1

Vout_pixel

Column amplifier

3T logarithmic

P-Si

n+

P-Si

n+

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55

3T log Pixel Operation

+++ Large number of photocurrentdecades detected (HDR)

+++ Continous working pixel (noreset needed) Iph (A)

Vout_pixel

100f 1p 10p 100p 1n 10n 100n

DC characteristic

As the illumination (and hence Iph) increases linearly,the output voltage decreases logarithmically

!

ID = I0" e

qVGB

nkT e

#qVSBkT # e

#qVDBkT

$

% &

'

( )

0

lnI

I

q

kTVV

ph

ddph !=

In weak inversion, ID is

Finally, by rearranging, we obtain

With a diode connected NMOS, VGB = Vdd; VSB = Vph; VDB=Vdd.

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56

3T log Pixel: LimitsDrawbacks arising from the sub-threshold operation• Low speed at low light levels since the only way of charging /discharging the sensing node is by means of photocurrent• Process variation sensitivity: in the IDS expression, someterms, such as the threshold and flatband voltages, depend on theinterface conditions, oxide thickness, and gate voltage

High Fixed Pattern Noise due to process variations→ no NCDS method applicable due to the continuousmode (no reset)→ noise correction methods through pixel architecturesolutions or through extern memory

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57

Photogate Pixel

+ medium fill factor+ + + low noise level (CDS method) - - pinned photodiode or phototransistor

• Photogate (PG) providesstorage for the photo-generatedcharges

• Transmission gate (tra) biasedduring integration and acts likea surface-channel CCD

• Floating diffusion (FD) actsas the charge - voltageconversion node

Photogate pixel

YselM3

M2

Vbias

Vout_pixel

Part of the

column

amplifier

resettra

n+ n+

PG

Vddreset

tra

n+ n+

PG

Vdd

FD

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58

Photogate Pixel Operation

The structure and operation are more complexthan for photodiodes but CDS is more efficient

Vdd

resettra

n+ n+

PG

FD

0V <Vdd <Vdd

Vdd

resettra

n+ n+

PG

FD

0V <Vdd <Vdd

resettra

n+ n+

PG

FD

0V <Vdd <Vdd

Vdd

resettra

n+ n+

PG

FD

Vdd <Vdd Vdd

resettra

n+ n+

PG

FD

Vdd <Vdd Vdd

Vdd

resettra

n+ n+

PG

FD

Vdd <Vdd <Vdd

resettra

n+ n+

PG

FD

Vdd <Vdd <Vdd

Integration Reset Charge transfer

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59

4T Pixel: LimitsTo avoid double poly process feature,some single poly structures exists.

To avoid kTC noise bring by thephotodiode capacity, the photodiodecontact need to be deleted:

• Pinned photodiode (specificprocess)

• Phototransistor (higher darkcurrent)

+ CDS technique + Possibility to share M1, M2, M3 transistors withneighbored pixels

Photogate pixel

YselM3

M2FDreset

traPG

Vdd

n+ n+n+ Vout_pixel

Vout_pixel

traFD

n+

n+

p+

traFD

n+

n+

p+

Pinned photodiode pixel

YselM3

M2

resetM1

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60

CMOS Imager SummaryDesign trade-off:

Small area / High sensitivity / high speed / low noise

• Pixel level:– Photodetector choice / pixel architecture choice

• Imager level:– Column amplifier architecture

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61

Outline

1. Introduction

2. Non-idealities

3. Performance

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62

CMOS Imager Non-idealities

– Noise• Temporal noise• Spatial noise (fixed pattern noise)• Dark current

– Aliasing– Blooming

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63

Temporal Noise

• THERMAL NOISE

This noise is due to unpredictable movements of thecarriers

k: Boltzmann constant, T: temperature, R: resistance

It increases with:TemperatureReadout speed

!

v 2

= 4kTR in Volt

2

Hz

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64

Temporal Noise• kTC NOISE kTC noise is brought by the reset phase, reset MOS and

photodiode give a RC circuit

k: Boltzmann constant, T: temperature, C: capacitance

resetR

C

V

!

"V =kT

C (in Volt)# $ # "Q = kTC (in Coulomb)

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65

KTC Reduction CDS method

+ temporal noise and offset deleted- need memory

Soft reset: Reset transistor in subthreshold mode

k: Boltzmann constant, T: temperature, C: capacitance

+ temporal noise reduced- long time needed to reset the photodiode

!

"Q max =kTC

2 (in Coulomb)

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66

Temporal Noise• FLICKER NOISE

Flicker noise is due to the readout chain, to thetransistors, especially the follower in the pixel (carrierdensity variations in the MOS channel, trap effects)

Flicker noise increases with transistor downscaling anddecreases with a higher MOS interfaces quality

To reduce it: differential readouts, CDS method

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67

Temporal Noise• PHOTO SHOT NOISE Shot noise is due to the Poisson distribution of photons and the finite

number of electrons in the readout chain

N0 photo generated electrons, Q0 photo generated signal, q elementary charge

Shot noise is a Poisson process. The current fluctuations have astandard deviation of

q elementary charge, I average current through the device

Shot noise increases with the average magnitude of the current orintensity of the light

!

" i = 2qI#f

q

QNn 0

00==

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68

Fix Pattern NoiseFPN is a particular noise pattern which affects in the same way allthe frames.

• Pixel FPN:– Dark Signal Non Uniformity (DSNU): pixel output signal offset variability.– Photo Response Non uniformity (PRNU): pixel output gain variability.

• Column FPN:– Column amplifier gain and offset variabilities

FPN increase when the sensor is at higher temperatures

To reduce it : the CDS and NCDS methods

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69

Dark CurrentDark current is photodiode current generated withoutany light

Dark current is composed by• Pixel FPN (Dark Signal Non Uniformity)• Shot noise (noise on the amount of generated

carriers)• Leakage (diffusion current)

Dark current increase with temperature and integrationtime

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70

Temperature Dependence

n T ei

Eg

kT!"

3

2 2

The temperature dependence of the dark current density is determinedby the corresponding behavior of the intrinsic carrier concentration niand of the diffusivity D

The total dark current density is given by

!!

"

#

$$

%

&++=

pD

p

nA

ni

Ri

LN

D

LN

Dqn

Vwqnj

2

2

)(

'

Temperature dependence of generationcurrent density, neglecting τ(T):

Temperature dependence of diffusioncurrent density, assuming lattice scatteringdominates and neglecting τ(T):

kT

E

gen

g

eTj 22

3!

" kT

E

diff

g

eTj!

" 4

11

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71

Temperature Dependence (Cont.)

Dashed line:temperature dependence of ni

2.

Solid line:temperature dependence of ni.

At lower temperatures, generationcurrent dominates;At higher temperatures, diffusioncurrent.

Dark current in silicon doubles for each increase intemperature of 8-90C

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72

Dark Current Reduction• To reduce Pixel FPN (Dark Signal Non Uniformity)

• the CDS and NCDS methods

• To reduce transistor leakage• Reset transistor leakage: Hard reset

• Photodiode leakage: ring gate

_V>0,3V

S G DS

G

D

dark current

ring gate transistortransistor

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73

AliasingAliasing due to• Sampling: spatial frequency• MTF: modulation transfer function

Properly sampledimage of brick wall

Example of aliasing when the signal beingsampled also has periodic content.

Spatial aliasing

Pictures from wikipedia

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74

Sampling Effects

NYQUIST THEOREM

t t t

fsampling

= n*fsignal

fsampling

= 2* fsignal

fsampling

<2*fsignal

fsampling

=fsignal

Input signal

Sample frequency

Sampled & hold

Output signal

t

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75

Modulation Transfer Function

)(

)()(

inModulation

outModulationfMTF =

amplitude

t

in

out

1

1/2

02fsfs

MTF

finfout

Signal

frequency

High MTF High aliasing

MTF

Geometric MTF

N

sig

pix

N

sig

pix

G

f

f

P

x

f

f

P

x

MTF!

""#

$

%%&

' !

=

2

2sin

(

(

_x

Ppix

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76

Blooming

Blooming is due to too much illumination.To avoid this charge overflow, an anti-bloomingprotection may be added in each pixel

Ysel

reset

Anti-blooming

protection

Column amplifier circuit

Clamped pixel

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77

Outline

1. Introduction

2. Non-idealities

3. Performance

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78

CMOS Imager Performance

• High dynamic range• Global shutter• Digital pixels• High speed readout

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79

Dynamic Range• Input dynamic range

It is defined as the ratio of the largest non saturating inputsignal to the smallest detectable input signal

Standard CMOS image sensor : 60 - 70dBHDR CMOS image sensor : 100dB - 120dBNatural scenes: 140dB (from 0.001lux at night to >10 000lux in sunlight)

• Output dynamic rangeIt is defined as the ratio of the maximum output signalswing to the minimum valid output (noise in dark)

min

maxlog20i

iinputDR =

noisereadoutnoisedark

currentDarklevelSaturationoutputDR

__

__

+

!=

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80

High Input Dynamic Range

Different ways to reach a high input DR:• Single integration time

• Time to reach saturation storage pixel

• Oscillator pixel

• Multiple non destructives readout

• Multiple integration times

• Logarithmic architecture

• Lin-log architecture

• Light adaptive systems

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81

Single Integration TimeLong integration time:

+ Higher sensitivity in dark conditions- Pixel saturation in brightness conditions

Illumination data encoding from:1. The saturation (time to reach the saturation level, or

number of reset, etc…)2. Photodiode voltage level

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82

D.Stoppa et all,« Novel CMOS Image Sensor with a 132dB DR » IEEE JSSC 2002

Cint

Vph

resetVdd

C1

Vramp1

VthC2

Vramp2

Single Integration Time

•Pixel readout- If low illumination, Cint readout ;- If high illumination, Vph < Vth induced Vramp1 and Vramp2

memorization in C1 and C2 capacities.

• Time to reach saturation storage pixel

+ + high dynamic range >130dB- - 25T/pixel (FF=11%, pixel 25µmx25µm, CMOS 0.35µm)

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83

L. McIlrath, « A Low-Power Low-Noise Ultrawide-DR CMOS Imager with Pixel-Parallel A/D Conversion », IEEE JSCC2001

Cint

Vph

resetVdd

Vth Clk

Single Integration Time

Each time Vph cross Vth, the comparator output level allow to reset thephotodiode. A counter allow to know how many ‘bits’ were suppliedduring integration time.

• « Oscillator » pixel

+ high dynamic range >100dB- 19T/pixel (pixel pitch: 30µmx30µm, techno: 0.5µm)

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84

Single Integration Time

Estimation from Multiple Non-destructive Samples with a Last-Sample-Before-Saturation Algorithm (Yang JSSC’99)

• Multiple Non destructive readout

+ higher dynamic range and higher SNR- multiple values storage per pixel and computational power

reset

C

Q(t)

reset

C

Q(t)

Liu «Photocurrent Estimation from Multiple Non-destructive samples in a CMOS Image Sensor », SPIE 2001

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85

Multiple Integration Times

Multiple integration times:+ High sensitivity in dark and bright conditions- Low display rate (multiple matrix readout to

compute one image)

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86

• Sensor operations:Further matrix readout after different integration times andimage computation.

Multiple Integration Times

+ high dynamic range >90dB - external memory needed + standard architecture pixel (3T) - further readout needed + high fill factor - low frame rate

• To maintain a high frame rateTwo matrix outputs and two amplifiers column to keep ahigh frame rate. (O. Yadid-Pecht “Wide intrascene dynamic rangeCMOS APS using dual sampling”, IEEE Transactions on ElectronDevices 1997.)

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87

• Optimum Integration time choice:During one exposure phase, 4 non destructivessamples. Only the optimum sample is read (lastsample before saturation).

• Optimum gain choice:Column amplifier circuit give the gain choice

Multiple Integration Times

Example for two different integration times and tree voltage gains

M.Schanz et al.« A High DR CMOS Image Sensor for Automotive Applications »IEEE JSSC 2000

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88

Logarithmic Architecture• Logarithmic architecture:

+ very high dynamic range+ simple pixel (3T) and high fill factor- low sensitivity in darkness- - high FPN

• Calibration neededFPN compensation through an external memoryFPN compensation in pixel (differential measurement, pixel

calibration, etc…)

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• « Lin-log » sensor (Photonfocus patent)With 1T added/pixel, when low illumination, integrationmode, when higher illumination, this added transistor allowto obtain a logarithmic response.

• Linear and Logarithmic responsesBoth responses, linear and logarithmic, are supplied bythe pixel. An external computation allows to calculate thefinal picture.G. Storm IEEE JSSCC 2006 (an algorithm allow to choose which signal toreadout) K. Hara IEEE ISSCC 2005 (both responses are supplied and analgorithm allow to compute the final signal inside the pixel)

Linear and Logarithmic Pixel

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Light Adaptive Systems

• Local adaptation (Biological Retina inspired)Pixel network (each pixel is connected to its neighbors)supplies local illumination data to each pixel, which canadapt its own sensitivity (by subtracting off this data and itsown value, increasing the contrast while maintaining widedynamic range) [C. Mead, A silicon model of early visual processing,IEEE Transaction on Neural Networks, 1988]

• Pixel light adaptive systemAuto-reset pixel, final signal computed from integrationdata and memorized reset number

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CMOS Imager Performance

• High dynamic range• Global shutter• Digital pixels• High speed readout

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Shutter Mode

tttt tttt

Pictures from M. Wäny et al. «CMOS Image Sensor With NMOS-Only Global Shutter and Enhanced Responsivity» IEEE Transactions on Electron Devices 2003

Electronic exposure time control « Rolling shutter » « Global shutter »

(standard approach) (fast moving scenes in orderto avoid artifacts)

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4T Global Shutter Pixels

Transfert gateReset sense node+ kTC noise limited

Sample nodeReset photodiode+ kTC noise limited

Ysel

reset

GS

SN

out

Ysel

reset

GS

SN

out

pixel pixel

Ysel

reset

GS

SN

out

pixel

Ysel

reset

GS

SN

out

Ysel

reset

GS

SN

out

read phase

Ysel

exposure time exposure time

GS

reset

reset

One frame

read phase

Ysel

exposure time exposure time

GS

reset

reset

One frame

read phase

Ysel

exposure time exposure time

GS

reset

reset

One frame

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5T Global Shutter Pixel

Ysel

rstSN

GS

SN

out

pixel

rstPD

exposure time exposure time

rstPD

read phase

Ysel

GS

reset

rstSN

One frame

exposure time exposure time

rstPD

read phase

Ysel

GS

reset

rstSN

One frame

Transfer gateReset sense node and photodiode+ kTC noise limited

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6T Global Shutter Pixel

Transfer gateReset sense node and photodiode+ kTC noise limited+ CDS readout

Ysel

rstSN

GS

SN

out

pixel

SH SR

exposure time exposure time

rstSN

read phase

Ysel

GS

SH

SR

reset PD & SN exposure time

One frame

Reset

PD

Read

reset

Read

PD

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•Global Shutter Architecture limits:- Memory node current leakage ;- On the memory node photo generated carriers integration(shield needed);- Carriers injection when Rs and Ts transistors switching;- kTC noise from photodiode and sense node reset

Global Shutter Architecture

•High performance Global Shutter pixels:- more complex architecture (ex: 7T/pixel) to limit the kTCnoise and to increase the full well capacity…

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CMOS Imager Performance

• High dynamic range• Global shutter• Digital pixels• High speed readout

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ADC ConversionThree approaches to integrating ADC with an

CMOS image sensor:

1. Chip level approach, a singleconventional ADC serves the entireimage sensor (very high speed)

2. Column level approach, array ofADC, each is dedicated to one ormore columns

3. Pixel level approach, every pixelhas an ADC

Analog Pixel Sensors

Digital Pixel Sensor

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ADC Pixel Level

DPS advantages:• High speed digital readout (massively parallel readout),• No column amplifiers noise• Scalability (pixel design and layout ready to use for very wide range

sensor size)• Higher SNR (ADC closer to signal generation)• Lower power consumption (slower A-to-D conversion)

• Different ways to convert at pixel level:• Single slope converter• Sigma-delta converter• Multi-channel Bit serial ADC

n

Digital Pixel Sensor

memoryADCn

DPS design challenges:To keep a small pixel size and a high fill factor.

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Bit Serial ADC

It uses successive comparisons to output one bit at a time,simultaneously from all pixels on a row

Vphpixel

output

1

serial ADC DPS

DAC

Column DAC

Vphpixel

output

1

serial ADC DPS

DAC

Column DAC

outputDR_min 0

outputDR_max 1

1/2

1/4

3/4

Vph Vout_DAC

pixel output

t

tmsb lsb

1 1 0 1 0

outputDR_min 0

outputDR_max 1

1/2

1/4

3/4

Vph Vout_DAC

pixel output

t

tmsb lsb

1 1 0 1 0

Timing diagramBlock diagram

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Single Slope Converter

ramp

Vph memory

counter

Comparator

output

n

Single slope converter DPS

It uses a single analog ramp, distributed simultaneously to allpixels in a row

Pixel output

ramp

Vph

0 1 0

0

comparator output

t

t

Timing diagramBlock diagram

Sequential orgray-scalecounter

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Sigma-delta Converter

Vref

Vph

counter

Comparator

output

n

__ converter DPS

Comparator output 1 0 1 0

Vref

Vph

counter 0 1 2

Comparator output 1 0 1 0

Vref

Vph

counter 0 1 2

It uses a single reference voltage for all the pixels, a counterallow to memorize how many time the pixel has been reset

Timing diagramBlock diagram

ΣΔ

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CMOS Imager Performance

• High dynamic range• Global shutter• Digital pixels• High speed readout

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High Speed SensorsHigh frame rate is required for applications like scientific research,crash tests, high-speed scanning, machine vision and militaryresearch.

image sensor of 1024x1024 pixelsworking at more than 5000 full fps total data rate of 55Gbit/sec taking 10-bit quality (camera level)

Bullet hits match stick, pictures from videsignline website

Car crash test, pictures from emeraldinsight website

Typical high-speedcapturesequence

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High Speed Sensors (Cont.)Two different ways to achieve this extremely high data rate

• Sensor level• Chip level (high-speed ADC's, sequencers, LVDS transmittersand correction algorithms on-chip)

Row

decoder

Row

decoder R

owdecoder

Row

decoder

Column decoder

G

ADC ADC ADC

G G

Column decoder

G

ADC ADC ADC

G G

Sensor level:

Pixel level: global shutter!(frame rate independent of the integration time )

Sensor level: parallelization!Pixel array divided into several quadrantsparallel output amplifiers and ADC’sor if DPS, several parallel high speed outputs).

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Eyes CCD CMOS

Number of pixel 120M 330k ->111M 330k -> 54M

Pixel pitch 3! 10! 10!

Focal plane 3cm 1mm -> 11cm 1mm -> 4cm

Power dissipation <1mW >100mW >50mW

Radiation hardness 1mrad 10Krad 1Mrad

Spectral response 0,4!m ->0,7!m 0,4!m ->1!m 0,4!m ->1!m

Peak QE 10% >50% >50%

DR 106 log 10

4 lin 10

6 non lin

Dark limit 10-3

lux 0,1 lux <1 lux

Noise photon 10 <10 10

Integration time 0,3s 1!s -> 5min 1!s ->1min

Maximum frame rate 10Hz -> 50Hz 1MHz 1MHz

Image lag 1min 0s 0s

Data path 5Mnerves 1 analog line 10 digital line

Price 1$ -> 175 000$ 1$ -> 20 000$

CMOS vs. Eye

Courtesy: Albert Theuwissen

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