SoC Security: Architecture, IP, or CAD?

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SoC Security: Architecture, IP, or CAD? Professor Ryan Kastner Dept. of Computer Science and Engineering UC San Diego [email protected] http://kastner.ucsd.edu

Transcript of SoC Security: Architecture, IP, or CAD?

Page 1: SoC Security: Architecture, IP, or CAD?

SoC Security: Architecture, IP, or CAD?

Professor Ryan KastnerDept. of Computer Science and Engineering

UC San [email protected]

http://kastner.ucsd.edu

Page 2: SoC Security: Architecture, IP, or CAD?

Position: Academe vs Govt vs Industry

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Position: IP Security is (mostly) solved

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Position: IP vs Architecture vs CAD

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Pressing Need: Formal Threat Models

Wei Hu, Alric Althoff, Armaiti Ardeshiricham, and Ryan Kastner, “Towards Property Driven Hardware Security“, Microprocessor Test and Verification Conference, December 2016 (pdf)

http://kastner.ucsd.edu/wp-content/uploads/2013/08/admin/mtv16-property_security.pdf
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Pressing Needs/Challenges: Security Debugging

1) Write HW, SW, FW/, …

2) Write Security Propertiesassert isolation(request[0],request[1])

assert …

3)

4) Fix security flaws

- Hardware Designers

- Security Experts

HardwareProblem!

Security Issue!!

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Conclusion


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