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The LM335 Temperature SensorThe LM335 temperature sensor is an easy to use, cost-effective sensor with decent accuracy(around +/- 3 degrees C calibrated). The sensor is essentially a zener diode whose reverse

breakdown voltage is proportional to absolute temperature.

Since the sensor is a zener diode, a bias current must be established in order to use the device.The spec sheet states that the diode should be biased between 400 uA and 5 mA; we'll bias it at 2mA. It is important to note that self-heating can be a significant factor, which is why I'm notchoosing a higher bias current. The bias circuit is as follows:

The temperature sensor's voltage output is related to absolute temperature by the followingequation: Vout = VoutT0 * T / T0, where T0 is the known reference temperature where VoutT0was measured. The nominal VoutT0 is equal to T0 * 10 mV/K. So, at 25 C, VoutT0 is nominally298 K * 10 mV/K = 2.98 V (to be really accurate, we'd need a reference temperature and avoltmeter, but nominal values are OK for our purposes). Thus, the voltage dropped between +5and the diode is 5V - 2.98V = 2.02V. In order to get 2 mA bias current, we need a 1 K resistorfor R1.

A pinout of the sensor is provided below:

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IC CA3140

CA3140 is the 4.5MHz BiMOS Operational Amplifier with MOSFET inputs and Bipolar output. This OpAmp combines the advantage of PMOS transistors and high voltage bipolar transistors.

CA3140 datasheet

CA3140 has gate protected MOSFETs (PMOS) transistors in the input circuit to provide veryhigh input impedance typically around 1.5T Ohms.The IC requires very low input current as low as 10pA to change the output status, high or low.The IC has very fast response and high speed of performance. The output stage of the IC uses

bipolar transistors and includes built in protection against damage from load terminal shortcircuiting to either supply rails or to ground.

The use of PMOS FET in the input stage results in common mode input voltage capabilitiesdown to 0.5 volts below the negative supply terminals. These operational amplifiers areinternally phase compensated to achieve stable operation in unity gain follower operation, andadditionally, have access terminal for a supplementary external capacitor if additional frequencyroll-off is desired. Terminals are also provided for use in applications requiring input offsetvoltage Nulling.

Pin connections

The CA3140 Series has the same 8-lead pin out

Pin1Offset NullPin2 Inverting input INVPin3 Non inverting input Non-INVPin4 Ground- Negative supplyPin5 Offset NullPin6 OutputPin7 Positive supplyPin8 Strobe

http://www.electroschematics.com/wp-content/uploads/2010/07/CA-3140.pdfhttp://www.electroschematics.com/wp-content/uploads/2010/07/CA3140-Pins.pnghttp://www.electroschematics.com/wp-content/uploads/2010/07/CA3140.pnghttp://www.electroschematics.com/wp-content/uploads/2010/07/CA3140-Pins.pnghttp://www.electroschematics.com/wp-content/uploads/2010/07/CA3140.pnghttp://www.electroschematics.com/wp-content/uploads/2010/07/CA-3140.pdf

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Operating conditions

Supply voltage 36 volt maximumInput terminal current 1mA

CA3140 Block Diagram

Nulling of Offset Voltage

The input offset voltage can be nulled by connecting a 10K pot between the terminals 1 and 5and returning its wiper to the ground. This technique, however, gives more adjustment rangethan required and therefore, a considerable portion of the potentiometer rotation is not fullyutilized.

Low Voltage Operation

Operation at total supply voltages as low as 4V is possible with the CA3140. A current regulator based upon the PMOS threshold voltage maintains reasonable constant operating current andhence consistent performance down to theselower voltages.

Bandwidth and Slew Rate

For those cases where bandwidth reduction is desired, for example, broadband noise reduction,an external capacitor connected between Terminals 1 and 8 can reduce the open loop -3dB

bandwidth. The slew rate will, however, also be proportionally reduced by using this additionalcapacitor. Thus, a 20% reduction in bandwidth by this technique will also reduce the slew rate byabout 20%.

http://www.electroschematics.com/wp-content/uploads/2010/07/CA3140-Block-Diagram.png

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Input Circuit Considerations

The amplifier inputs can be driven below the terminal 4 potential, but a series current limitingresistor is recommended to limit the maximum input terminal current to less than 1mA to preventdamage to the input protection circuitry. Moreover, some current limiting resistance should be

provided between the inverting input and the output when the CA3140 is used as a unity gainvoltage follower. This resistance prevents the possibility of extremely large input signaltransients from forcing a signal through the input protection network and directly driving theinternal constant current source which could result in positive feedback via the output terminal.A 3.9 K resistor is sufficient.The typical input current is on the order of 10pA when the inputsare centered at nominal device dissipation. As the output supplies load current, device dissipationwill increase, raising the chip temperature and resulting in increased input Current.It is wellknown that MOSFET devices can exhibit slight changes in characteristics due to the applicationof large differential input voltages that are sustained over long periods at elevated temperatures.Both applied voltage and temperature accelerate these changes. The process is reversible andoffset voltage shifts of the opposite polarity reverse the offset.

Amplifier circuit: (Darlington Pair)

In electronics, the Darlington transistor (often called a Darlington pair) is a compound structure consistingof two bipolar transistors (either integrated or separated devices) connected in such a way that the currentamplified by the first transistor is amplified further by the second one .[1] This configuration gives a muchhigher common/emitter current gain than each transistor taken separately and, in the case of integrateddevices, can take less space than two individual transistors because they can use a shared collector.Integrated Darlington pairs come packaged singly in transistor-like packages or as an array of devices(usually eight) in an integrated circuit.

A Darlington pair behaves like a single transistor with a highcurrent gain (approximately the product of the gains of the twotransistors). In fact, integrated devices have three leads (B, Cand E), broadly equivalent to those of a standard transistor.

A general relation between the compound current gain and the individual gains is given by:

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If 1 and 2 are high enough (hundreds), this relation can be approximated with:

Darlington pairs are available as integrated packages or can be made from two discrete transistors; Q 1 (theleft-hand transistor in the diagram) can be a low power type, but normally Q 2 (on the right) will need to

be high power. The maximum collector current I C(max) of the pair is that of Q 2. A typical integrated power device is the 2N6282, which includes a switch-off resistor and has a current gain of 2400 atIC=10A.

A Darlington pair can be sensitive enough to respond to the current passed by skin contact even at safevoltages. Thus it can form the input stage of a touch-sensitive switch.

A typical modern device has a current gain of 1000 or more, so that only a small base current is needed tomake the pair switch on. However, this high current gain comes with several drawbacks.