RAD HARD 8051XC SOC ASIC SPW/USB/I2C/SPI/GPIO ... - Micro …
1
Transcript of RAD HARD 8051XC SOC ASIC SPW/USB/I2C/SPI/GPIO ... - Micro …
Peripherals
I2C Primary Master I2C Secondary Master SPI Master with 8 Slave Selects SPI Slave
CRC Accelerator PWM PPS Input (Pulse Per Second)
DH
Spaceborne Sensors Spacewire Node USB Node USB/Spacewire Bridge I2C Networks
FPGA 50 MHz Clock Development SupportXilinx Spartan 3E 1200 Running at 50 MHz
Digilent Nexys2TM and GenesysTM Virtex-5 Development Boards
PMODTM ) SpaceWire LVDS, Dual I2C Bus Support, 1 Mbit NVM Bootup/XTEDS RS-422 Tx and Rx
RAD HARD 8051XC SOC ASIC SPW/USB/I2C/SPI/GPIO (KM-807701)
For More Information Please Contact: [email protected]
Micro-RDC
4775 Centennial Blvd. Suite 130 Colorado Springs, CO 80919 http://www.micro-rdc.com
Applications
SoC ASIC Development Board
Office: 505.294.1962 Fax: 505.296.2886
Software Support ( Separate License Required for Keil) Keil C and Assembly Firmware Development
Keil TinyOS
USB/SPI Interface
Deployment Tools EEPROM from Intel Checksum HEX Files
XTEDS into EEPROM
RHBD IBM 9LP 90nm CMOS Total Ionizing Dose: Within Specifications after Exposure to
Greater than 1Mrad(Si). Single Event Latch Up: Latchup immune to 80 MeV-cm2/mg SRAM Error Rate: Supports Scrubbing Program SRAM to Obtain
Desired Error Rates Single Event Transient: Implements the Temporal Latch Based
Flip Flops to Mitigate Transient Pulse Widths of up to 1ns.
Nexys2TM
, GenesysTM
and PMODTM
are trademarks of Digilent, Inc.
This effort is sponsored by the Air Force Research Laboratory (AFRL)
Power Consumption Measured in Silicon
