Pic.tpt Iete
Transcript of Pic.tpt Iete
-
8/8/2019 Pic.tpt Iete
1/69
INTRODUCTIONINTRODUCTIONTOTO
PIC MICROCONTROLLERSPIC MICROCONTROLLERS
Dr. Y.Narasimha Murthy Ph.DSRI SAIBABA NATIONAL COLLEGE(AUTONOMOUS)SRI SAIBABA NATIONAL COLLEGE(AUTONOMOUS)
ANANTAPURANANTAPUR--515001515001--A.PA.P--INDIAINDIA
[email protected]@yahoo.com
-
8/8/2019 Pic.tpt Iete
2/69
Do you Know this gentleman ???..
-
8/8/2019 Pic.tpt Iete
3/69
None other than Steve Sanghi, the chairman,president and CEO ofMicrochip Technology
Inc.
Sanghi moved from India to U.S. to pursue a
Masters degree at the University of
Massachusetts after bachelors degree in
engineering, from Punjab Engineering College.
In 1993, Sanghi became president and CEO of
Microchip after seeking advice from venture
capital firms on starting his own company.
-
8/8/2019 Pic.tpt Iete
4/69
Since then, he has transformed Microchip
into a billion-dollar company specializing inMicrocontroller and analog semiconductors
used in devices ranging from remote
controls to cars. He also has been involved
in science and technology education
programs, and hes been known to frequent
science fairs and question kids about their
projects.
-
8/8/2019 Pic.tpt Iete
5/69
Brief Introduction.Brief Introduction.
The term PIC stands for PeripheralInterface Controller .It is the brain child of
Microchip Technology, USA .They havecoined this name to identify their single
chip micro-controllers. These 8-bit micro
controllers have become very important
now -a -days in industrial automation andembedded applications etc..
-
8/8/2019 Pic.tpt Iete
6/69
PICs are popular with both industrial
developers and hobbyists alike due to theirlow cost, wide availability, large user base,
extensive collection of application notes,
availability of low cost or free development
tools, and serial programming (and re-
programming with flash memory)
capability.
-
8/8/2019 Pic.tpt Iete
7/69
Microchip PIC microcontrollers are
available in various types. When PICmicrocontroller MCU was first availablefrom General Instruments in early 1980's,the micro-controller had a simple
processor executing 12-bit wideinstructions with basic I/O functions. Thesedevices are known as low-endarchitectures. They have limited programmemory and are meant for applicationsrequiring simple interface functions andsmall program & data memories.
-
8/8/2019 Pic.tpt Iete
8/69
Some of the lowSome of the low--end device numbers areend device numbers are
12C5XX
16C5X 16C505
-
8/8/2019 Pic.tpt Iete
9/69
Mid range PIC architectures
built by upgrading low-end architectureswith more number of peripherals, more
number of registers and more
data/program memory.
Some of the mid-range devices are
16C6X
16C7X
16F87X
-
8/8/2019 Pic.tpt Iete
10/69
Program memory type is indicated by analphabet.
C = EPROM
F = Flash
RC = Mask ROM
-
8/8/2019 Pic.tpt Iete
11/69
28/40-Pin 8-Bit CMOS FLASHMicrocontrollers Core Features:
High performance RISC CPU Only 35 single word instructions to learn
All single cycle instructions except for program
branches which are two cycle
Operating speed: DC - 20 MHz clock input DC - 200 ns instruction cycle
Up to 8K x 14 words of FLASH ProgramMemory,
Up to 368 x 8 bytes of Data Memory (RAM) Up to 256 x 8 bytes of EEPROM Data Memory
-
8/8/2019 Pic.tpt Iete
12/69
Pin-out compatible to the PIC16C73B/74B/76/77
Interrupt capability (up to 14 sources) Eight level deep hardware stack
Direct, indirect and relative addressing modes
Power-on Reset (POR)
Power-up Timer (PWRT) and
Oscillator Start-up Timer (OST)
Watchdog Timer (WDT) with its own on-chip RC
oscillator for reliable operation
-
8/8/2019 Pic.tpt Iete
13/69
Programmable code protection
Power saving SLEEP mode
Selectable oscillator options Low power, high speed CMOS FLASH/EEPROM
technology
Fully static design
In-Circuit Serial Programming (ICSP) via twopins
Single 5V In-Circuit Serial Programming capability
In-Circuit Debugging via two pins
Processor read/write access to program memory Wide operating voltage range: 2.0V to 5.5V
High Sink/Source Current: 25 mA
-
8/8/2019 Pic.tpt Iete
14/69
Commercial, Industrial and Extended
temperature
ranges
Low-power consumption:
- < 0.6 mA typical @ 3V, 4 MHz
- 20 A typical @ 3V, 32 kHz
- < 1 A typical standby current
-
8/8/2019 Pic.tpt Iete
15/69
-
8/8/2019 Pic.tpt Iete
16/69
Salient featuresSalient features
Speed :
When operated at its maximum clock ratea PIC executes most of its instructions in
0.2 Qs or five instructions permicrosecond.
Instruction set Simplicity :
The instruction set is so simple that itconsists of just 35 instructions
-
8/8/2019 Pic.tpt Iete
17/69
Integration of operational features:
Power-on-reset and brown-out
protection ensure that the chip operatesonly when the supply voltage is withinspecifications. A watch dog timer resetsthe PIC if the chip malfunctions or
deviates from its normal operation at anytime.
Programmable timer options:
Three timers can characterize inputs,control outputs and provide internaltiming for the program execution.
-
8/8/2019 Pic.tpt Iete
18/69
Powerful output pin control:
A single instruction can select and drivea single output pin high or low in its 0.2
Qs instruction execution time. The PIN
can drive a load of up to 25QA.
I/O port expansion:
With the help of built in serial peripheral
interface the number of I/O ports can be
expanded. EPROM/DIP/ROM optionsare provided.
-
8/8/2019 Pic.tpt Iete
19/69
I/O port expansion:
This is the most important aspect in thePIC controllers.With the help of built in
Serial Peripheral Interface(SPI) the
number of I/O ports can be expanded.
EPROM/DIP/ROM options are provided.
Interrupt control:
Up to 12 independent interrupt sources
can control when the CPU will deal witheach sources.
-
8/8/2019 Pic.tpt Iete
20/69
PIC 16C6X/7X CONTROLLERS
PERIPHERAL FEATURES The PIC16CXX/17CXX is a family of low-cost,
high-performance, CMOS, fully-static, 8-bitmicrocontrollers.
There are Three Timers : Namely Timer 0,Timer 1, Timer 2
Timer 0: 8-bit timer/counter with 8-bit prescaler
Timer 1: 16-bit timer/counter with prescaler canbe incremented during sleep via external
crystal/clock Timer 2: 8-bit timer/counter with 8-bit period
register, pre-scaler and post-scaler
-
8/8/2019 Pic.tpt Iete
21/69
ContdContd
Capture/Compare/PWM (CCP) module(s)
Capture is 16-bit, max resolution is 12.5
ns, Compare is 16-bit, max resolution is
200ns, PWM max resolution is 10-bit Synchronous Serial Port (SSP) with SPITM
and I2C
Universal Synchronous AsynchronousReceiver Transmitter (USART/SCI)
-
8/8/2019 Pic.tpt Iete
22/69
Parallel Slave Port (PSP) 8-bits wide, withexternal RD, WR and CS controls
Brown-out detection circuitry for Brown-out
Reset (BOR)
PIC16CXX microcontroller family has
enhanced core features, eight-level deep
stack, and multiple internal and external
interrupt sources.
-
8/8/2019 Pic.tpt Iete
23/69
ARCHITECTUREARCHITECTURE
The high performance of the PIC16CXX familycan be attributed to a number of architectural
features commonly found in RISC
microprocessors. To begin with, the PIC 16CXX
uses a Harvard architecture, in which, programand data are accessed from separate memories
using separate buses. This improves bandwidth
over traditional Von Neumann architecture
where program and data may be fetched fromthe same memory using the same bus.
-
8/8/2019 Pic.tpt Iete
24/69
HARVARD ARCHTECTUREHARVARD ARCHTECTURE
-
8/8/2019 Pic.tpt Iete
25/69
As the PIC 16c6x/7x family of micro-controllers
uses Harvard Architecture it enables thedevices exceptionally fast execution speed for agiven clock rate. In the Harvard Architectureseparate buses are used for Data and
Instruction as shown in the diagram.
Instructions are fetched from program memoryusing buses that are distinct from the buses
used for accessing variables in data memory,I/O ports etc. Every instruction is coded as asingle 14-bit word and fetched over a 14-bit widebus.
-
8/8/2019 Pic.tpt Iete
26/69
ContdContd..
Separating program and data buses
further allows instructions to be sized
differently than 8-bit wide data words.
Instruction op-codes are 14-bits wide
making it possible to have all single word
instructions. A 14-bit wide program
memory access bus fetches a 14-bitinstruction in a single cycle
-
8/8/2019 Pic.tpt Iete
27/69
ExampleExample::
The PIC 16C61 addresses 1K x 14 ofprogram memory.
The PIC16C62/62A/R62/64 addresses 2Kx 14 of program memory, and
the PIC16C63/R63/65/65/65A/R65devices address 4K x 14 of programmemory.
The PIC 16C66/67 address 8K x 14program memory. All program memory isinternal.
-
8/8/2019 Pic.tpt Iete
28/69
The PIC16CXX can directly or indirectly address
its register files or data memory. All special
function registers including the program counter
are mapped in the data memory. The PIC16CXX
has an orthogonal (symmetrical) instruction setthat makes it possible to carry out any operation
on any register using any addressing mode. This
symmetrical nature and lack of special optimal
situations makes programming with thePIC16CXX simple yet efficient, thus significantly
reducing the learning curve.
-
8/8/2019 Pic.tpt Iete
29/69
Block DiagramBlock Diagram--16C6X16C6X
-
8/8/2019 Pic.tpt Iete
30/69
CPU REGISTERSCPU REGISTERS
The CPU registers are
Working Register (W)
Status Register FSR File Select Register
INDF
PCLATH
Program Counter
PCL
Eight Level Stack
-
8/8/2019 Pic.tpt Iete
31/69
General Block DiagramGeneral Block Diagram
-
8/8/2019 Pic.tpt Iete
32/69
ContdContd
Working Register:
Working Register is used by many instructions
as the source of an operand. It also serves as
the destination for the result of instructionexecution and it is similar to accumulator in
otherQcs and Qps. It is a 8-bit regarding.
Status Register:
It contains the arithmetic status of the ALU, theRESET status and the bank select bits for the
data memory.
-
8/8/2019 Pic.tpt Iete
33/69
C: Carry/borrow bit
DC: Digit carry/borrow bit
Z: Zero bitNOT_PD: Reset Status bit (Power-down
mode bit)
NOT_TO: Reset Status bit (tme- out bit)
RPO: Register bank SelectThe bits 7 and 6 of Status Register are unused by
16c6x/7x.
-
8/8/2019 Pic.tpt Iete
34/69
The C bit is set when two 8-bit operandsare added together and a 9-bit result
occurs. This 9-bit is placed in the carry bit.
The DC or Digit carry bit indicates that a
carry from the lower 4 bits occurred during
an 8-bit addition.
ContdContd
-
8/8/2019 Pic.tpt Iete
35/69
Example: 0011 1000
0011 10000111 0000
Here DC=1 as a result of the carry fromthe bit 3 to the bit 4 position.
-
8/8/2019 Pic.tpt Iete
36/69
The Z or zero bits is affected by the execution of
arithmetic or logic instructions.
The reset status bits NOT_TO and NOT_PD are
used in conjunction with PICs sleep mode. Themicro controller can put itself to sleep mode to
save power during intervals when it has nothing
to do. It can be reset by any of three kinds. Upon
reset the CPU can check these two reset statusbits to determine which kind of event resettled it
and then respond accordingly.
-
8/8/2019 Pic.tpt Iete
37/69
The Register bank select bit RPO is usedto select either bank .
When RPO=0, select Bank 0, RPO=1,
select Bank 1.
Example: bcf STATUS, RPO
Select bank 0
bsf STATUS, RPO
Select bank 1.
-
8/8/2019 Pic.tpt Iete
38/69
ContdContd
FSR (File Select Register):It is the pointer used for indirect addressing. Inthe indirect addressing mode the 8-bit registerfile address is first written into FSR. It is a
special purpose register that serves as anaddress pointer to any address through out theentire register file.
INDF (Indirect File):
It is not a physical register .Addressing thisINDF will cause indirect addressing. Anyinstruction using the INDF register actuallyaccess the register pointed to by the FSR.
-
8/8/2019 Pic.tpt Iete
39/69
ContdContd
PCL:PCL is actually the lower 8-bits of the 13-bit
program counter. It can be read like any other
register.
PCLATH (Program Counter Latch):
The upper 3-bits of PCLATH remains zero and
serves no purpose, it is only when PC2 is
written to that PCLATH is automatically written
into the PC at the same time.
-
8/8/2019 Pic.tpt Iete
40/69
Memory organisation :
It has three memory blocks.
Program memory
Data memory Stack
P MP M
-
8/8/2019 Pic.tpt Iete
41/69
The 6x/7x family controllers have either 2k or 4k
address of program memory. Normally aprogram memory of 2k addresses needs only a
11-bit program counter to access any address
(211=2048=2k).
A program memory of 4k address needs a 12-
bit program counter. But this PIC family uses
13-bit program counter allowing the controllers
to an 8k-program memory without changing the
CPU structure.
Program MemoryProgram Memory
-
8/8/2019 Pic.tpt Iete
42/69
-
8/8/2019 Pic.tpt Iete
43/69
Two addresses in the program memory
address space are treated in a special wayby the CPU. The first address H 000 being
a go to mainline instruction the second
special address, H 004 being a go to in
service instruction can be assigned to thisaddress to make the CPU to jump to the
beginning of the Interrupt Service routine
located elsewhere in the memory space.
-
8/8/2019 Pic.tpt Iete
44/69
-
8/8/2019 Pic.tpt Iete
45/69
When we deal with tables, if any tables are
created they are assigned to addresses in
the range H005 H0FF. For most of the
applications this space is sufficient.
The main line program begins after the
tables.
-
8/8/2019 Pic.tpt Iete
46/69
Data memory (Register Files):Data memory (Register Files):
Data Memory is also known as RegisterFile. Register File consists of two
components.
General purpose register file ( RAM). Special purpose register file (similar to
SFR in 8051).
-
8/8/2019 Pic.tpt Iete
47/69
The special purpose register file consists
of input/output ports and control registers.Addressing from 00H to FFH requires 8
bits of address. However, the instructions
that use direct addressing modes in PIC to
address these register files use 7 bits of
instruction only. Therefore the register
bank select (RP0) bit in the STATUS
register is used to select one of theregister bank
-
8/8/2019 Pic.tpt Iete
48/69
Data Memory mapData Memory map
-
8/8/2019 Pic.tpt Iete
49/69
PIC Reset actionsPIC Reset actions
Reset is used to put themicrocontroller into a known state.Normally when a PIC microcontrolleris reset, execution starts from
address 0 of the program memory.This is where the first executable userprogram resides. The reset actionalso initializes various SFR registersinside the Microcontroller.
-
8/8/2019 Pic.tpt Iete
50/69
ContdContd
Reset mechanisms ensure that the CPU startsrunning when the appropriate operatingconditions have been met, and can be used torestart the CPU in case of program failure.
The actual reset to the CPU or the Chip_Reset,is generated by a flip-flop. This has two inputs, S
(Set) and R (Reset).
-
8/8/2019 Pic.tpt Iete
51/69
Contd..Contd..
The CPU enters Reset mode when Chip_Resetgoes low, which is caused by the S line going
high. It stays there until the flip-flop is cleared,
caused by the R line going high.
The S input to the flip-flop goes high, via a three-
input OR gate, if any of the following goes high:
-
8/8/2019 Pic.tpt Iete
52/69
Contd..Contd..
The Reset action normally occurs invarious situations like
Power On Reset
Master Clear( ) Reset Watchdog Timer Reset
Brown-out Reset (This feature is not
available in PIC16C61/62/64/65 series.Only 74 series have this feature
-
8/8/2019 Pic.tpt Iete
53/69
Contd..Contd..
The reset action will set the program
counterto the starting address of the
program.This starting address is different
for different members.For Ex:Starting
address for PIC16C71 is 000H.whereas for
PIC16C57 it is 7FFH.
So,The first instruction to be executed willappear at the reset vector.
-
8/8/2019 Pic.tpt Iete
54/69
An important point to be remembered, is
when powered ,most of the hardware
registers are initialized ,but RAM locations
are not initialized.A reset cycle will
initialize the RAM locations.
So,the conclusion is Reset and Power-on
are different in PIC controllers.
-
8/8/2019 Pic.tpt Iete
55/69
Contd..Contd..
The Brown-out reset occurs when thesupply voltage falls below 4 volts.Thedevice remains in the Brown-out resetstate till the supply voltage is restored.The
Brown-out reset also includes anotherfeature .If Vdd is hit with a transient noisespike ,causing Vdd to drop below 4.0Voltsfor longer than 100 micro seconds theBrown-out reset circuit detects that andreset the
-
8/8/2019 Pic.tpt Iete
56/69
Contd..Contd..
chip.whereas in most of the other microcontrollersmany erroneous executions takes place during this
time.The PIC brown-out reset will also help if the
power-on reset conditions are not not met.
There is a provision of power-up timer of about72mS.Once this is enabled the Brown-out reset
occurs once again incase of non-restoration of
supply within 72 mS
-
8/8/2019 Pic.tpt Iete
57/69
PIC Oscillator ConnectionsPIC Oscillator Connections
There are 4 common oscillator modes that areavailable on most PIC micro devices.
HS, XT, LP and RC. (High speed, Crystal, Low-
power clocking, Internal RC)
These modes support crystals, canned oscillatormodules, some resonators or the use of an
external resistor and capacitor as a clocksource. When using a crystal or resonator, othercomponents such as capacitors may be needed.
-
8/8/2019 Pic.tpt Iete
58/69
Contd..Contd..
The HS mode stands for High Speed mode. Itis designed to be used with crystals,andresonators with a frequency of 3 to 4 MHz ormore. The important thing to remember about
HS mode is that it provides the highest drivelevel available.
Crystals and Resonators must be DRIVEN by asignal to work. The gain on this signal controls
whether an oscillation will occur and how strongit will be. Care must be taken not to underdriveor overdrive the crystal or resonator.
-
8/8/2019 Pic.tpt Iete
59/69
Contd..Contd..
The XT mode stands for Crystal mode and willproduce a medium drive level. It is designed tobe used with crystals and resonators of 1 toabout 4 MHz.
XT mode has moderate power consumptionsince its drive level is lower than that of
HS mode, and because a lower clock speed isproduced. Remember, as a rule: the
faster the clock used, the more current theapplication will require
-
8/8/2019 Pic.tpt Iete
60/69
Contd..Contd..
The LP mode stands for "Low Power mode.This mode is useful for circuits that require thelowest power possible. LP mode is engineeredfor 32.768kHz crystal operation, and it canfunction at any frequency below 200kHz. LPmode is most commonly used for 32.768kHzoperation.
LP mode will produce the slowest clock rate,and as a result, the lowest power consumption
of all the modes. LP mode is ideal for timing sensitive applications
since these same crystals are used as a timebase in wrist-watches.
-
8/8/2019 Pic.tpt Iete
61/69
Contd..Contd..
The RC mode stands for External RC mode. It is important to note that this is an
_EXTERNAL_ RC mode, ( some PICmicro
devices have an _INTERNAL_ RC mode).
RC mode uses a resistor-capacitor network
connected to the OSC1 pin. When the
device is configured for external RC mode, these
components are automatically driven to producea frequency which will run the PICmicro MCU.
-
8/8/2019 Pic.tpt Iete
62/69
Contd..Contd..
RC mode is designed for very low-cost
applications. The power consumed will
vary due to the wide range of frequencies
that can be created using this mode
-
8/8/2019 Pic.tpt Iete
63/69
Contd..Contd..
It is extremely important to note that RC
mode will produce an inaccurate clock
source. In some applications this wont
matter, but applications that are timing
sensitive should not be used with this
mode. For this reason, RC mode is not
recommended for timing sensitive
applications or for RS-232 communication.
-
8/8/2019 Pic.tpt Iete
64/69
Contd..Contd..
The IntRC mode stands for Internal RC mode
and functions much like the standard External
RC mode.
Unlike External RC mode, in IntRC mode theresistor and capacitor are already provided.
Microcontrollers with this feature have an on-
chip RC oscillator. Current designs run at
approximately 4 MHz.
-
8/8/2019 Pic.tpt Iete
65/69
Contd..Contd..
IntRC mode is the least expensive
oscillator available since no external
components are needed. It is also useful,
because devices in this mode can oftenuse the OSC1 and OSC2 lines for general
purpose I/O. This feature makes the
PIC12CXXX and other 8-pin PICmicrodevices very popular.
-
8/8/2019 Pic.tpt Iete
66/69
Contd..Contd..
The ER mode stands for External Resistormode.
ER mode is very similar to External RC mode,
but no capacitor is needed. One resistor controlsthe frequency produced.
Similar to RC mode, ER mode has moderatepower consumption, and is low cost.However,due to the nature of RC oscillators, it is notrecommended for timing sensitive applicationsor for RS-232 use.
-
8/8/2019 Pic.tpt Iete
67/69
-
8/8/2019 Pic.tpt Iete
68/69
LimitationsLimitations
The PIC architectures have several limitations: Only a single accumulator
A small instruction set
Operations and registers are not orthogonal;some instructions can address RAM and/orimmediate constants, while others can only usethe accumulator
Memory must be directly referenced in arithmeticand logic operations, although indirect
addressing is available via 2 additional registers Register-bank switching is required to access
the entire RAM of many devices
-
8/8/2019 Pic.tpt Iete
69/69
THANQ !!
Wish you good luck