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Pertemuan 11Mesin Motorola 68000: I

Matakuliah : T0324 / Arsitektur dan Organisasi Komputer

Tahun : 2005

Versi : 1

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Learning Outcomes

Pada akhir pertemuan ini, diharapkan mahasiswa

akan mampu :

• Membandingkan implementasi instruksi mesin untuk Arsitektur Komputer Motorola ( C4 ) ( No TIK : 5 )

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Chapter 3.

MotorolaInstruction Set: I

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MOVE.L N,D1 N contains n, the number ofentriesto beadded,andD1 isusedasa counter thatdetermineshowmanytimestoexecutetheloop.

MOVEA.L #NUM1,A2 A2 isusedas a pointerto the list entries.It isinitializedto NUM1, theaddressof thefirst entry.

CLR.L D0 D0 isusedtoaccumulate thesum.LOOP ADD.W (A2)+,D0 Successive numbersareaddedinD0.

SUBQ.L #1,D1 Decrement thecounter.BGT LOOP If [D1]0,executetheloopagain.MOVE.L D0,SUM Storethesumin SUM.

Figure 3.25. A 68000 program for the addition program in Figure 2.16.

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MOVE.L N,D1 Put n 1 into theSUBQ.L #1,D1 counterregisterD1.MOVEA.L #NUM1,A2CLR.L D0

LOOP ADD.W (A2)+,D0DBRA D1,LOOP Loopbackuntil [D1]=–1.MOVE.L D0,SUM

Figure 3.26. An alternative 68000 program for the program in Figure 3.25.

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Figure 3.19. Map of addressable locations in the 68000.

ContentsaddressesWord

byte 0

byte 2

byte i

byte i+2

byte 1

byte 3

byte i+1

byte i+3

0

2

i

i+2

Long word 0

Long word i

224

1-byte224

2-byte224

2-

7

A1

Array

6

6 = index

100 = offset

1002

1000

Extension word

OP-code word

1108

1106

1104

1102

Operand

Figure 3.20. An example of 68000 full relative mode for the instruction ADD 100(PC,A1),D0.

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Memory Addressingaddress or datalabel Operation information

Assemblerdirectives C EQU $202200ORG $201150

A DC.W 639B DC.W 215

ORG $201200Statementsthat MOVE A,D0

generatemachine ADD B,D0instructions MOVE D0,C

Assemblerdirective END

Figure 3.23. 68000 assembly language representation for the routine in Figure 3.22.

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(b) Example of using a branch instruction in the loop of Figure 2.16

[PC] = 1006 when branch address is computed

Figure 3.24. 68000 short-offset branch instructions.

(a) Short-offset branch instruction format

LOOP 1000

SUBQ.W

ADD.W

LOOP

#1,D1

(A2)+,D0

OP code

OP-code word

OP-code word

BGT

LOOP

OP code Offset

15 8 7 0

Branch address = [updated PC] + offset

Branch address

Assembly languageversion of loop

Appearance of loop in memory

1002

1004

1006

6-

1006 6 1000=-=

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TABLE C.1Address field encoding for 68000

Addressfield

Mode Register

5 4 3 2 1 0

ModeAddressingmode field Registerfield

Dataregisterdirect 000 RegisternumberAddressregisterdirect 001 RegisternumberAddressregisterindirect 010 Registernumber

Autoincrement 011 RegisternumberAutodecrement 100 RegisternumberIndexedbasic 101 RegisternumberIndexedfull 110 RegisternumberAbsoluteshort 111 000Absolutelong 111 001

Relativebasic 111 010Relative full 111 011Immediateorstatusregister 111 100

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TABLE C.2Differences from Motorola terminology

Terminologyusedinthisbook Motorolaterminology

Autoincrement Addressregisterindirectwith postincrementAutodecrement AddressregisterindirectwithpredecrementIndexedbasic AddressregisterindirectwithdisplacementIndexedfull Addressregisterindirectwithindex

Relativebasic ProgramcounterwithdisplacementRelativefull Programcounterwithindex

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TABLE C.3Notation for Table C.4

Symbol Meaning

s Sourceoperandd DestinationoperandAn AddressregisternDn DataregisternXn Anaddressordataregister,usedasanindexregisterPC ProgramcounterSP StackpointerSR StatusregisterCCR Conditioncodeflagsin SRAAA AddressregisternumberDDD Dataregisternumberrrr SourceregisternumberRRR Destinationregisternumber

eeeeee Effectiveaddressof thesourceoperandEEEEEE Effectiveaddressof thedestinationoperandMMM Effectiveaddressmode ofdestinationCCCC SpecificationforaconditioncodetestP. .. P DisplacementQ... Q QuickimmediatedataSS Size:00 byte,01 word,10 longword(formostinstructions)

01 byte,11 word,10 longword(for MOVEandMOVEAinstructions)

VVVV Trapvectornumberu Conditionco deflagstateisundefined(meaningless)d(An) Indexedbasicaddressingmoded(An,Xi) Indexedfulladdressingmoded(PC) Relative basicaddressingmode

d(PC,Xi) Relative full addressingmode

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TABLE C.568000 branch instructions

Mnemonic Displacement Operation(Name) size OP code performed

BRA 8 01000000PPPP PPPP PC [PC]+disp(Branch

always) 16 0110000000000000PPPP PPPP PPPP PPPP

Bcc 8 0110CCCC PPPP PPPP If ccistrue,then(Branch

conditionally) 16 0110CCCC00000000 PC [PC]+dispPPPP PPPP PPPP PPPP

BSR 8 01100001PPPP PPPP SP [SP] 4;(Branchto [SP] [PC];

subroutine) 16 0110000100000000 PC [PC]+dispPPPP PPPP PPPP PPPP

DBcc 16 0101CCCC11001DDD If ccisfalse,then(Decrement PPPP PPPP PPPP PPPP Dn [Dn] 1;

andbranch If[Dn] 1,thenconditionally) PC [PC]+disp

DBRA Theassembler interpretsthisinstructionas DBF(Decrement (seetheDBcc entry).

andbranch)

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TABLE C.6Condition codes for Bcc, DBcc and Scc instructions

Machine Conditioncode suffix

CCCC cc Name Testcondition

0000 T True Alwaystrue0001 F False Always false0010 HI High C Z = 00011 LS Low orsame C Z = 10100 CC Carryclear C = 00101 CS Carryset C = 10110 NE Not equal Z = 00111 EQ Equal Z = 11000 VC Overflowclear V = 01001 VS Overflowset V = 11010 PL Plus N = 01011 MI Minus N = 11100 GE Greaterorequal N V = 01101 LT Lessthan N V = 11110 GT Greaterthan Z (N V) = 01111 LE Lessorequal Z (N V) = 1

T and Fsuffices cannotbe usedin the Bccinstruction

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Pertemuan 12Mesin Motorola 68000: II

Matakuliah : T0324 / Arsitektur dan Organisasi Komputer

Tahun : 2005

Versi : 1

16

Learning Outcomes

Pada akhir pertemuan ini, diharapkan mahasiswa

akan mampu :

• Membandingkan implementasi instruksi mesin untuk Arsitektur Komputer Motorola ( C4 ) ( No TIK : 5 )

17

Chapter 3.

MotorolaInstruction Set: II

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MOVEA.L #LOC,A1 Initializepointerregister A1tocontaintheaddressof thefirst locationinmemorywherethecharactersaretobestored.

READ BTST.W #3,INSTATUS Wait for a characterto beenteredBEQ READ inthe keyboardbufferDATAINMOVE.B DATAIN,(A1) TransferthecharacterfromDATAIN into

thememory(thisclearsSIN to0).ECHO BTST.W #3,OUTSTATUS Wait forthedisplay to becomeready.

BEQ ECHOMOVE.B (A1),DATAOUT Movethe characterjust readtotheoutput

bufferregister(thisclearsSOUT to 0).CMPI.B #CR,(A1)+ Check if thecharacterjust readis CR

(carriagereturn). If it isnot CR, thenBNE READ branch back andreadanothercharacter.

Also,increment thepointertostorethenextcharacter.

Figure 3.27. A 68000 program that reads a line of characters and displays it.

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Callingprogram

MOVEA.L #NUM1,A2 Put theaddressNUM1 in A2.MOVE.L N,D1 Put the numberof entriesn in D1.BSR LISTADD CallsubroutineLIST ADD.MOVE.L D0,SUM Storethesumin SUM.nextinstruction...

SubroutineLISTADD SUBQ.L #1,D1 Adjustcount to n 1.

CLR.L D0LOOP ADD.W (A2)+,D0 Accumulatesumin D0.

DBRA D1,LOOPRTS

Figure 3.28. Program of Figure 3.26 written as a 68000 subroutine; parameters passed through registers.

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MOVEA.L #LOC,A0 A0 points todata.MOVE.B (A0)+,D0 Loadfirst byte into D0.LSL.B #4,D0 Shift left by 4 bitpositions.MOVE.B (A0),D1 Loadsecondbyte into D1.ANDI.B #$F,D1 Clearhigh-order4bits tozero.OR.B D0,D1 Concatenatethedigits.MOVE.B D1,PACKED Storetheresult.

Figure 3.32. Use of 68000 logic instructions in packing BCD digits.

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MOVEA.L #AVEC,A1 Addressoffirst vector.MOVEA.L #BVEC,A2 Addressofsecondvector.MOVE N,D0 Numberofelements.SUBQ #1,D0 Adjustcount to useDBRA.CLR D1 UseD1asaccumulator.

LOOP MOVE (A1)+,D2 Getelement fromvectorA.MULS (A2)+,D2 MultiplyelementfromvectorB.ADD D2,D1 Accumulateproduct.DBRA D0,LOOPMOVE D1,DOTPROD

Figure 3.33. A 68000 program for computing the dot product of two vectors.

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Subroutine

INSERTION CMPA.L #0,A0 A0 is RHEAD.BGT HEADMOVEA.L A1,A0 A1 is RNEWREC.RTS

HEAD CMP.L (A0),(A1) CompareID ofnewrecordtohead.BGT SEARCHMOVE.L A0,4(A1) Newrecordbecomeshead.MOVEA.L A1,A0RTS

SEARCH MOVEA.L A0,A2 A2 is RCURRENT.LOOP MOVEA.L 4(A2),A3 A3 is RNEXT.

CMPA.L #0,A3BEQ TAILCMP.L (A3),(A1)BLT INSERTMOVEA.L A3,A2 Go tonextrecord.BRA LOOP

INSERT MOVE.L A2,4(A1)TAIL MOVE.L A1,4(A2)

RTS

Figure 3.35. A 68000 subroutine to insert a record in a linked list.

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Subroutine

DELETION CMP.L (A0),D1 D1 isRIDNUM.BGT SEARCHMOVEA.L 4(A0),A0 Deleteheadrecord.RTS

SEARCH MOVEA.L A0,A2 A2 is RCURRENT.LOOP MOVEA.L 4(A2),A3 A3 is RNEXT.

CMP.L (A3),D1BEQ DELETEMOVEA.L A3,A2BRA LOOP

DELETE MOVE.L 4(A3),D2 D2 is RTEMP.MOVE.L D2,4(A2)RTS

Figure 3.36. A 68000 subroutine to delete a record from a linked list.

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Table 3.268000 addressing modes

Name Assembler syntax Addressing function

Immediate #Value Operand = ValueAbsolute Short Value EA = Sign Extended WV alueAbsolute Long Value EA = ValueRegister Rn EA = R n

that is, Operand = [R n ]Register Indirect (An) EA = [A n ]Autoincremen t (An)+ EA = [A n ];

Incremen t A n

Auto decrement (An) Decremen t A n ;EA = [An ]

Indexed basic WV alue(An) EA = WV alue + [A n ]Indexed full BV alue(An,Rk.S) EA = BV alue + [A n ] +[R k ]Relative basic WV alue(PC) EA = WV alue + [PC]

or LabelRelative full BV alue(PC,Rk.S) EA = BV alue + [PC] + [Rk ]

or Label (Rk)

EA = effective addressValue = a number given either explicitly or represented by a labelBValue = an 8-bit ValueWValue = a 16-bit ValueA n = an address registerR n = an address or a data registerS = a size indicator: W for sign-extended 16-bit word

and L for 32-bit long word

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