Performances and Tests on the forward sensors of the CMS ...hep.fi.infn.it/CMS/tesi_busoni.pdf ·...

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UNIVERSIT ` A DEGLI STUDI DI FIRENZE DIPARTIMENTO DI FISICA DOTTORATO DI RICERCA IN FISICA Performances and Tests on the forward sensors of the CMS Silicon Tracker Tesi di Dottorato di Ricerca in Fisica di Simone Busoni Relatore Dott. Carlo Civinini Relatore esterno Dott. Andrea Vacchi XIII Ciclo di Dottorato Coordinatrice Prof. Anna Cartacci Firenze, 30 Dicembre 2000 Anno Accademico 1999/2000

Transcript of Performances and Tests on the forward sensors of the CMS ...hep.fi.infn.it/CMS/tesi_busoni.pdf ·...

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UNIVERSITA DEGLI STUDI DI FIRENZE

DIPARTIMENTO DI FISICA

DOTTORATO DI RICERCA IN FISICA

Performances and Tests on the forwardsensors of the CMS Silicon Tracker

Tesi di Dottorato di Ricerca in Fisica di

Simone Busoni

Relatore Dott. Carlo Civinini

Relatore esterno Dott. Andrea Vacchi

XIII Ciclo di Dottorato

Coordinatrice Prof. Anna Cartacci

Firenze, 30 Dicembre 2000 Anno Accademico 1999/2000

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Contents

Introduction 1

1 CMS experiment at LHC 51.1 The Large Hadron Collider LHC . . . . . . . . . . . . . . . . . . . . . . . . . 51.2 Physics at LHC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

1.2.1 The SM Higgs sector . . . . . . . . . . . . . . . . . . . . . . . . . . . 91.2.2 Standard processes . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101.2.3 bbb quark physics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111.2.4 SUSY sector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

1.3 CMS detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121.3.1 Magnet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141.3.2 Muon spectrometer . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151.3.3 Calorimetry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

1.4 Data Acquisition and trigger . . . . . . . . . . . . . . . . . . . . . . . . . . . 171.5 Tracker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

1.5.1 The Pixel Subdetector . . . . . . . . . . . . . . . . . . . . . . . . . . 221.5.2 The Silicon Microstrip Tracker . . . . . . . . . . . . . . . . . . . . . . 24

2 Silicon microstrip detectors 272.1 Silicon properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 272.2 The p-n junction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 312.3 Principle of operation of silicon detectors . . . . . . . . . . . . . . . . . . . . 35

2.3.1 Energy loss of high energy charged particles in silicon . . . . . . . . . 362.4 Silicon microstrip detectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

2.4.1 Single sided device . . . . . . . . . . . . . . . . . . . . . . . . . . . . 382.5 The Florence detector prototypes . . . . . . . . . . . . . . . . . . . . . . . . . 41

2.5.1 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 442.6 Signal and Noise evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

2.6.1 Charge collection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 512.6.2 Noise evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

3 Irradiated silicon microstrip detectors 593.1 Radiation damage in silicon detectors . . . . . . . . . . . . . . . . . . . . . . 60

3.1.1 Surface damage effects . . . . . . . . . . . . . . . . . . . . . . . . . . 603.1.2 Bulk damage effects . . . . . . . . . . . . . . . . . . . . . . . . . . . 603.1.3 The absorbed dose expressed as 1 MeV neutron equivalent fluence . . . 65

3.2 Irradiation of silicon detectors and dosimetry . . . . . . . . . . . . . . . . . . 66

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3.3 Characterization of irradiated detectors . . . . . . . . . . . . . . . . . . . . . . 693.3.1 Leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 693.3.2 Bulk capacitance and full depletion voltage . . . . . . . . . . . . . . . 703.3.3 Bias resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 703.3.4 Coupling capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . 713.3.5 Interstrip capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . 723.3.6 Total capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

4 The APV6 front-end chip 774.1 The APV6 chip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

4.1.1 Analogue stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 804.1.2 Control interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 814.1.3 Operation modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

4.2 APV6 chip response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 844.2.1 APV6 characterization . . . . . . . . . . . . . . . . . . . . . . . . . . 86

4.3 The APV25 read-out chip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

5 The laboratory setup 915.1 The Florence laboratory setup . . . . . . . . . . . . . . . . . . . . . . . . . . 915.2 The Tracker Interface Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . 935.3 The Sequencer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

5.3.1 The timing circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 965.4 The timing sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

5.4.1 Internal Calibration Mode . . . . . . . . . . . . . . . . . . . . . . . . 1005.4.2 DAQ mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

5.5 The Data Storage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1035.5.1 The FED ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

6 The laser test station 1056.1 The laser source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1066.2 The laser driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1086.3 The optical and the positioning systems . . . . . . . . . . . . . . . . . . . . . 1116.4 System performances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113

7 Performances of the detector prototypes 1177.1 Off-line analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117

7.1.1 Cluster and total charge reconstruction . . . . . . . . . . . . . . . . . . 1227.2 The 300 µµµm detectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123

7.2.1 The βββ source measurements . . . . . . . . . . . . . . . . . . . . . . . 1237.2.2 The Beam Test measurements . . . . . . . . . . . . . . . . . . . . . . 1267.2.3 Results summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129

7.3 The 500 µµµm detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1327.3.1 The modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1327.3.2 Florence laboratory results . . . . . . . . . . . . . . . . . . . . . . . . 133

Conclusions 137

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Appendix 141

A APV6 response parametrization 141

B The effect of deconvolution on noise 145

C The Sequencer schematic 149

Acknowledgements 157

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IntroductionThe new generation of high energy experiments at colliders will use silicon tracking detectors

in a heavier way than in the past. High particle production rate requires a high granularity and

fast detector response. The use of gas detectors in this environment is often discouraged due to

the high density of particle tracks and response speed.

In particular the CMS [1] experiment at LHC [2] will build an “all silicon” tracking detec-

tor [3] [4]. This choice is dictated by the necessity of a robust tracking and a detailed vertex

reconstruction in a very dense particle environment due to the high luminosity necessary to ac-

cess the full physics range of proton-proton collisions at the LHC energy. The main challenge

involved in such a project is the construction of a large area silicon detector, with a surface of

230 m2 to be compared with about 0.7 m2 of LEP vertex silicon devices, equipped with fast

electronics and that has to face with as low as possible material budget. In addition, the CMS

silicon tracker will have to operate in a heavy radiation environment, with a high bunch cross-

ing rate and a strong magnetic field. All these constraints have to be fulfilled by a tracker that

should be built, due to the very high number of detectors needed, using an industrial approach.

The instrument that should match the requirements of this scenario will consist of an inner

part, very close to the interaction point, built with silicon pixel technology and of an outer part

with silicon microstrip devices. After a long and careful R&D program, carried out both on

detectors and electronics, the first production phase is going to start.

The work and results described in this thesis are located in the larger contest of the activity

performed by the Florence1 CMS group, responsible for the construction of part of the mi-

crostrip detector, for the Silicon Microstrip Tracker collaboration. The main target of the thesis

is the study of the performances of several full size detector modules, with different geometry

(pitch and thickness) and electrical characteristics, in order to obtain the best sensor definition

for the tracker. Some of the detector crystals were heavily irradiated to simulate and study the

effects of 10 years of operation in the hostile LHC radiation environment. In addition, a deep

study of the operation principle and characteristics of the CMS microstrip silicon tracker front-

1INFN and University of Florence

1

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end chip prototype (APV6) [5] has been performed, together with the setting up of a reliable

data acquisition system (DAQ in the following). The DAQ must be flexible enough to allow

to perform electronics and sensors tests in laboratory, maintaining, at the same time, the basic

characteristics of the CERN Beam Test readout chain. The pre-production phase start will re-

quire a fast way to test detector; in this perspective a laser test station that can check out the

response of a complete module in a very short time has been built in Florence in the context of

the activities related to this thesis.

In the first chapter the main physics goals of LHC are summarized, together with their

implications on the characteristics and performances of the Silicon Tracker. Then the CMS

experiment and its components are described, with particular attention to the Silicon Microstrip

subdetector and its new layout after the 1999 winter revision.

In the second chapter the principle of operation of silicon microstrip detectors is reported,

together with main electrical and geometrical parameters that drive their performances in terms

of signal to noise (S/N) response to minimum ionising particles (MIPs). Laboratory measure-

ments on sensors, designed by the CMS Florence group, are presented. Finally, a review of all

the fullsize modules prototypes built from these sensors and tested during this thesis work is

given and their characteristics are critically discussed.

Most of the work done in this thesis is a comparison between irradiated and non irradiated

detectors performances and the study of the survival of silicon devices in a LHC like radiation

environment. In chapter 3 the neutron irradiation procedure performed on a set of detectors is

described and their characterization is briefly summarized.

The studies performed on the front-end read out chip APV6 are presented in chapter 4.

Special care has been given to the definition of the steps necessary to test the full functionality

of the chips sitting on the front-end read out hybrid.

The project and the construction of a custom sequencer board used to drive the readout chips

are described in chapter 5, together with the front-end interface card used to connect the detector

to the digitisation system, whose main block is the official CMS Tracker ADC, the Front End

Driver (FED) [6]. The system allows to test the hybrid alone as well as the fullsize detector; in

the latter case a β source is used to study particle detection and S/N performances directly in

our laboratory.

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Based on the same DAQ system, a laser test station, whose main component is a 1064 nm

pulsed laser diode, has been implemented. An original laser driver and an optical system have

been built to obtain the desired performances in terms of time response and laser spot size. The

detector can be placed on a pair of orthogonal axis that can be positioned by remote control

under the laser spot. This system, described in details in chapter 6, allows a fast check of the

response of all the strips and electronic channels of the device.

The results in terms of charge collection and noise are given in chapter 7 for fullsize modules

exposed to MIPs, emphasizing the dependence with respect to crystal orientation, substrate

resistivity, thickness as well as to irradiation effects. The results are compared with the expected

values according to the APV6 performances and characterization measurements performed on

the sensors. Part of these results have been published or submitted for publication [7] [8]. Beam

tests performed during this work using a particle beam at CERN SPS have confirmed the results

obtained in laboratory, although a more complex experimental setup closer to the final one is

used. This gives us confidence from one side that Florence setup can manage in performing

most of the preliminary testing measurements on complete detectors and on the other side that

the tested fullsize detectors prototypes well behave with respect to the constraints of CMS

experiment.

Notes.

A system of units in which = c = 1 is used in the following. Mass, energy and momentum

are expressed in GeV, unless otherwise stated.

The reference system adopted to describe the detector layout has a cylindrical geometry, with

the rotation axis referred to as z.

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Chapter 1

CMS experiment at LHC

1.1 The Large Hadron Collider LHC

High energy physics has based many of its research fields on experiments at accelerator. In

the last decade a great contribution has come from LEP collider located at CERN, which has

been taking its last data in November 2000 at the project energy limits (∼208 GeV centre of

mass energy for electron positron collisions). A big effort is being made to build a new hadron

collider that will be housed in the 27 Km long LEP tunnel. This project, known as Large Hadron

Collider (LHC) [2], will provide proton-proton collisions with an unprecedented centre of mass

energy of 14 TeV, as well as heavy ions collisions (lead-lead) up to 1312 TeV, covering in this

way several physics fields. The two collider beams will counterrotate in separated pipes, bent

by superconducting magnets and accelerated by superconducting RF cavities. They will interact

in four points corresponding to the experiments sites approved by LHC committee: CMS [1],

ATLAS [9], LHCb [10], Alice [11] (see Fig. 1.1 ).

More in detail, 1238 magnetic dipoles generating a magnetic field up to 8.4 Tesla, 386

quadropoles, 360 sextopoles and 360 ottopoles will be used to steer the particles on their tra-

jectory. Protons will be injected in the LHC rings after three pre-acceleration stages that will

sequentially use the ”Proton Linac”, able to accelerate protons up to 50 MeV, the PS complex,

up to 26 GeV, and the SPS up to 450 GeV.

One of the challenges related to experiments with proton storage rings is the need to increase

the luminosity proportionally to the square of the centre of mass energy. This is necessary in

order to keep abreast of the cross section for the processes that are of interest to high energy

physicists, which falls as the square inverse of the mass of the particle one wishes to discover

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Figure 1.1: LHC experiment sites and accelerator complex at CERN.

[12]. To this end LHC luminosity L, defined for a collider as:

L =N1N2nbf

4πσxσy(1.1)

will reach the value of 1034 cm−2s−1 after a first start-up period, defined as low luminosity

phase, lasting a few years at 1033 cm−2s−1. In equation 1.1 N1,2 is the number of particle

per bunch, nb the number of bunches, f the bunch orbit frequency, σx,y the bunch transverse

dimensions. For heavy ions collisions L will reach the value of 1027 cm−2s−1.

To achieve such an unprecedented value the two beams will contain up to 2835 bunches,

each filled with 1.1 · 1011 protons. The bunch crossing rate will be 40 MHz, corresponding to

25 ns collision time.

The high bunch crossing rate and the high energy of the particles involved in the collisions

are expected to create a very dense background due principally to low energy secondaries from

proton-proton collisions and, especially in the outer region of the tracker, neutron albedo from

the calorimeters. All these characteristics impose severe constraints on electronics, which must

be fast enough to keep up with crossing rate in order to avoid pile-up from more than one

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bunch crossing, and on implementation, where necessary, of radiation hard devices both for

subdetectors and electronics.

1.2 Physics at LHC

The Large Hadron Collider, operating at a centre-of-mass energy of 14 TeV with a design lu-

minosity of 1034cm−2s−1, will be the first machine to probe parton-parton collisions directly at

energies ≈ 1 TeV [2]. The Standard Model (SM) [13] of particle physics, the theory of elec-

troweak and strong forces, provides a remarkably successful theoretical picture. This theory

has been tested rigorously at LEP, the Tevatron and the linear collider at SLAC. Nevertheless

there is a key question that is waiting for an answer: the discovery of the scalar Higgs boson,

predicted by the SM in the mass generation section and last element still experimentally miss-

ing. Other fields of interest in particle physics that can be investigated at the LHC are the test

of Supersymmetry theory (SUSY) or any extension of the SM, the search for new particles and

the study of CP violation in B system.

The total proton-proton cross section at hadron colliders is very large, about 100 mb at the

LHC as can be extrapolated from the results obtained at lower energies from previous experi-

ments (UA1,CDF, etc.). The corresponding inelastic cross section is ≈ 70 mb. An average value

of 25 minimum bias events1 piled up at every bunch crossing are expected for high luminosity

runs at the LHC if we consider empty bunches (∼ 20%). The expected energy dependence

of the total cross section and of some interesting physics processes produced by proton-proton

collisions is shown in Fig. 1.2, together with the event rates foreseen at LHC during high lumi-

nosity phase.

The minimum bias events are an unavoidable background for all the processes involved in

LHC physics and affects most of the detector design choices.

From the same plot it appears that the Higgs boson production, in the mass range of about

500 GeV and at LHC energy, is of the order of ∼ 105 events per high luminosity year2. The

experimentally easiest discovery signature, H → ZZ → 4l±, has a branching ratio ≈ 3 · 10−4,

and thus requires a large integrated luminosity.

1A minimum bias event is a single proton-proton interaction, regardless of being or not selected by the experi-ment trigger.

2Each high luminosity year corresponds to 107 s with a 1034 cm−2s−1 luminosity.

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Figure 1.2: Energy dependence of some characteristic cross-section at hadron colliders.

LHC allows a deep study of b-quark physics as is shown by the rise of the bb cross section,

up to a value of 106 events per second. This property will make of LHC an unique instrument

to perform a broad B-physics program, starting from tagging and reconstruction of b-jets and B

hadrons within these jets, mainly using the information coming from the tracker.

A similar favourable situation is tt production, with 106 quark pair per year already from low

luminosity running. Top physics will play an important role at LHC since from first year the top

quark properties will be measured with excellent precision, starting from its mass, production

cross section, branching ratios couplings and exotic decay channels searches.

Main physics field can be divided into standard processes, Higgs boson search, B meson

and SUSY sector studies.

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1.2.1 The SM Higgs sector

The main goal of LHC is the search of the Higgs boson within the Standard Model (SM) in

order to investigate the process of the electroweak symmetry breaking. The Higgs mass is not

predictable within the SM but theoretical constraints related to perturbative consistency lead to

an upper bound of about 1 TeV. Arguments of vacuum stability suggest a lower Higgs mass

limit [14], depending also strongly on the top mass. Taking the measured value of the top mass

(mt = 174.3± 5.1 GeV) [15] and assuming that no new physics exists below the Planck scale,

the Higgs mass should be around 160±20GeV. At present the four LEP experiments have ruled

out the existence of a Higgs with a mass of less then 107.9 GeV at 95% confidence level [16].

The LHC allows to cover the SM Higgs mass range from the expected LEP200 limit all the

way up to about 1 TeV. At hadron colliders the basic Higgs production mechanisms, sketched

in Fig. 1.3, are gluon-gluon fusion, WW(ZZ) fusion, tt fusion and W(Z) bremsstrahlung pro-

duction [17].

H0

t

tt

g

g

gg fusion

H0

WW ZZ fusion

W,Z

W,Z

q

q

q

q

W,Z

t

t

H0

tt fusion

g

g

t

t

H0

W,Z bremsstrahlung

W,Z

q

q

Figure 1.3: Main Higgs production mechanisms at LHC.

At the LHC the gluon-gluon fusion provides the dominant contribution over most of the

accessible mass range, but at the highest masses (mH ≥ 0.7 TeV) the WW(ZZ) fusion becomes

comparable and provides an additional event signature thanks to the two energetic and forward

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tagging jets. At the lower end of the Higgs mass range, the WH (and ZH) bremsstrahlung mech-

anism provides an additional signature owing to the accompanying W (or Z). A Higgs boson

production about 106 ÷ 104 events per year is foreseen at a luminosity of L= 1034 cm−2s−1.

CMS detector is designed to access the entire SM Higgs mass range taking into account the

different decay modes and experimental signatures. Depending on the Higgs mass value, there

are different best experimental signature for Higgs discovery.

In the mass range between 80 and 130 GeV the most promising signature is the decay

H → γγ, with a branching ratio of only ≈ 2·10−3. The natural width of the Higgs in this case is

very narrow (<10 MeV) and thus the observed signal is entirely dominated by the experimental

γγ mass resolution. Taking into account that the signal is superimposed to a large irreducible

QCD diphoton background a mass resolution better than 1% is required for the electromagnetic

calorimeters. The signal significance is greatly enhanced by an efficient reconstruction of all

the hadronic tracks down to pt of 2 GeV thus allowing the rejection of π0 − π0 (jet - jet) and

the π0 − γ (jet) background. Such isolation criteria rely strongly on performances of tracking

detector too.

In the mass range 130 GeV < MH < 800 GeV, where the Higgs total width reaches the

value of a about 200 GeV, the decay H → ZZ → 4l+l− and H → ZZ → 4l+l− provide

the experimentally easiest discovery signature as the events should contain four isolated high

pT leptons. These decay channels require good integration of data from both tracker, muon and

electromagnetic calorimeter detectors.

For Higgs masses above ≈ 500 GeV (in this case the width ΓH varies as ΓH ≈ 0.5 TeV ·(MH/1 TeV)

3), additional signature involving hadronic W and Z decays as well as invisible

Z decays like H → ZZ → l+l+νν should be also used. These high mass Higgs signatures

involve missing transverse energy and jet-jet masses and require thus hermetic detectors with

good jet-energy reconstruction.

1.2.2 Standard processes

The analysis of standard processes includes all those phenomena that need a deeper investiga-

tion or further confirmation at LHC energies. In particular a great interest will be devoted to the

total cross section for p−p collisions that at present is extrapolated from previous experiments.

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The same extrapolation leads to expect a ratio between elastic to total cross section of the order

of 0.26. This information has a direct consequence on LHC detectors since it is related to the

minimum bias events present at LHC. The understanding of minimum bias events in a hard

scattering process is important as they can limit or spoil the calorimeter resolution and increase

the tracking detector occupancy and thus degrading the lepton and photon isolation criteria,

crucial in order to discover new particles. At LHC high pt jets, produced in anelastic collisions,

are accessible up to the TeV range. An important goal of jet physics is to look for possible de-

viations at high transverse energy from expected QCD point-like behaviour, which could reveal

a possible composite structure of the quarks. Another field of interest is the direct photon pro-

duction, foreseen at the rate of one photon per day with EγT = 1 TeV. At the low end of the Eγ

T

spectrum, as gq → qγ is the dominant production mechanism, direct photon production allows

investigation of the poorly known low-x behaviour of the gluon structure function. The high

production rate of W and Z bosons is a source of a substantial background in the Higgs boson

search but, on the other hand, allows investigation of coupling characteristic of the electroweak

SM.

1.2.3 bbb quark physics

LHC is a powerful tool for observing particles containing heavy quarks, when such particles

have a measurable decay length. At a centre of mass energy Ecm=14 TeV the bb cross section

allows the production of ∼ 1013 b-quark pairs per high luminosity year. The main issue in B

physics at the LHC is the observation of CP violation in the B system, and the ultimate goal is

to measure the three interior angles of the Cabibbo-Kobayashi-Maskawa (CKM) matrix unitary

triangle. CP violation, initially discovered in the K 0 meson decay, can be studied in the B0B0

system also. Resolution obtained with silicon detectors allows the characterization of displayed

secondary vertices and separation of tracks coming from multiple vertices. In Fig. 1.4 the decay

of B0 meson in two muons and two pions, through the creation of a J/ψ and a K 0s meson, is

shown. The identification of B0 displayed vertex allow b tagging, as well as the identification

of a semileptonic decay like b → clν.

Furthermore b jets can result from decays of new particles or in associated production via

gluon-gluon fusion mediated by b-quark exchange, thus giving access to the study of new

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π—

π+

p p

µ—

B0

b

µ— µ+

jet

b

Figure 1.4: Representation of an event involving a bb decay.

physics. All these experimental signatures rely deeply on excellent tracking performances, two

tracks separation capability and secondary vertex resolution, combined with a muon detector.

1.2.4 SUSY sector

In the supersymmetric extension of the SM a set of new particles should exist with a mass scale

around 1 TeV. The minimal version of the supersymmetric SM (MSSM) contains three neutral

and two charged Higgs bosons, and one of the neutral ones is expected to have a mass around

100 GeV. For the lightest MSSM Higgs boson h the most appropriate decay channel to inves-

tigate is the same as the SM Higgs boson, i.e. h → γγ, and the experimental requirements

and expected backgrounds are similar to the SM H → γγ decay channel. Also the four lepton

channel is crucial for the discovery of a Higgs boson in the MSSM. These two decay chan-

nels,together with others involving the τ lepton, are able to cover most of the theory parameter

space. The energies available at LHC can explore this sector as well as the “sparticle” sector.

1.3 CMS detector

CMS is a general purpose proton-proton detector designed to run at the highest luminosity at

LHC, but it is also well adapted for studies at the initially lower luminosities. Like almost every

high energy detector at colliders it has a cylindrical geometry, covering with its subdetectors as

much a solid angle as possible. The overall dimensions are a length of about 22 m, a diameter

of 14.6 m and a total weight of 14500 tons. A CMS detector layout is shown in Fig 1.5.

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Return yoke

Tracker

Superconducting coil

Crystal ECAL

Forward calorimeter

Muon chambers

HCAL

Figure 1.5: Layout of CMS detector.

Each subdetector is composed of a cylindrical part, referred to as barrel, coaxial to the beam

pipe, and a disk shaped one, called endcap, installed perpendicular to the beam axis at both

ends of the cylinder. This layout covers the full detectable volume and ensures a high detection

hermeticity. Large particle fluxes will make track reconstruction difficult and consequently a

high granularity and good time resolution, especially for inner detectors are needed.

Main design goals, in order to cleanly detect the different signatures of new physics at LHC,

are robust tracking, calorimetry and vertex reconstruction within a strong magnetic field to

identify and precisely measuring muons, photons, electrons and jets over a wide energy range.

In addition, a good impact-parameter resolution and secondary vertex reconstruction will play

an important role for b-tagging. The Tracker Detector, together with the muons chambers and

the e.m. and hadronic calorimeters, will provide this information.

The 4 Tesla magnetic field necessary to measure the particle momenta is provided by a large

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superconducting solenoid. Muon chambers are located outside the coil while hadronic and

electromagnetic calorimeters are inside the magnet. Closest to the interaction point we found

the Silicon Tracker.

The overall layout aims to a compact, but with excellent performances, design for the muon

spectrometer, hence the name CMS (Compact Muon Solenoid). The experiment goal is to mea-

sure photons, muons, electrons energy with a resolution of about 1% over a wide momentum

range [18]. A further challenge is the implementation of a trigger system able to select, out of

the 4 · 107 Hz bunch crossing rate present at LHC, the most interesting physics events, with an

expected rate of about 100 Hz. At the first level, this task is accomplished by means of pipelined

front-end electronics.

1.3.1 Magnet

An important aspect of the overall detector design is the magnetic field configuration. Large

bending power is required to precisely measure high-momentum muons and other charged par-

ticles. The choice of the magnet structure strongly influences the remaining detector design.

The CMS magnetic field is provided by the largest and most powerful superconducting

solenoid ever designed with its 2.5 GJ stored energy [1]. The solenoid, working at liquid helium

temperature, will provide a very uniform magnetic field up to 4 Tesla over a cylindrical volume

of 13 m length and 5.9 m radius. The magnetic flux is returned through a 1.8 m thick saturated

iron yoke (with a 1.8 T return field). The return yoke is interleaved with four layers of muon

chambers. The overall design allows housing calorimeters and tracking detectors inside the coil.

Main result obtained by this configuration, thanks to the high magnetic field and favourable

length/radius ratio, is that bending power for charged particle tracking and muon detection up to

pseudo-rapidities 3 of 2.5 is provided without the need of forward toroids, simplifying the de-

tector design. An important aspect of a solenoidal magnet compared to a toroid is that the first

provides bending in the transverse plane and facilitates the task of triggering on muons, which

are pointing to the event vertex, so that one can take advantage of the small transverse dimen-

3Pseudo-rapidity η is a kinematics quantity defined as:

η = −ln(tgθ

2)

where θ = arccos(pz/p), p is the particle momentum and pz its projection along beam direction.

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sions of the beam (∼ 20µm) [19]. The drawback of the degradation of momentum resolution in

the forward direction is overcome by the large length of CMS magnet design.

Since the magnet is the main element of CMS in terms of size, weight and structural rigidity,

it is used as the principal structural element to support all other barrel detector components.

1.3.2 Muon spectrometer

The muon detector should fulfil three basic tasks: muon identification, trigger and momentum

measurement. The high field solenoidal magnet and its instrumented iron flux return, which

also serves as the absorber for muon identification, ensure the performance of these tasks. The

muon detector has a geometric coverage up to pseudorapidity |η| = 2.4, since at the LHC

efficient detection of muons from Higgs bosons, W, Z and tt decays requires a large rapidity

acceptance. A track is identified as a muon candidate if it has penetrated through at least 16

interaction length (λ) of material.

Both barrel and endcap regions are equipped with four muon stations interleaved with the

iron return yoke plates. The overall geometry provides redundancy in track reconstruction

and reliability of the system. Several technologies have been adopted to provide the required

position determination (∼ 100µm). In the barrel, where the expected occupancies and rates are

low (< 10 Hz/cm2) and there is no appreciable radial magnetic field in the vicinity of most of

the muon stations, a system of drift tubes will be used. Each drift chamber module consists of

twelve planar layers of aluminium drift cells: eight layers of tubes parallel and four layers of

tubes perpendicular to the beam to provide respectively precise measurements along the rφ and

z coordinate.

In the endcap cathode strip chambers have been chosen because of their capability of func-

tioning in a highly non-uniform magnetic field. Furthermore such detectors can withstand high

rate and the signals from anode wires provide good time resolution for tagging the beam cross-

ing. Each chamber contains six layers with cathode strips oriented radially to measure the

azimuthal coordinate.

In addition, both barrel and endcap regions are equipped with resistive plate chambers lay-

ers to have dedicated trigger detectors with excellent timing capability (1 ns) and reasonable

position resolution. The precise muon chambers and fast dedicated detectors provide a trigger

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with transverse momentum selection up to 100 GeV.

1.3.3 Calorimetry

Photons, electrons and hadrons energy measurement is accomplished by an inner high resolu-

tion electromagnetic calorimeter (ECAL) and an outer sampling hadron calorimeter (HCAL),

both housed inside the superconducting coil and subdivided in barrel and endcap regions. In the

endcap regions the electromagnetic calorimeter extends up to rapidity |η| = 2.6 and the hadron

calorimeter up to |η| = 3.0. This central calorimetry system is supported, in missing transverse

energy measurements and forward jets identification, by a very forward calorimeter that covers

the pseudorapidity range 3.0 < |η| < 5.0 and is located ±11 m from the interaction point.

The physics process that imposes the strictest performance requirements on the electro-

magnetic calorimeter is the Higgs boson decay in two photons (H → γγ) in the mass region

100 ≤ mH ≤ 140 GeV, where the Higgs width is only a few MeV and therefore the measured

mass resolution is entirely dominated by the experimental resolution. The CMS collabora-

tion has chosen a homogeneous electromagnetic calorimeter, made of Lead Tungstate (PbWO4)

crystals, to optimize energy resolution within the overall detector design. This choice is dic-

tated by the PbWO4 short radiation length (X0=9 mm) and small Moliere radius (2.2 cm) thus

leading to a compact ECAL. Other reasons are a short scintillation decay time constant (∼ 10

ns), which matches the LHC bunch crossing time of 25 ns, and a good radiation hardness. The

drawback of low light yield is effectively overcome by the use of new generation large area sil-

icon avalanche photodiodes. Crystals have a length of 23 cm ( 25.8 X0) in the barrel and 22 cm

in the endcap. The front face of each crystal is 20.5× 20.5 mm2 in the barrel and from 27×29

to 18× 20 mm2 in the endcaps. A preshower device, 3 X0 thick, is placed in front of crystals to

enhance neutral pion rejection in the end-cap region.

If we parametrize energy resolution as:

σE

E=

[a√E

⊕ σn

E⊕ b

]

where a is the stochastic term, b a constant and σn is the energy equivalent of noise, and E

is given in GeV, we expect an energy resolution of σE/E ∼ 0.6% for electrons and photons

of E=120 GeV. In Table 1.1 the contributions to energy resolution from ECAL and HCAL are

summarised.

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Parameter ECAL HCALa ≤ 0.03 ∼ 0.8b ∼ 0.005 ≤ 0.03σn 0.15 ∼ 1.0

Table 1.1: Contributions to energy resolution in CMS calorimeter system for the barrel regionat small η.

The hadron calorimeter surrounds the ECAL and acts, in conjunction with it, to measure the

energies and direction of jets, also providing hermetic coverage for measuring missing trans-

verse energy. In the central region around η = 0 a hadron shower tail catcher is installed

outside the solenoid coil to ensure adequate sampling depth and reduce the hadron quenching

in the muon chamber region. The active elements of the barrel and endcap HCAL consist of

plastic scintillator tiles with wavelength-shifting fibre readout and copper absorbers. The tiles

are arranged in projective towers with fine granularity (lateral segmentation of ∆η × ∆φ ≈0.09 × 0.09) to provide good di-jet separation and mass resolution. HCAL performances play

an essential role in detection of the Higgs in the mass range mH 500 GeV, in both squark and

gluino searches, in QCD jet studies, in t-quark physics and in channels involving τ leptons in

the final state.

1.4 Data Acquisition and trigger

One of the main challenges at the LHC will be the reduction of 40 MHz interaction rate to about

100 Hz output rate of data recording for further off-line analysis while keeping high efficiency

on all interesting physics channels . The on-line data reduction will proceed via different trigger

levels. At the first level, local pattern recognition and energy evaluation on prompt macro-

granular information will provide “object” identification such as high-pt electrons, muons, jets

and missing transverse energy from muon and calorimetry system. Level-1 will select events at

105 Hz. In order to eliminate the Level-1 trigger dead time it is necessary to have a pipeline in

the front-end electronics so to be able to store events at bunch crossing rate for a time up to 3.2

µs. This feature is accomplished by the tracker APV6 chip that has a programmable register,

called latency , that allows to select the signals corresponding to the triggered event in the

chip analogue pipeline . For level-2 trigger, finer granularity and more precise measurements

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will be used together with event kinematics and topology. By matching different subdetectors,

clean particle signatures will be selected resulting in a level-2 rate of 103 Hz. Finally, event

reconstruction and on-line analysis will result in physics process identification, leading to an

output rate of about 100 Hz. Except for the level-1 trigger, the remaining are software triggers.

1.5 Tracker

The detection and study of the different signature for new physics at the LHC will rely on the

clean identification and precise measurements of leptons, photons and jets. Robust tracking and

detailed vertex reconstruction within a strong magnetic field are essential tools to reach these

objectives. The CMS silicon inner tracking system provides precise momentum and impact

parameter and secondary vertex measurements for charged particles. It is also essential for e

and τ identification, and for the calibration of the electromagnetic calorimeter with electrons,

using the p/E matching.

The LHC environment imposes stringent requirements on the tracking detector with respect

to granularity, timing and radiation hardness. Another strong constraint is that pattern recogni-

tion and momentum resolution is affected by photon conversion and bremssttrahlung, so a low

material budget is desirable also in order to fully exploit the ECAL performance. This limits the

number of active layers and selects both the amount and type of material and the cable routing

layout.

A Monte Carlo study of Higgs to γγ decays shows that in 46 % of such decays both photons

leave the Tracker volume without converting and the loss of efficiency for this Higgs search

channel does not exceed other irreducible inefficiencies [20]. In addition, the unprecedented ef-

fort to build the biggest silicon sensitive surface ever realized makes indispensable an industrial

approach both to the tracker construction and to the financial resources managing.

The main challenge for a tracker at LHC is pattern recognition within a highly congested

environment. In the volume covered by the tracker, a background of about 500 soft charged

tracks, coming from ∼ 25 minimum bias events, is foreseen every bunch crossing at a luminos-

ity of 1034 cm−2s−1. To isolate interesting events and overcome pattern recognition problem,

low cell occupancy and large hit redundancy are required. Low occupancy can be obtained by

working with small detection cell size (high granularity) and fast primary charge collection. Re-

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dundancy relies on the largest number of measured points per track, in line with an acceptable

material budget as mentioned before.

The very high magnetic field of CMS affects event topologies, by confining low pt charged

particles to small radius helical trajectories. Coupled with the steeply falling pt spectrum char-

acteristic of minimum bias events, this results in a track density which rapidly decreases with

increasing radius. This is illustrated in Fig. 1.6, where typical primary charged particle densities

are shown for different radii with 0 and 4 T solenoidal field, at η = 0. In the absence of a mag-

Figure 1.6: Primary charged particle density per cm2 at η = 0, for 20 minimum bias eventssuperimposed.

netic field, the charged track density simply falls off as 1/r2. Under the effects of the 4 T field,

the decrease in charged track density with radius is initially more gradual and then significantly

more pronounced than 1/r2. This has important implication for the architecture of CMS tracker.

In particular, granularity is such that typical single channel occupancy at high luminosity, for

detectors with at least one hit on them, is kept between 1% and 3% everywhere in the Tracker.

Two detector technologies, each best matched to the task of satisfying the stringent resolu-

tion and granularity requirements in the higher and lower particle density regions, have been

chosen. The inner part of the tracker is equipped with Pixel Detector, from a radius of 4 cm

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from the interaction point to a radius of 19 cm, while in the outer region a Silicon Microstrip

Detector will be used up to a radius of 120 cm (see Fig. 1.7).

r

z

η

η

Figure 1.7: Longitudinal view of one quarter of the all silicon tracker.

The detector types chosen are both fast on the scale of 25 ns, allowing event pile-up to be

confined within to a single bunch crossing.

The Tracker baseline design has changed with respect to the TDR in December 1999, after a

deep R&D program and a suffered decision to abandon MSGC technology. The motivation for

changing the baseline design in favour of an all silicon tracker have to be found in the following

items [4]:

• The first key element is manufacturing sensors using new 6” instead of 4” industrial pro-

duction lines, of at least equal quality and high volume capacity. This will allow the use

of large area modules in the outer part of the tracker, with comparable dimensions as the

MSGC ones. Therefore in the outer region there will be a similar number of both modules

and read-out channels as initially foreseen.

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• Second is the recently tested automation of module assembly, as well as the possibil-

ity of exploiting the recent generation of high throughput wire bonding machines, with

consequent time saving.

• Third a successful implementation of the front-end read-out chip in deep sub-micron

technology (APV25), cheaper and with improved S/N performances.

• Moving from two technologies to a single one is a unique opportunity to concentrate all

the efforts on a reduced set of problems.

• The reduction in surface, driven by budgetary constraints, allows to build an all silicon

tracker to very good approximation cost neutral with respect to the previous baseline

design. Due to the faster response and better charge localization of silicon compared to

MSGC’s, the tracker performance remains practically unchanged.

The main change in the overall mechanical design is the removal of the central support tube

between the central tracker and MSGC’s. This requirement was dictated by the necessity of

providing well separated thermal volumes for the silicon (to be operated at -10 C) and MSGC

tracker (to be operated at room temperature). In the actual all-silicon tracker this constraint no

longer exists.

One of the key element in tracker realization is its survival to heavy irradiation during the full

experiment lifetime. The region closer to the interaction point is strongly affected by radiation,

as it is shown in Fig. 1.8.

The radiation field within the tracker volume is characterised by two distinct sources. At

the inner layers the dominating contribution comes from secondaries from the pp interactions,

the products of their interaction in the structures and some decay products. Almost all of the

charged hadron fluence originates from the vertex. On the other hand, most of the neutron

radiation is due to albedo from the surrounding electromagnetic calorimeter. To survive this

high radiation environment, the whole tracker needs to be kept cold (see section 3.1). For this

reason the entire tracker volume will be permanently maintained at -10C and only for limited

periods of time it will be allowed to reach temperatures above 0C for maintenance purposes.

Next paragraphs describe more in detail the pixel detector and the new silicon microstrip

detector. Both apparatus are arranged in a barrel geometry in the central rapidity region, while

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10 4

10 5

10 6

0 100 200

z (cm)

Dose (Gy)

7 cm

21 cm

49 cm

75 cm

111 cm 10 13

10 14

0 100 200

z (cm)

Neutrons (cm-2)

7 cm

21 cm

49 cm

75 cm

111 cm

10 13

10 14

10 15

0 100 200

z (cm)

Ch. Hadrons (cm-2)

7 cm

21 cm

49 cm

75 cm

111 cm

Figure 1.8: Expected value for absorbed dose and neutron and charged hadrons (and neu-tral kaons) fluences at selected radii. All values correspond to an integrated luminosity of5 · 105pb−1, that is expected over ten years of LHC operation. The neutron fluences includeonly the spectrum above 10 keV.

at higher values of rapidity they are deployed as end-cap disks.

1.5.1 The Pixel Subdetector

The CMS pixel system [3] consists of two barrel layers and two end layers (end disks) on each

side of the barrel. The barrel layer extends in radius from 4 cm up to 7 cm at low luminosity

and from 7 cm up to 11 cm at high luminosity and is 60 cm long, the end-caps cover radii from

6 cm to 15 cm and longitudinally the region ± 50 cm around the interaction point (see Fig. 1.9).

The layers are made of modular detector units, each one containing a thin (∼ 200−250µm)

segmented sensor plate with highly integrated read-out chips connected to them using bump

bonding technique. Since the main task of the pixel detector is to find and localize secondary de-

cay vertices, both rφ and z (r) hit coordinates are important in the barrel (end disks). Therefore

a square pixel shape has been chosen so to provide 3D point information with high resolution

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Figure 1.9: Perspective view of the CMS pixel system in the high luminosity configuration.

for both coordinates simultaneously. The pixel size is around (150 µm)2, mostly dictated by the

minimal circuit area needed to accommodate each readout channel. The sensors are n+ pixels

on initial n type silicon substrate. Charge collection is strongly affected by the large Lorentz

drift angle of electrons (32 in a 4 T magnetic field). The barrel detectors are arranged such that

the drift angle induces significant charge sharing across neighbouring cells in the rφ plane, so

to improve resolution and cluster size conditions. Charge sharing in the barrel is also present

along the z direction for inclined tracks. Electric and magnetic field are parallel in the end-cap

disks, and most tracks are close to normal incidence. To benefit of charge sharing in this region

the detectors are rotated by 20 around their central radial axis. The induced Lorentz effect

improves charge sharing among adjacent pixels both in r and rφ directions. In this respect n+

implants are preferred because electrons drift angle is three times larger than the holes one.

The readout is of analogue type to benefit from position interpolation, where effects of

charge sharing among pixels are present, so to improve final resolution. Resulting hit resolution

is approximately 10 µm and 15 µm in the φ and z coordinates respectively, to be compared with

the 150 µm pixel dimensions. Similar resolution, between 15 µm and 20 µm are obtained in the

end-caps. In the high luminosity configuration the Pixel detector has an active surface of 0.92

m2, instrumented with about 40 · 106 channels.

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The Pixel detector will instrument the most hostile region, from a radiation point of view,

of the whole CMS detector volume. Therefore the pixel system, although designed with radi-

ation hard criteria, must be replaced at least once during the experiment lifetime to maintain

acceptable performances.

1.5.2 The Silicon Microstrip Tracker

Microstrip silicon detectors are the natural choice to instrument the intermediate and outer re-

gions of CMS tracker system due to its high spatial and time resolution characteristic, radiation

hardness, high detection efficiency if compared with gaseous detectors with the same dimen-

sions. The excellent spatial resolution required in the CMS central tracking volume is ensured

by the fine strip pitch that can be carried out in microstrip devices and the fast charge collection

time in silicon allows single bunch crossing identification.

The CMS Silicon Strip Tracker (SST), based on microstrip silicon devices, will instrument

the intermediate and outer region of the Central Tracker. It will cover a cylindrical volume of

1.2 m radius and 6 meter length, corresponding to a pseudo-rapidity up to |η| = 2.5. Beyond

|η| ∼ 2.5 the radiation level and the track density becomes too high to operate silicon detectors

reliably. From a conceptual point of view it can be subdivided in a barrel region and a forward

region. With respect to the distance from beam pipe the detector can subdivided in an inner

tracker and an outer tracker.

The fundamental units of the tracker are silicon sensors, organized in modules of different

shapes and dimensions in order to properly match the different regions of the detector. To

provide the second coordinate a certain number of detectors are equipped with double modules.

The modules are then included in detectors, composed by one or two layers of sensors and the

front-end electronics mounted on a ceramic hybrid circuit.

The outer tracker sensors are processed on 500 µm thick silicon substrates while the inner

ones are 320 µm thick. In fact in the outer part of the tracker, to reduce the number of electronic

channels, larger detectors are needed. A wafer thickness of 500 µm is currently an industry

standard for 6” production lines and can compensate the reduction in signal to noise ratio, due

to the outer sensors increased strip length (and consequent increase in noise), with a better

charge collection. Part of the work performed for this thesis regards the study of signal to noise

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ratio (S/N) and charge collection in 500 µm thick detectors compared to the 300 µm ones.

The inner barrel consists of four layers equipped with rectangular thin detectors tilted by an

angle of 9 along the symmetry axis parallel to the beam to compensate for the Lorentz angle.

The strips are parallel to the beam axis and provide r−φ information; this choice is dictated by

the fact that the coordinate perpendicular to the magnetic field directly measures the transverse

momentum resolution and its precision determines the resolution. In addition, the first two

layers are double sided equipped with stereo detectors whose strips are tilted by 100 mrad angle

for reconstruction of the z coordinate. The inner barrel is built with a shell type mechanics, and

is cut in two at z = 0. Each half contains 6 detectors in z and a number varying from 28 to 56

in φ. The outer barrel is composed by 6 layers, with number 1,2 and 4 double sided. It is built

with a rod type mechanics and each layer is made of several rods containing 6 detectors in z.

The forward region consists of 9 big disks, each one made of 7 rings. The 3 outermost

are equipped with thick detectors, the 4 innermost with thin detectors. To match the circular

geometry of the forward part, sensors have a wedge shape, with strips arranged radially, pointing

to the nominal beam position, to optimize φ coordinate measurement. Stereo angle detectors,

located in rings 1,2 and 5, improve track finding and vertex measurements by providing the r

coordinate read-out. In this case too, detectors which provide the stereo coordinate are tilted

by an angle of 100 mrad with respect to the detectors that give the φ coordinate. The inner

end-cap is instrumented with 3 small disks, with sensors identical to those of the outer forward,

that close the inner barrel (see Fig. 1.7). The forward support structure is based on a sector

mechanics principle, whose basic element has a petal shape.

A single hit resolution of better than 20 µm in the inner part (40 µm in the outer tracker) and

a two track resolution better than 200 µm are required from the SST to allow an efficient overall

pattern recognition. These requirements reflects in a pitch ranging from 80 µm to 180 µm in the

barrel and from 80 µm to 200 µm in the end-caps. One related design goal is to maintain single

cell occupancies at the level of a per cent that, together with the noise requirements, determines

the maximum acceptable strip length (12 and 18 cm for inner and outer region respectively).

Another strong constraint in the detector design is the long term survival after heavy irradia-

tion. Radiation hardening is strongly affected by geometry design and by silicon bulk properties

and is necessary to keep signal to noise ratio above 10:1. With this value it is possible to obtain

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a single hit efficiency close to 100% and has been set as minimum value for silicon detector

operations after 10 years of LHC running.

Sensors are processed from 6” silicon wafers and are manufactured in nine different geome-

tries to equip the different tracker layers and rings. A small detector overlap, both in r − φ

and z coordinate, is foreseen to avoid dead regions and optimize alignment. The Silicon Strip

Tracker has a total number of roughly 10 millions electronic channels, read-out by 78256 front-

end chips and consists of approximately 170 m2 of instrumented silicon microstrip detectors

and 225 m2 silicon surface taking into account the contribution of double sided detectors [21].

Actual microstrip vertex detectors at LEP cover a surface two orders of magnitude smaller. This

difference and the fact that CMS SST must operate in hard radiation environment and with a

completely new generation of front-end electronics, points out the hard work necessary in terms

of research and development in order to be confident that required performances can be obtained

and maintained during the full experiment lifetime. The items described in this work have con-

tributed to study several aspects of SST project and to provide solid bases for the production

phase.

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Chapter 2

Silicon microstrip detectors

Silicon electrical and physical properties make this material one of the best candidates not only

for microelectronics applications but also for particle detection purposes. The planar technology

development [22] in the last two decades of XX century has allowed to build segmented p-n

junctions and to design detectors able to spatially localize the particle position with an accuracy

down to a few microns. In this field great importance has the possibility to use artificially grown

silicon crystals, with the requested purity and dimensions.

In this chapter the silicon properties are briefly summarized and the principle of operation of

a silicon microstrip detector is described. Main electrical and geometrical parameters involved

in the detector performances (see chapter 7) are analyzed and a prediction of the signal to noise

ratio is deduced for the detectors built by the Florence group. Furthermore a review of all the

module tested is given.

2.1 Silicon properties

Silicon is a semiconductor element belonging to the fourth group of the periodic table. The

crystal structure of silicon, that consists of a regular repetition in three dimensions of a unit cell

having the form of a tetrahedron with an atom at each vertex, strongly affects its electrical and

physical properties. The Si atom is tetravalent and, in its crystalline structure, shares each of the

four valence electrons with its neighbours forming covalent bonds. At a temperature different

from zero few of these bonds are broken and some electrons are free to contribute to conduction,

thus the material is classified as semiconductor.

This property is evident in terms of energy levels. For a perfect crystal (free of impurities

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and geometrical defects) the energy levels of outermost electrons are distributed in bands of

closely spaced energy states, separated by forbidden energy regions [23]. For a temperature

T=0 all the valence band levels are filled by electrons and the conduction band is empty. In

this situation the material is a perfect insulator. If T =0 some electrons can be excited in the

upper band, referred to as conduction band, and are free to migrate through the crystal lattice

while the lower band, called ”valence band”, is occupied by electrons that are bound to specific

sites in the crystal. The energy amplitude of the band forbidden to electrons that are included

between the energy of the highest valence band and the energy of the lowest conduction one

is known as bandgap Eg. Only electrons with energy greater than Eg are excited from the

valence band up to the conduction band leaving an empty site in the lower levels. This vacancy

is called a hole and, from a conduction point of view, it is a carrier of electricity comparable in

effectiveness with the free electron. In terms of atom bonds this mechanism can be depicted as

broken covalent bonds; the two representation are shown in Fig. 2.1.

Ec

EF

Ev

Forbidden region

Hole

Conduction Band

Intrinsic semiconductor

Valence Band

E

E=0E

e-

g

(a)

Si+4

Si+4

Si

+4

Si+4

Si+4

Si+4

Si+4

Si+4

Si+4

Valence electrons

Covalent bond

Hole

Silicon ions

Broken covalentbond

Free electron

(b)

Figure 2.1: (a) Band structure for outer shell electron energies in silicon. Electron-hole pairsproduction is shown together with the Fermi energy level EF . (b) Silicon crystal with a brokencovalent bond.

In crystalline silicon Eg = 1.12 eV at room temperature, to be compared with the 5 eV

or greater typical of insulators. The low value of the band gap makes silicon one of the best

candidates for particle detection purposes when small material volumes are necessary. In fact

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one gets, on average, an electron-hole pair for every 3.6 eV released by a particle crossing the

medium while 30 eV are required to ionize a gas molecule in a gaseous detector [24].

Furthermore the high density of the medium reduces the range of energetic secondary elec-

trons, produced by the incoming particle, allowing good spatial resolution.

In a crystal of pure silicon, referred to as intrinsic semiconductor, the thermally produced

hole and electron densities are equal. Most of semiconductor devices base their operation on

the introduction of a small (1 part in 106-108), carefully controlled, amount of impurities into

the intrinsic material. The addition of impurities forms an extrinsic or doped semiconductor

with the results that allowed energy states in the forbidden gap are generated and the number of

thermally produced carriers is increased. Usually silicon is doped with elements from the III or

the V groups thus resulting in p and n-type materials respectively. Typical impurity densities in

n-type materials range between 1012 and 1015 cm−3.

In n-type semiconductors some of the lattice sites are occupied by a pentavalent impurity,

usually phosphorus or arsenic. Four of the five valence electrons interact with the crystal silicon

atoms through a covalent bond while the fifth electron is weakly bound and is available as

a charge carrier. In fact the energy required to detach the fifth electron from an atom is of

the order of 0.05 eV in silicon and the thermal excitation at room temperature is sufficient to

break the bond and leave a positively charged ion in the crystal lattice. The net result is that

n-type silicon has an excess of electron carriers while the number of holes decreases because

the large number of electrons present causes the rate of recombination of electron-hole pair to

increase (according to the mass-action law). Consequently pentavalent impurities are referred

to as donors and electrons are the majority carriers .

In term of energy levels the n-type doping process generates a new energy level ED in the

forbidden gap just below the lower conduction band level EC , as shown in Fig. 2.2.

The Fermi level EF is positioned between ED and EC . For phosphorus doped silicon the

difference EC −ED is about 45 meV.

In p-type semiconductors elements of the third group (usually boron, gallium or indium)

are added to the silicon and they can fill only three covalent bonds. The unsaturated bond can

easily attach an electron from silicon atoms thus generating a hole. Therefore elements from

the third group are called acceptors and the majority carriers are holes. In terms of energy

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v

Forbidden region

E

E

F

D

Holes

-e

E

E=0

Valence band

E g

Conduction band

+ + + + + + + + + +

n-type semiconductor

cE

E

(a)

Si+4

Si+4

Si

+4

Si+4

Si+4

Si+4

Si+4

Si+4

Pentavalent

Valence electrons

Free electron

Covalent bond

+5

Silicon ions

impurity ion

(b)

Figure 2.2: (a) Band structure for outer shell electron energies in n-type silicon. Electron-hole pairs production is shown. (b) Crystal lattice with a silicon atom displaced by pentavalentimpurity atom.

levels the impurities create new states in the forbidden gap just above the higher valence band

level. At room temperature the unsaturated bonds are filled by thermally excited electrons thus

generating fixed negative charges in the silicon lattice.

In both the p and n-type materials there are carriers (called minority carriers) coming from

thermal excitation of silicon atoms. They play an important role in the behaviour of semicon-

ductor devices based on p-n junction (section 2.2).

A silicon electrical parameter that plays an important role in the design and characterization

of silicon microstrip detectors is the material resistivity ρ. The resistivity is related to the carrier

density and mobility µ by the following equation:

ρ =1

q(µnn+ µhp)(2.1)

where q is the electron charge and µn and µh are mobilities of electrons and holes respectively,

whose density is n and p. Mobility is defined as:

µ =v

E(2.2)

with E being the electric field and v the drift velocity, and has, at room temperature, the value of

1350 cm2/Vs for electrons and 480 cm2/Vs for holes. For intrinsic silicon at room temperature

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ρ 235 KΩ·cm; for doped materials this value is much lower because of a higher carrier

density.

2.2 The p-n junction

The p-n junction is the basic building block on which the operation of all semiconductor devices,

and in particular the silicon microstrip detectors, is based. A p-n junction is formed when a

single crystal of semiconductor is doped with acceptors on one side and donors on the other.

In order to easily depict the processes involved in such a device we will consider a planar step

junction built by ideally connecting two semiconductor crystals of p and n type as shown in

Fig. 2.3.

- -----

- + + + + + +

+ + + + + +

- -----

- -----

+ + + + + +

+ + + +

Donor ion

+ +

- +

+ + + + +

++++++

+-----

- - - - - -

------

p-type p n-type n

depleted region

- -+ + + +

+ + + +

- -

- -- -

p-n junction

+ Hole

Acceptor ion

- Electron

(a)

F

E v

E c

φe

E

n-type regionzona p zona n

p-type region n-type region

(b)

Figure 2.3: Representation of the planar p-n step junction (a) and energy level scheme (b).

Initially a concentration gradient exists across the junction and holes diffuse towards the n-

type region while electrons start to migrate in the opposite direction. Consequently the positive

holes which neutralized the acceptor ions near the junction in the p-type silicon have disap-

peared as a result of the combination with electrons which have diffused across the junction.

Similarly, electrons in the n-type silicon combine with holes which have crossed the junction

from the p material. The migration of free carriers creates at the same time a potential barrier φ

that contrasts the diffusion process until a stationary state is reached. In steady state conditions

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the region in the neighbourhood of the junction is depleted of mobile charges and therefore it

is called depletion region or space-charge region. During this process the Fermi energy levels

(EF ) in the two regions overlap and the overall result is a modification of the conduction and

valence band (see Fig. 2.3).

The voltage corresponding to the potential barrier, known as built-in voltageVbi, is of the

order of a few hundred millivolts at room temperature and for typical doping densities ND ∼1015 cm−3 (donor density) and NA ∼ 1017 cm−3 (acceptor density).

The electric field distribution E(x) along a direction orthogonal to the junction can be de-

rived by solving the Poisson equation with the condition E(xp) = E(xn) = 0, where xp and xn

are the limits of the depleted region in the p and n material respectively. One further constraint

is imposed by the neutrality of the depleted region, where the condition NAxp = NDxn must

be satisfied. The electric field behaviour turns out to be:

E(x) =

−eNA

ε(xp + x) −xp ≤ x ≤ 0

−eND

ε(xn − x) 0 ≤ x ≤ xn

(2.3)

where e is the electron charge and ε is the silicon dielectric constant. The potential in the

depleted region, with the condition V (xp) = 0, is:

V (x) =

eNA

2ε(xp + x)2 −xp ≤ x ≤ 0

−eND

2ε(xn − x)2 + φ 0 < x ≤ xn

φ = e2ε(NAx

2p +NDx2

n)

(2.4)

The width W of the space charge region is given by:

W =

√2εVbi(NA +ND)

eNAND(2.5)

For particle detector devices based on p-n junction, an external voltage Vbias of the same sign

as the built-in one is usually applied to the junction in order to increase the depletion region.

Under this circumstance the junction is said to be reverse biased and in the formula 2.5 Vbi must

be replaced by:

Vtot = Vbi + Vbias (2.6)

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In case the density of one type of doping element is much higher than the other, the depletion

zone extends mainly on the side with the lower doping concentration. This is an usual situation

in the design of silicon detectors which base their operation principle on a p-n junction (see

section 2.3). In this condition the expression for the depleted zone width can be approximated

by:

W =

√2εVtot

eNx(2.7)

where Nx is the lower doping density. The same quantity can be expressed in terms of the

material resistivity ρ (see eq. 2.1) and of the majority carriers mobility µ as:

W =√2ερµVtot (2.8)

It is evident from eq. 2.7 and eq. 2.8 that the depleted zone increases with the applied bias

voltage until the free carriers are removed from the whole silicon volume. The voltage value

that makes the detector completely depleted is known as full depletion voltage Vd:

Vdepl =eNxW

2max

2ε− Vbi (2.9)

From eq. 2.8 we can see that, for equal thickness, a lower full depletion voltage is obtained

in a high resistivity material. This is an important parameter in the CMS detector design since

silicon devices have to be fully depleted during the entire tracker lifetime, especially when

radiation effects deeply modify the silicon effective resistivity.

For example, for a 300 µm thick p-n junction, with a ND doping density giving a resistivity

of 4 KΩ·cm, the full depletion voltage is about 80 V.

The same equation allows to compute the full depletion voltage in terms of the material

resistivity, whose value is usually provided by the silicon device manufacturer. Vice versa,

from the Vd measurement the doping density Nx and the material resistivity (see eq. 2.1) can be

deduced.

It is worth noting that when a junction side contains both donors and acceptors with con-

centrations of the same order of magnitude, Nx represents the effective doping density Neff

defined as the difference between the numbers of donors and acceptors:

Neff = |ND −NA| (2.10)

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This quantity is one of the main parameters to be considered when dealing with irradiated de-

tectors as will be explained in section 3.1.

A fundamental quantity in a reverse biased junction, that is worth examining since it strongly

influences the silicon detector performances, is the leakage current . The depletion region is free

of majority carriers but under equilibrium conditions electron-hole pairs are thermally generated

everywhere within the crystal volume. The electric field generated by the bias voltage makes the

electrons and holes drift towards their electrodes giving rise to the leakage, or reverse, current.

Neglecting the diffusion current, that comes from charge generated in the neutral silicon

and diffusing to the space charge region, the generation current is the only contribution to the

leakage current. In this case the leakage current has a density given by:

Jgen =1

2qni

τ0W (2.11)

where ni is the carrier density in intrinsic silicon, τ0 is the effective lifetime of minority carriers

within the depletion zone and W the depletion zone width. The lifetime τ0 is inversely pro-

portional to the density of impurities or traps that are involved in generation and recombination

processes. Therefore special care must be taken in order to keep the silicon crystal “clean” in all

applications where the leakage current effect must be reduced, as in silicon detector production.

Moreover the lifetime is strongly affected by the presence of deep impurities, whose energy

levels lay in the central region of the forbidden gap. This effect explains the increase in leakage

current measured in the irradiated detectors tested in the framework of this work (section 3.1).

This current component is proportional to the depth of the depletion zone W and conse-

quently to√Vbias. It is worth noting that the generation current will stop to increase after the

bulk is fully depleted. Furthermore the dependence from ni makes necessary to keep the tem-

perature constant for a stable operation of the detector based on a reverse biased p-n junction.

Since there is a voltage dependent charge associated with the depletion zone the p-n junc-

tion shows a capacitor behaviour. The junction capacitance per unit area (also known as bulk

capacitance) is defined as [23]:

C =dQ

dVB=

dQ

dW

dW

dVB(2.12)

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where dW is the widening of the depletion region caused by an increase of the barrier voltage

dVB and dQ is the corresponding charge variation on both side of the junction. Modeling the

junction as a parallel plate capacitor and in the hypothesis of a junction side much more doped

than the other (Nx Ny), from Eq. 2.7 the junction capacitance per unit area is obtained:

C =

√qεNx

2VV ≤ Vdepl

εddepl

V > Vdepl

(2.13)

where Vdepl is the full depletion voltage and ddepl is the maximum allowed depth for the

depletion layer.

The junction capacitance decreases with increasing bias voltage, reaching a constant value

when the depletion layer reaches the back of the crystal. In this case a further increase of the

bias voltage would not change the charge on the junction side.

The depletion voltage can be measured from the voltage dependence of the junction capaci-

tance and, as we will see in next sections, is an useful estimation of the voltage to be applied to

the detector in operating conditions.

2.3 Principle of operation of silicon detectors

In pure silicon the intrinsic carrier density is about 1.45 · 1010 cm−3 at room temperature. The

total number of free carriers in a 300 µm thick silicon material, with a volume comparable to

the usual detectors, is of the order of 108, so four orders of magnitude higher than the expected

signal (see section 2.3.1).

The way to collect all the charge released by a particle crossing the silicon is to deplete

the detector volume from free carriers through a reverse biased p-n junction. In this situation

the depleted region draws only a little reverse current under the applied voltage, but any charge

deposited within its volume drift towards the junction and can be collected. The charge released

in the non-depleted zone quickly recombines with the free carriers and is lost. This implies that

silicon detectors should operate with an applied voltage sufficient to fully deplete the entire

crystal volume.

In Fig. 2.4 the principle of operation of a silicon detector is summarized. In this case the

p-n junction is carried out with a n-type silicon bulk, acting as detector volume, and a heavily

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doped, shallow, p+ implantation.

traj

ecto

ry

bias

bias

part

icle

p+ implant

metal

-

-

--

-+

++

++

- h

Bulk n

+-e

V

R

+

Figure 2.4: Principle of operation of a silicon detector.

The detector is depleted by applying a reverse bias voltage Vbias, by means of a bias resistor,

to a pair of electric contacts on the two sides of the junction. A charged particle that crosses the

detector generates along its path electron-hole pairs that drift towards the electrodes following

the electric field present in the depleted region. The charge is collected by the read-out electron-

ics and amplified. The resulting signal is proportional to the number of generated electron-hole

pairs and therefore to the energy loss of the particle.

2.3.1 Energy loss of high energy charged particles in silicon

High energy charged particles traversing crystalline silicon lose energy mainly by ionization.

The energy loss distribution for highly relativistic charged particles in thin absorbers is de-

scribed by the Landau theory [25], in the hypothesis of free electrons. In Fig. 2.5 the energy loss

distribution measured with MIPs (Minimum Ionizing Particles) crossing a thin silicon detector

(300 µm thick bulk) is shown. The shape of the distribution follows the Landau curve behaviour

but it is wider than expected. The discrepancy is overcome taking into account the effects of

the bindings of atomic electrons. A phenomenological calculation leads to derive the simplified

distribution, commonly used to fit experimental data, known as Moyal distribution [26]:

f(λ) =P1

2πe−

12(λ+e−λ) (2.14)

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P1 7987.P2 234.5P3 32.01

Signal (ADC counts)

Num

ber

of e

vent

s/bi

n

0

250

500

750

1000

1250

1500

1750

2000

2250

0 100 200 300 400 500 600 700 800

Figure 2.5: MIP experimental energy loss distribution in a 300 µm silicon detector. The resultof the fit with the curve described in eq. 2.14 has been superimposed.

with:

λ =E − P2

P3(2.15)

where P1 is a normalization factor, P3 is related to the distribution width, E is the released energy

and P2 is the most probable value of the energy distribution. For thin samples, as the wafers

commonly used for detectors, the average energy loss is significantly higher (about 50 %) than

the most probable one. This asymmetry is due to processes in which high energy electrons (δ

rays) are emitted in the material. These electrons themselves are able to generate up to several

times the mean energy loss. It is worth noting that ejected electrons with high energy have

a not negligible range inside silicon thus spoiling the spatial resolution performances of the

detector [27].

The average energy loss is about 390 eV/µm [15] for a MIP in silicon and is independent on

the thickness of the crossed material. Taking into account that the mean energy needed to create

an electron-hole pair is 3.6 eV, this value gives about 108 carrier pair for micron of traversed

silicon. The most probable value for the energy loss per unit length is about 280 eV/µm but

scales within 10 % for detector thickness ranging from 20 µm to 300 µm.

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2.4 Silicon microstrip detectors

In silicon detectors there is no multiplication of primary charge, as happens in gaseous devices,

and the collected signal is, in principle, a linear function of the detector thickness. In high

energy physics experiments silicon detectors are usually installed very close to the interaction

point where a large amount of material would spoil the track parameters measurement and the

electromagnetic calorimeter energy resolution. Thus the detector thickness should be as low

as possible, down to a practical limit set by the requirements on signal-to-noise ratio and, also

important, the related services (electronics, mechanics, cooling) should be carefully optimized.

The best compromise adopted for the CMS Silicon Microstrip detectors placed in the inner

region is a thickness of 320 µm for which one obtains on average 3.4 · 104 electron-hole pairs, a

signal easy detectable with low noise electronics. In the outer part of the tracker, to reduce the

number of electronic channels, larger detectors are needed. In this case the noise contribution

coming from the capacitive load to the front-end electronics is higher, consequently thicker

detectors (500 µm) are employed to keep the S/N in a reasonable range.

For tracking purposes, in order to obtain a position sensitive device, one side of the junction

must be divided into smaller elements. In the silicon microstrip detectors described in this thesis

the geometry adopted is the segmentation of the p+ junction side in an array of narrow strips.

Each strip has its own bias circuit and, together with the n-type bulk, behaves as a reverse biased

diode. Under the influence of the electric field the holes released by a ionizing particle crossing

the detector drift towards the closer strips. Coupling a read-out channel to each strip, a charge

measurements provides information about the coordinate of the particle position while crossing

the detector.

2.4.1 Single sided device

Track reconstruction requires detectors able to provide three dimensional information, at least

for some fraction of the Tracker layers. Referring to the cylindrical reference system of the CMS

Tracker (see section 1.5.2) the radial coordinate (axial in the end-caps) is directly obtained by

the mechanical position of the silicon layers, while the two remaining must be measured with

an appropriate detector design choice. The CMS collaboration has decided to use pairs of

single-sided detectors, coupled back to back, with the strips slightly tilted in order to obtain two

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coordinates information. This solution has been preferred to the double sided technology be-

cause, after an accurate R&D program [28], has showed to be the best choice from an industrial

production point of view, while maintaining the material budget under the requested limits.

The fundamental unit of a detector designed with a single segmented side is referred to as

single sided crystal. It is built starting from a n-type substrate (bulk). An array of narrow p+

strips, which provides one dimensional information, is implanted on one side (junction side).

The p+ on n junction based detectors offer a great advantage in terms of cost and industrial

production capacity since they are the simplest device that can be manufactured using the usual

semiconductor electronics production lines. However this choice has a drawback because, after

type inversion of the bulk induced by radiation, the detector must be over-depleted in order to

maintain satisfactory performance (see section 3.1).

The distance between two adjacent strips is called strip pitch and their width is referred to as

implant width. On the other side (ohmic side or backplane) the silicon bulk has an n+ implant

layer to ensure a good ohmic contact with the metal electrode and prevent minorities carriers

injection in the bulk [3]. In Fig. 2.6 the principle of operation of a silicon microstrip detector is

sketched, stressing the design geometry.

One of the most important design choice is the way the bias voltage is provided to each

strip. The solution adopted by CMS collaboration is mainly motivated by the requirements im-

posed by the hostile radiation environment the silicon tracker will have to operate in. Acquired

experience has shown that the best choice is to use sensor integrated resistors connecting each

strip with a common bias ring surrounding the detector active area. The bias voltage is applied

from the supply lines through microbondings to the bias ring and to the backplane and is dis-

tributed to the strips. The bias resistor value is a compromise between two contrasting needs;

it must be sufficiently high in order to keep low the thermal noise on the front-end electronics

(section 2.6.2) but, in the meantime, it has to maintain low the voltage drop across the resistance

due to the leakage current, which increases when dealing with irradiated detectors (section 3.1).

The implant strips have a voltage close to the bias ring (ground) since for typical values

(512 strips detectors, 1µA mean leakage current, 2 MΩ bias resistors), the voltage drop across

the resistor is only a few mV, negligible with respect to the applied bias during operation.

After irradiation this value increases, up to three orders of magnitude, still remaining into an

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Implant,p -type+

SiO +2

Si N3 4

t

S

EBulk,n-type

Pre-amplifiers/Shapers

Strip pitch, P

( 30

0um

)

electrons

holes

Particle

Backplane, n - type silicon++ Bias Voltage

Metallization

Implant width, W

Principle of operation

Figure 2.6: Principle of operation of a silicon microstrip detector. The bias section is not shown.

acceptable range.

A further p+ ring (guard ring) surrounds the bias ring in order to separate the space charge

region from the heavily damaged region along the cutting edge. In this way the active area of

the detector is isolated from potentially dangerous injection of charges from the cut region. The

CMS collaboration has allowed the detector manufacturer to use a multi-guard design provided

that the breakdown requirements are maintained. This is the case of the 500 µm thick detector

tested in the framework of this thesis (see section 7.3).

For what concerns the coupling capacitors, needed to insulate the read-out electronics from

the leakage current, the CMS collaboration has decided to integrate them directly on the detec-

tor. The easiest solution is to separate each implant strip from the read-out metal electrode by

a thin insulating layer, as shown in Fig. 2.6. This integrated capacitor is usually built by means

of a double layer of silicon oxides (SiO2 and Si3N4) to reduce the risk of pinholes.

The metal strips are then connected to the read-out electronics by means of ultrasonic mi-

crobondings.

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2.5 The Florence detector prototypes

The detectors described in this thesis have been completely designed, characterized and tested

by the Florence CMS group. They are part of a more extensive work performed from sev-

eral groups working for the Tracker in the framework of the so called “Milestone 1999” and

concluded with beam test measurements during summer 2000.

The sensors have been manufactured by CSEM, Switzerland, starting from a n-type sub-

strate 4” wafers. Since the final version of these prototypes will be installed in the end cap

region of the tracker, they have been designed adopting a wedge geometry layout. The detector

thickness is 300 µm and corresponds to a MIP most probable signal of 24000 electron-hole

pairs (see Section 2.3.1).

In order to compare the performances of different detectors, with particular emphasis placed

on the radiation tolerance studies, the same design has been carried out on two different sub-

strate types, a low resistivity one with <100> crystal lattice orientation, and a high resistivity

one with <111> orientation. The main differences between the two type of substrates, with

respect to the silicon detectors requirement, is that the <111> detectors have a greater density

of silicon-oxide interface charges and defects and this affects the quality of the oxide too. A

deep characterization is therefore needed in order to understand which kind of orientation is

best suited for the CMS experiment.

A parallel analysis has been carried out, in the framework of this thesis, with respect to the

substrate resistivity, that strongly affects the depletion voltage before and after irradiation. In

the following I will refer to high resistivity (HR) and low resistivity (LR) for substrates with

initial measured resistivity of about 6 KΩ·cm and about 1 KΩ·cm respectively.

The fundamental unit of the Silicon Microstrip Tracker is a module made by one or two

sensors; in this second case the strips are daisy chained together to obtain a larger detecting

surface while keeping the total number of electronic channels into an affordable range. The

wedge modules assembled in the framework of this thesis are composed of two sensors with an

overall strip length of about 12.7 cm.

Since the two crystals have different dimensions, due to the wedge geometry, in the follow-

ing they will be referred to as F4 for the crystal closer to the read-out electronic and F5 for

the other one. Each crystal has 512 p+ strips implanted with a constant angular pitch of 0.23

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mrad. The strips point to the nominal beam position. The main geometrical parameters are

summarized in Table 2.1, where N is the number of strips, L their average length, P the strip

pitch, W the constant strip width (∼ 25µm), Wm the metal implant width on the junction side,

A the detector active area.

Detector N L P W/P Wm A(cm) (µm) (µm) (cm2)

F4 512 6.59 108.5 - 123.7 0.2 - 0.23 33 39.26

F5 512 5.64 124.3 - 137.4 0.18 - 0.20 33 37.83

Table 2.1: Main detector geometrical parameters.

The layout of the two detector crystals daisy chained together is sketched in Fig. 2.7; the

resulting single sided module is called an rφ module and, if coupled to a sensor with strips

slightly tilted with respect to the radial direction, provides a double coordinate information.

pitch 137.4 um

F5

F4

512 strips

junction side

junction side

73.12 mm

58.87 mm

68.45 mm

57.97 mm

pitch 108.5 um

pitch 124.3 um

Figure 2.7: Module layout with two crystals daisy chained together.

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A module, connected to the front-end electronics and glued on a carbon fiber support is

shown in Fig. 2.8. It is clearly visible the hybrid that houses four APV6 chips and the pitch

adapter connecting the shorter side of a F4 crystal to the read-out chips. The bias voltage

connections are placed on the right bottom corner of the module. A kapton cable (on the

bottom) provides all the electrical lines needed to operate the detector and to acquire the signals.

Figure 2.8: The complete detector module.

The implant strips are coupled to the readout chip through integrated capacitors as described

in section 2.4.1. In order to reduce the risk of metal-implantation short circuits (pinholes) the

detector has been designed with a multi-layer structure. The dielectric is deposited as a double

layer made of SiO2 and Si3N4 with the goal of decoupling single layer intrinsic defects.

Each metal strip has two aluminium pads on both side of the sensor in order to allow the

micro-bonding connection. Due to the role they play they are called AC pads. The spare pads

are reserved in case of failure during the first micro-bonding procedure.

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The elements connecting the bias ring with the p+ implant strips are polysilicon resistors

with a winding structure in order to obtain larger resistance values. The polysilicon material

has been chosen by the CMS collaboration for its good radiation hardness.

All the structures described above are depicted in Fig. 2.9, which shows the original design

of the detector junction side corner.

p+ strips

Guard Ring

Bias Ring

AC Pads

DC Pads

Bias Resitors

Figure 2.9: Design of the detector junction side corner.

It is worth noting that bias resistors are distributed every second strip on both ends of the

sensor in order to satisfy the stringent space requirements. Furthermore the metal pads contact-

ing the node between the bias resistor and the implant strip are visible. These structure, called

DC pads, can be contacted at the surface of the detector and are used for testing purpose and

characterization described in next section.

2.5.1 Electrical characteristics

Since the detector performances depend on the electrical impedances of the sensors it is worth

defining the main capacitive and resistive components that characterize such devices. In Fig. 2.10

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the cross section of a microstrip device with the main capacitances present between the detector

elements is shown.

Bulk n

insulator

CCCAC AC AC

Cb bC bC

Cimp C Cimp

Cmet Cmet Cmet

imp

CAC

Cb

metal (Al)

p+ implant

n+ implant

Figure 2.10: Cross section of a microstrip device and main capacitances involved in its charac-terization.

The definitions of the components are the following:

• The coupling capacitance CAC is the capacitance between each implant strip and its re-

lated aluminium readout strip. Its value depends on the strip width and on the dielectric

material and thickness. The coupling capacitance is responsible for the induction of the

electronic signal on the front-end chip input when charge is collected on the implant strip.

• The back plane capacitance Cb is the capacitance between the implant strip and the back

plane. It behaves as the typical capacitor associated to a reverse biased p-n junction, as

mentioned in section 2.2. Cbulk is the total bulk capacitance measured between the bias

ring and the back plane.

• The interstrip capacitances are the ones between two consecutive implant or metals strips,

Cimp and Cmet respectively. They depend mainly on the strip pitch and width. Further-

more each strip shows capacitive couplings, although of lower intensity, with the next

order neighbour strips.

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All these impedances have been measured directly on detectors with a probe station in a clean

room. Furthermore a complete characterization of bias resistor, metal strip resistance and leak-

age current has been carried out in order to understand the device behaviour and quantify the

contribution of each component to the signal to noise ratio (Section 2.6). Thus we are able to

know the best operational conditions for the final module and to predict its performance.

In the following the clean room characterization results are summarized, with particular em-

phasis on the measurements interesting the quantities that affect the final module performances.

Leakage current

The leakage current value as a function of the applied voltage depends mainly on the silicon

bulk impurity and defect concentration . Such measurement is a good indicator of the fabri-

cation process quality and allows to select detectors with lower leakage current thus reducing

shot noise and the heating of the device that can eventually result in thermal runaway. The

measurement setup is shown in Fig. 2.11 together with a typical total leakage current vs. bias

voltage curve. The current shows a behaviour proportional to√Vbias, as expected from Eq. 2.11

p

Aluminium metal strip

Silicon Silicon

p

Bias resistor

Bias ring

Guard ring

Implant p+Implant p

n

Bias ring

Bias resistor

Oxide

0.3

mm

Aluminium back-plane~ 60 mm

Keithley 237

H L

+n

+Implant

Voltage generator

AC padDC Pad

(a)

Vbias(V)

I(A

)

T = 21oC

10-8

10-7

10-6

10-5

0 200 400 600 800 1000

(b)

Figure 2.11: (a) Scheme of the experimental setup used for the leakage current measurement.(b) Leakage current as a function of the applied voltage for a F4 detector.

and 2.8, before reaching the full depletion voltage. This confirms that the generation current is

the main component of the leakage current. After a knee in the current-voltage curve, corre-

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sponding to the full depletion voltage, the current increases slowly due to the overall effect of

the edge current arising from lateral bounds of the depleted zone, the interface current due to

electron hole-pair generation at the silicon-oxide interface and the injection of majority carriers

from the metal backplane. An abrupt increase of the current takes place in correspondence of

a voltage known as breakdown point which ultimately limits the detector bias voltage. The I-V

measurement allows to select the detectors with a breakdown voltage far beyond the expected

operational bias voltage. This parameter is 500 V for the devices to be used in CMS, even after

the heavy irradiation accumulated in 10 years of LHC operation. Typical values of the strip

leakage current is of the order of a few nA for non irradiated devices.

In some detectors the leakage current shows one or more discontinuities after the full deple-

tion voltage plateau , as shown in Fig. 2.12(a). This current increase is localized to a few strips,

as emerged by scanning the strip currents one at a time with a probe card, and is mainly related

to localized defects in the n+ layer between the metal backplane and the bulk. Such a mea-

Vbias(V)

I(A

)

T = 21oC

10-8

10-7

10-6

10-5

10-4

0 200 400 600 800 1000

(a)

strip

I stri

p(A

)

T = 23oC

Vbias = 350 V

10-12

10-11

10-10

10-9

10-8

10-7

10-6

200 400

(b)

Figure 2.12: (a) Leakage current for a detector with a faulty strip. (b) Single strip leakagecurrents for a F5 detector. The faulty strip is clearly visible.

surement allows to disconnect the faulty strips from the front-end electronics and eventually to

reject a detector if their number exceeds a certain threshold. This last operation is necessary to

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fulfil the stringent requirements of the CMS experiment that imposes a maximum of 1% broken

strips on a single crystal.

Bulk capacitance and full depletion voltage

The bulk capacitance measurement is fundamental for the detector characterization because

from its dependence on the bias voltage it is possible to measure the full depletion voltage and,

furthermore, it is strictly related to the single strip backplane capacitance Cb. This last quantity

is obtained, in the model of parallel plate capacitor, simply dividing the Cbulk value by the

total number of strips. All the values reported have been measured with a LCR meter at low

frequency, where the impedance shows a purely capacitive behaviour.

In Fig. 2.13 the bulk capacitance versus bias voltage is shown and the full depletion voltage

is extracted, following Eq. 2.13 (b), from the plot 1/C2bulk versus bias voltage as the intersection

of the plateau value and a linear fit at lower voltages.

Vbias(V)

Cbu

lk(p

F)

f = 1 KHzCbulk

0

2000

4000

6000

8000

10000

12000

14000

0 20 40 60 80 100

(a)

Vbias(V)

1/C

2 bulk

(pF

-2)

f = 1 KHz

Vdepl = 53 V

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

x 10-6

0 20 40 60 80 100

(b)

Figure 2.13: (a) Bulk capacitance as a function of the bias voltage for a F5 high resistivitydetector. (b) Extrapolation of the full depletion voltage for the same detector. All measurementare taken at 1 KHz.

The mean value obtained for the full depletion voltage of the high and low resistivity detec-

tors are (54± 10)V and (240± 30)V respectively.

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From the depletion voltage measurements and writing Eq. 2.8 in the form:

ρ =W 2

s

2εVsµ(2.16)

the resistivity turns out to be ρ = (5.8±1.1)KΩ·cm for HR detectors and ρ = (1.1±0.2)KΩ·cm

for LR ones, where Ws is the crystal thickness. Furthermore from Eq. 2.7 the effective donor

density can be measured and results (7.9±1.5)·1011 cm−3 for the HR substrate and (35±4)·1011

cm−3 for the LR one.

Strip and bias resistances

All the metal electrodes and polysilicon resistance have been systematically measured on the

detectors using a probe card. The mean values are presented in Table 2.2.

Coupling and implant capacitances

The coupling capacitance value affects the charge collection and noise of the detector, as will

be explained in section 2.6. The measurement of this quantity, fundamental to properly charac-

terize the detector, is reported in Table 2.2. We can observe that the CAC value is higher for the

<100> detectors since for such crystal orientation the dielectric layer is 20% thinner.

Furthermore broken capacitors have been revealed by contacting all the metal strips with a

probe card and by applying a direct polarization (1 V) between the metal strips and the back-

plane, as shown in Fig. 2.14 (a).

When the metal strip is in direct contact with the p+ strip due to a pinhole in the double layer

oxide, the measured current is several orders of magnitude higher than in case of good coupling

capacitor and the defect is easily detectable (Fig. 2.14 (b)). The strips with pinholes are less

than 1% for all the detectors tested. These strips are not bonded to the front-end electronics

when a module is assembled.

The measurement of the implant interstrip capacitance (Cimp) is necessary since it is the

main contribution to the total capacitance that the pre-amplifier senses at its input and that must

be minimized in order to reduce the noise (see section 2.6). From Table 2.2 we observe that

both the metal and implant capacitances depend on the strips pitch and width, as expected from

geometrical consideration, but not on the substrate resistivity and crystal orientation.

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L

PinholeI

Switch array

Voltage generator

Probe Card

Keithley 7002

HP 4142B-MPSMU

H

(a)

strip

I(A

)

Direct bias1 V

10-13

10-12

10-11

10-10

10-9

10-8

10-7

10-6

10-5

10-4

100 200 300 400 500

(b)

Figure 2.14: (a) Experimental setup to detect pinholes in the double oxide layer. (b) Evidenceof oxide defects in a F5 HR damaged detector.

Summary of the main electrical parameters

In Table 2.2 the main electrical quantities involved in the detector characterization and noise

evaluation are summarized. Their values, when possible, are presented as value per strip and

per unit length.

Detector Type Rbias Rmet Cb CAC Cimp Cmet

(MΩ) (Ω/cm) (pF/cm) (pF/cm) (pF/cm) (pF/cm)

F4 <111> 1.76 6.7 0.38 33.3 0.227 0.080

F5 <111> 1.76 6.7 0.41 32.8 0.206 0.074

F4 <100> 2.17 6.5 0.38 38.6 0.223 0.080

F5 <100> 2.17 6.5 0.43 39.0 0.207 0.074

Table 2.2: Main electrical parameters for non irradiated devices measured with the detectorsoverdepleted.

It is worth noting that the Cb value is greater for the F5 geometry, according to the increase

in the strip pitch with respect to the F4 detectors, while it is independent on the substrate type.

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2.6 Signal and Noise evaluation

Performances in terms of signal to noise ratio are strongly affected by detector electrical param-

eters, as well as by the readout electronics. For tracking purpose the S/N is the main responsible

for an optimal detection of the passage of a particle through the sensor. An evaluation of the

charge collected from the detector and of the noise affecting the measurement is fundamental

during the design phase and as cross check with experimental data to understand if the device

is working properly and where possible improvements can be made.

The electrical parameters of the detector are fundamental with respect to the noise consid-

eration too. In fact the read-out electronics noise is the main component to the total noise and it

heavily depends on the impedances seen by the pre-amplifier.

2.6.1 Charge collection

The charge released by a particle crossing the detector is not completely collected by the read-

out electronics. In fact, in order to evaluate the signal read-out by the front-end chip, it is

necessary to take into account the complex network of sensor capacitances that describes the

silicon detector.

In Fig. 2.15 a circuit sketch of a silicon sensor with its pre-amplifier stages is shown; the

black dots are the metal read-out strips, kept at a virtual ground by the front-end electronics,

while the open points are the implant strips.

The charge released by a particle crossing the detector near the strip called ”B” has been

schematized as a current source between the node ”B” (hit strip) and ground. Since the points

”A” (neighbour metal electrodes) are connected to the pre-amplifier inputs and can be consid-

ered fixed to ground, the charge is shared between the coupling capacitance CAC and the sum

of all the other capacitances (Cstrip)that the implant strip ”B” sees to ground. The fraction of

charge collected by the coupling capacitor is therefore given by the ratio:

CAC

CAC + Cstrip(2.17)

where Cstrip, the strip capacitance, once solved the circuit in Fig. 2.15 turns out to be:

Cstrip = Cb + 2Cimp(CAC + Cb)

CAC + Cimp + Cb(2.18)

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ground ground

ground

backplane

B

AAmetC

AC

virtual

virtualvirtual

C imp

C

C

b C

C

b

C

C

C

b

met

impC

AC AC

Figure 2.15: Schematic representation of the impedances involved in charge collection in asilicon detector. Black dots are the metal read-out strips, open circles the implant strips (Cross-section view).

It is evident that in order to reach the best charge collection efficiency the following condition

must be satisfied:

CAC Cstrip (2.19)

From the measured values, summarized in Table 2.2, it appears that during the operational

conditions (detector fully depleted) the coupling capacitance is large with respect to the implant

one and the following approximation can be made with an error less than 1%:

Cstrip Cb + 2Cimp (2.20)

The second neighbour metal strip contribution C2imp is of the order of 10%Cimp. In order to

take into account the effects of the second neighbour metal strips on the Cstrip it is sufficient to

substitute Cimp with 1.1 · Cimp [29]. From Eq. 2.20 it is evident that the coupling capacitance

must be larger than the back plane and the implant capacitance in order to optimize the charge

measurement by the front-end amplifier.

2.6.2 Noise evaluation

The noise that affects the performance of a silicon detector is usually expressed in terms of

equivalent noise charge (ENC), that is the charge to be injected in the input of an ideal noiseless

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amplifier so to have an output equal to the r.m.s. fluctuation value of the real amplifier. In terms

of signal to noise ratio is the charge that corresponds to S/N= 1.

The total noise present at the front-end chip output is the resulting effect of several contribu-

tion, originating from the electrical components of the detector and from the read-out electronics

noise. In order to quantify the noise contributions, a single p+ strip can be schematized as the

series of a diode, with a capacitance Cstrip in parallel with it, and the series resistance Rs seen

by the pre-amplifier. (see Fig. 2.16).

R biasIf

APV6

C R sBVbias

Cstrip

AC

(a)

i n

enC tot

(b)

Figure 2.16: (a) Electrical scheme representing a single strip connected to a front-end chipchannel used to evaluate the noise contributions. (b) Detector noise sources.

The series resistance Rs is the sum of two impedances: the pitch adapter resistance (Rpa ∼20Ω) between the detector metal strip and the electronic channel, and the metal strip resistance,

being negligible the bonding wire contribution. Since the metal strip resistance Rmet is dis-

tributed along the strip, a transmission line effect occurs and the effective value for the series

resistance turns out to be [30]:

Rs =Rmet

3+Rpa (2.21)

The diode is reverse biased through a bias voltage Vbias and a bias resistor Rbias and is

coupled to the front-end chip pre-amplifier by means of the coupling capacitance CAC . The

leakage current is taken into account by a current generator in parallel with the diode. According

to this model the physical noise sources can be identified in the strip leakage current (shot noise)

and in the bias resistor and series resistor (thermal noise), to be added to the contribution of the

read-out electronics.

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Summarizing, the noise sources mentioned above can be modelled as a current generator in,

in parallel with the diode representing the strip, related to the shot noise and to the bias resistor

thermal noise, and a voltage generator en, related to the series resistance, in series between the

amplifier and the detector, as shown in Fig. 2.16(b). Ctot is the total capacitance as seen from

each front-end chip channel input.

The noise expression depends on the effects of the pre-amplifier and shaping sections of the

read-out chip. In the case of the CMS front-end chip, the APV6 (see chapter 4), we can consider

a CR-RC semigaussian formation with a shaping time τ of 50 ns. If we express the contribution

to the series and parallel noise in terms of ENC (electrons number), we have [30]:

(ENC)2series =

e2

8q2C2tot

1τe2n

e2n = 4KTRs

(2.22)

and (ENC)2parallel =

e2

8q2 τi2n

i2n = 2qIf + 4KT/Rbias

(2.23)

where q is the electron charge, e is the Euler constant and τ is the shaping time. The expression

for the total strip capacitance seen at the readout input with respect to ground is obtained from

Fig. 2.15 and is:

Ctot = 2Cmet +CACCstrip

CAC + Cstrip(2.24)

The capacitance values in Eq. 2.24 are referred to the full module strip, which is composed

by the contribution of two crystals. Since the two consecutive strips are connected through the

AC pads by a microbonding, and in the same way are connected the bias rings and the ohmic

side metal implants, each kind of capacitance is in parallel with the corresponding one on the

adjacent crystal and their effect on Ctot must be summed.

The behaviour of the total capacitance, calculated from the laboratory measurement, is

shown in Fig. 2.17 as a function of the bias voltage for two crystal orientations. We can observe,

as expected, that Ctot is approximately constant for a bias voltage greater than the depletion volt-

age. In fact the total capacitance depends on the Cstrip capacitance which, in turn, is dominated

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Vbias(V)

Cto

t(pF

)

Module <111>

non irradiated

5

10

15

20

25

30

35

40

45

25 50 75 100 125 150 175 200

(a)

Vbias(V)

Cto

t(pF

)

Module <100>

non irradiated

5

10

15

20

25

30

35

40

45

100 200 300 400 500 600 700 800

(b)

Figure 2.17: Total capacitance behaviour vs. bias voltage for a) <111> e b) <100> crystalorientation.

by Cimp and Cb. From the measurement performed in laboratory, summarized in Table 2.2, it

has emerged that, once the bulk is overdepleted, the implant and bulk capacitance are mainly

functions of the design geometry, that is the same for the different orientation prototypes.

This fact explains why the Ctot is similar for the two detectors, the only difference depending

on the CAC value. This last contribution is more strongly dependent on the <100> or <111>

orientation and the oxide thickness.

The Ctot value is of fundamental importance in the noise evaluation since is the only external

parameter that appears in the amplifier noise expression and that can be partially under the

designer control. In our case the APV6 chip noise in peak mode can be parametrized as [3]:

ENCAPV 6 = a + b · Ctot(pF ) (2.25)

with a = 510 e− and b = 36 e−/pF.

The APV6 chip can be operated in a second distinct mode, as will be explained in chapter 4,

that is called deconvolution mode and that effectively reduces the time shaping constant [31]

at the expense of a larger amplifier noise. In this case we have, referring to Eq. 2.25, that the

coefficients are a = 1000 e− and b = 46 e−/pF. The shorter time constant obtained by the decon-

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volution algorithm has an effect on the series and parallel noise too. It can be demonstrated [31]

that for a CR-RC pulse shape with a nominal peaking time of 50 ns and a sampling time of 25

ns the effect of the deconvolution method on the noise is taken into account by multiplying the

expressions (2.22) and (2.23) with appropriate weights:(ENC)deconvseries = (ENC)peakseries · 1.45

(ENC)deconvparallel = (ENC)peakparallel · 0.45(2.26)

We observe an increase of the series noise and a lowering in the parallel noise contribution.

So the deconvolution method is well suited for application where large leakage current are

present, as happens for irradiated detectors (see Appendix B).

The total noise is the quadratic sum of all the contribution mentioned above (parallel, series,

APV6) and, for the detectors described in this work, is principally affected by the amplifier

noise. The expressions (2.22) and (2.23) can be formulated in a simplified form parametrized

as a function of the measured quantities. For a temperature of -10C, corresponding to the

operating conditions at CMS, they are:

ENCIf 107 ·

√If (µA)τ(ns) e− (2.27)

ENCRs 23 · Ctot(pF ) ·√

Rs(Ω)/τ(ns) e− (2.28)

ENCRbias

√2 · 23 ·

√τ(ns)/Rbias(MΩ) e− (2.29)

In the last equation the term√2 arises from the quadratic sum of the bias resistor contribu-

tion for each crystal making up the module.

From the above relations it turns out that the parameter involved in charge and noise mea-

surement are the capacitance components, the bias and metal strip resistances and the leakage

current. All these quantities have been measured as described in section 2.5.1 (the leakage cur-

rent has been measured during operation too), so that the signal to noise ratio expected can be

compared to the experimental value. This will be the subject of section 7.2.

The module expected total noise, expressed in terms of ENC (electrons), as a function of the

bias voltage is shown in Fig. 2.18 for the<111> HR non irradiated detector and the <100> LR

irradiated detector. Both the peak and deconvolution noises are calculated taking into account

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the measured electrical components (see section 2.5.1 and section 3.3 for the irradiated modules)

and the operational leakage current. The front-end chip, series and parallel noise contributions

to the total noise are also shown.

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Vbias(V)

EN

C(e

- )

ENCIf

ENCRpoli

ENCRs

ENCAPV6

ENCtot

<111> HR non irr. detector

peak mode

0

250

500

750

1000

1250

1500

1750

2000

20 40 60 80 100 120 140 160 180 200

(a)

Vbias(V)

EN

C(e

- )

ENCIf

ENCRpoli

ENCRs

ENCAPV6

ENCtot

<111> HR non irr. detector

deconvolution mode

0

500

1000

1500

2000

2500

3000

20 40 60 80 100 120 140 160 180 200

(b)

Vbias(V)

EN

C(e

- )

ENCIf

ENCRpoli

ENCRs

ENCAPV6

ENCtot

<100> LR irradiated detector

Peak mode

0

500

1000

1500

2000

2500

3000

100 200 300 400 500 600 700 800

(c)

Vbias(V)

EN

C(e

- )

ENCIf ENCRpoli

ENCRs

ENCAPV6

ENCtot

<100> LR irradiated detector

Deconvolution mode

0

500

1000

1500

2000

2500

3000

100 200 300 400 500 600 700 800

(d)

Figure 2.18: Expected total noise (ENCtot) and APV6 chip, series and parallel noise contri-butions to the total noise as a function of the bias voltage for the <111> HR non irradiatedmodule ((a) peak mode (b) deconvolution mode) and for the <100> LR irradiated module((c) peak mode (d) deconvolution mode). The noise is expressed in electrons. The total noiseincrease due to the deconvolution algorithm is clearly visible (b) (d).

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Chapter 3

Irradiated silicon microstrip detectors

The CMS microstrip silicon detectors will operate in an unprecedented radiation environment,

characterized both by particles produced in the primary proton-proton interaction and by albedo

neutrons emitted by backscattering from the electromagnetic calorimeter surrounding the tracker.

An average fluence of 1.6 · 1014 1 MeV equivalent n/cm2 is envisaged on the devices closer to

the interaction point, after 10 years of LHC operations. It is then evident that one of the most

critical issue of the silicon tracker is the long-term survival after heavy irradiation and that a

detailed study of radiation effects on detector performances is required in order to guarantee an

optimal behaviour during the full experiment lifetime. Furthermore, from the characterization

of the sensors after irradiation, the expected signal to noise ratio and the optimum operating

conditions can be foreseen. For these reasons a set of detectors has been irradiated up to a flu-

ence of 1.1 · 1014 1 MeV equivalent n/cm2, corresponding to the foreseen radiation value after

10 years of LHC operations in the region where they will be installed, and their performances

have been compared with similar non-irradiated modules. Finally, results obtained with the sev-

eral specimens built in Florence allow to compare the irradiation effects with respect to crystal

orientation and bulk resistivity.

We will show that the main macroscopic effects after heavy irradiation reflect in a full de-

pletion voltage change and in an increase of the leakage current. In order to have the detector

properly operated the temperature must be kept low and the bias voltage must be adjusted so to

overdeplete the bulk in its new conditions.

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3.1 Radiation damage in silicon detectors

At the microscopic level the radiation damage suffered by the detectors can be divided in two

different classes: effects which are due to surface damage and those which are due to bulk

damage, the latter being the greatest source of concern since they ultimately limit the detector

functionality.

3.1.1 Surface damage effects

The electron-hole pair generation in the silicon bulk, induced by ionizing radiation, is a com-

pletely reversible process without damaging effect. The behaviour is different in the insulating

oxide layers present on the detector surface since some holes become trapped in the oxide or

interact with atoms at the silicon-oxide interface to form interface states. Fixed positive charge

in the oxide layer modifies the electric field in the detector, while interface states give rise to

new energy levels in the forbidden gap which can modify the device behaviour. The net effect

is the forming of an electron layer in the silicon close to the oxide interface with the conse-

quent decrease in inter-strip isolation, causing unwanted signal charge sharing, and an increase

in inter-strip capacitance, which is the major factor in determining the electronic noise of the

system. However we will show that a careful choice of the fabrication technology and of the

detector design can minimize these damage effects to an acceptable level. In particular the cou-

pling between the strips is influenced by the oxide quality (process dependent); this effect is

reduced by substantially over-depleting the device. The tests performed on Florence detectors

have shown that our devices can operate at high bias voltages thus minimizing the radiation

surface effects.

3.1.2 Bulk damage effects

Bulk damages are generated when the incident particle transfers enough kinetic energy to a

silicon atom to move it from its lattice site. The displaced atom is called primary knock-on

atom (PKA) or recoil atom . The PKA and the lattice vacancy are known as point-like defects

and introduce allowed energy levels in the forbidden gap.

The energy threshold for this process is 185 eV for a neutron impinging on a silicon atom but

the particles involved in the tracker radiation damage have energy orders of magnitude greater.

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This implies that not only the incident particle can produce further displacements but the PKA

itself can be emitted with an energy enough to produce more displacements and defects. Most of

the initial energy is lost by ionisation and only a small fraction contributes to the displacements.

This is not true at the end of the recoil atom path where the energy loss density increases and

a dense defect region is created. Quickly most of the point-like defects recombine and only

those which do not annihilate form more stable complex defects or migrate towards the surface.

These defects can be classified as acceptors or donors, depending on the electrical properties

and on the energy level position they occupy in the forbidden gap, and since the acceptor type

dominates, this results in an effective doping concentration change in silicon.

The two principal effects of this process are a change in the effective doping concentration

of the substrate material and an increase of the leakage current.

In spite of the large amount of studies performed on irradiated silicon detectors a complete

model to describe the changes in effective doping concentration as a function of absorbed flu-

ence, time and annealing temperature has not been proposed yet. In the following we will refer

to the empirical model known as Hamburg model , which agrees with most of the experimental

data [32] [34]. According to this model the change of effective doping concentration can be

parameterized as the sum of three contributions:

∆Neff = Neff,0 −Neff = Nc(φ) +Na(φ, t, T ) +NY (φ, t, T ) (3.1)

where Neff,0 and Neff are the effective doping concentrations, respectively before and after ir-

radiation, φ is the irradiation fluence, t is the time elapsed since irradiation and T is the absolute

temperature the detector has been maintained after exposure.

The first term Nc is the contribution due to defects that are stable in time; it depends on a

decrease of donors, exponentially saturated with fluence, and on an increase of acceptors, linear

with fluence:

Nc(φ) = NC,0(1− exp(−cφ)) + gcφ (3.2)

where NC,0 is closely related to the initial doping concentration and can be thought as the num-

ber of removable donors, c and gc are the donor removal and acceptor creation parameters. A fit

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type inversion

p-typen-type

Figure 3.1: Change in the effective doping concentration, due to the stable contribution, as afunction of the irradiation fluence. The fit of Eq. 3.2 to the experimental points shows a goodagreement with data [35].

of equation 3.2 to experimental data measured on neutron and electron irradiated detectors [35]

is shown in Fig. 3.1.

With increasing fluence the doping density decreases until the residual donor and the newly

generated acceptor populations are equal and the silicon bulk becomes intrinsic; at higher flu-

ences the bulk is type inverted and the effective doping concentration is mainly due to radiation

induced defects. In any case the polarity of reverse biasing in initially p+-n devices does not

change with type inversion, simply the junction moves from the p+ implant strip side to the n+

contact on the back side of the detector. From the behaviour of Neff as a function of fluence

it is evident that the inversion point depends strongly on the initial resistivity (N eff,0) and this

characteristics reflects on the dependence of the full depletion voltage versus fluence. In fact

we can express the depletion voltage as a function of Neff (see Eq. 2.9) as:

Vdepl =ed2

2εNeff (3.3)

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where d is the detector thickness. In Fig. 3.2 the predicted evolution of the depletion voltage ver-

sus LHC time operation for silicon detectors is shown, stressing on the dependence on substrate

resistivity. Low resistivity devices must be operated at higher voltages in the first period but

gain safer operating condition after heavy irradiation with respect to high resistivity substrates.

Time (years)

Dep

leti

on

Vo

ltag

e (V

)

0

50

100

150

200

250

300

350

0 1 2 3 4 5 6 7 8 9 10

= 1 k •cmρ Ω

= 4 k •cmρ Ω

Figure 3.2: Predicted evolution of the depletion voltage with respect to LHC irradiation time fortwo different initial resistivities. The detectors are supposed to be in the first layer of the barrel.For each initial resistivity two curves are shown, one assuming a total fluence of 1.6·1014 n/cm2,the other, more pessimistic, 2.4 · 1014 n/cm2 [3].

The change in the full depletion voltage is a fundamental process that has to be taken into

account when dealing with irradiated detectors since they should be operated overdepleted since

the first years of LHC running but, on the other hand, the breakdown threshold must never be

exceeded.

The second term in Eq. 3.1 describes the decay of the active acceptor defects, created during

the irradiation period, back to neutral inactive sites, hence the name of beneficial annealing.

This effect is produced by an arrangement of the defects in the short time after irradiation and

it shows an exponential decay with a time constant, strongly dependent on temperature, which

ranges from about 2 days at 20C to 250 days at -10C.

The last term is the reverse annealing effect and its behaviour is opposite to the beneficial

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one. NY starts from zero at t=0 and saturates to a final value proportional to the fluence with

a time constant of two years at room temperature. Since reverse annealing is a cumulative

process it is necessary to cool the silicon detector (down to -10C) not only during beam periods,

when this procedure is necessary to reduce the leakage current too, but also during the stand-by

period. Otherwise, after years of operation, the increase of the defects would always lead to full

depletion voltages greater than the detectors breakdown threshold. The sharp edges in Fig. 3.2

are the beneficial and reverse annealing effects during the yearly scheduled maintenance period

when the tracker temperature is raised.

The resulting effect of the two annealing contributions produces a minimum in the effective

donor concentration after an annealing at 60C for 80 minutes. As the leakage current of the

irradiated detector is dependent on storage time and annealing temperature, the agreed standard

procedure is to measure the current at the reference temperature of 20C after a thermal treat-

ment of 80 minutes at 60C‘[36]. In our case only the diodes used to perform the dosimetry

measurement have undergone the beneficial annealing at 60C.

The other observable effect of bulk damage is the increase of the leakage current due to the

shorter lifetime of minority carriers (see Eq. 2.11), caused by the generation of deep impurities.

It has been shown [36] that the current density increase ∆I after irradiation is proportional to

the fluence φ:

∆I

V olume= αφ (3.4)

where the V olume is the one interested in the current generation, φ is the 1 MeV equivalent

neutron fluence and α is the damage constant, independent on the material and technology used

for manufacturing [36]. It is worth noting that in our case the leakage current after irradiation

is two orders of magnitude greater and so ∆I Iirr. In order to compare currents measured at

different temperatures (T1 and T2 in the following equation) we can use the relation:

I(T1) = I(T2) ·(T2

T1

)2

exp

(− Eg

2K·(1

T2− 1

T1

))(3.5)

where Eg = 1.12 eV and K is the Boltzmann constant [36].

The signal to noise ratio is also affected by the decrease in charge collection efficiency,

which is caused by the trapping of charge carriers at the defects in the silicon bulk. It has been

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shown that the resulting signal loss is moderate and has a value lower than 10 % after a fluence

of 1.0 · 1014 n/cm2 [37].

3.1.3 The absorbed dose expressed as 1 MeV neutron equivalent fluence

The damage induced by non-ionizing energy loss of the incident particle in the silicon detector

depends on the particle type and energy. It is useful to refer to a normalized fluence which

doesn’t take into account the energy and particle type in order to be able to compare the results

obtained using different irradiation facilities and to predict the effects of new radiation environ-

ments. Usually the normalization is made in terms of 1 MeV neutron equivalent fluence in the

framework of the NIEL (Non Ionizing Energy Loss) scaling hypothesis [38]. This procedure as-

sumes that the lattice damage induced by particles of energy E depends only on the energy loss

in removing silicon atoms from their lattice sites, and neither on the spatial distribution of the

introduced displacement defects nor on the annealing sequences following the initial damage

event. Ionization energy loss and phonon production do not contribute to the lattice damages.

The NIEL effect can be expressed by the displacement damage cross section D(E) summing

over all the possible reaction channels for the initial particle and its energy. If we consider

that each PKA has a specific recoil energy ER and that only a fraction of the recoil energy is

deposited in form of displacement damage according to the ER dependent Lindhard partition

function P (ER), we can calculate D(E) as:

D(E) =∑k

σk(E)

∫fk(E,ER)P (ER)dER (3.6)

where σk(E) is the individual reaction cross section and fk(E,ER) is the energy distribution

of recoils in reaction k .

Starting from the displacement damage cross section D(E) it is possible to define an index

of the damage, called hardness factor k . Usually the hardness factor k is defined so to com-

pare the damage produced by a particular irradiation type to the damage that would have been

produced by mono-energetic neutrons of 1 MeV with the same fluence:

k =1

D(En = 1MeV )·∫D(E)φ(E)dE∫

φ(E)dE(3.7)

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The equivalent 1 MeV neutron fluence Φeq which produces the same damage as an arbitrary

beam with a spectral distribution φ(E) and a fluence Φ is given by:

Φeq = kΦ = k

∫φ(E)dE (3.8)

In the following we will always refer to Φeq.

3.2 Irradiation of silicon detectors and dosimetry

In order to characterize the performances of radiation damaged detectors a set of devices, be-

longing to the same production batch of the sensors described in chapter 2.5, has been irradiated

using the neutron beam facility at the Louvain-la-Neuve cyclotron [39]. The specimens selected

allow to build two complete irradiated modules, a <100> high resistivity (HR) and a <100>

low resistivity (LR) one, so that a comparison with the performances before and after irradiation

can be fulfilled.

The sensors were exposed to a 20 MeV mean energy neutron beam together with some

silicon diodes that later allowed us to perform a dosimetry measurement. The cyclotron line

used to irradiate the detectors generates an intense fast neutron beam from the reaction 9Be +

d → n + X, obtained by impinging a 50 MeV deuterium beam on a 1 cm thick berillium

target. The other reaction products are stopped by a three layer filter, made of polystyrene (1

cm), cadmium (1 mm) and lead (1 mm), only a 10 % fraction of γ rays produced in the target

passes through the stop. The detectors were placed orthogonally to the beam at 40 cm distance

from the target, so to have an uniform irradiation over all the sensitive area. The irradiation

experimental setup scheme is shown in Fig. 3.3.

During the irradiation the detectors were kept at room temperature and unbiased. After

irradiation the sensors have been maintained at low temperature (-10C) to reduce reverse an-

nealing effects. A preliminary estimation of the time necessary to heavily irradiate the detectors

has been made starting from previous irradiation sessions performed with the same neutron

beam [40] (6 hours corresponding to 1.9 · 1014n/cm2 nominal fluence); in any case the equiva-

lent fluence has been measured later directly on our samples so to have an experimental check.

The 1 MeV neutron equivalent fluence is measured experimentally using two completely

independent methods.

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1.2 cmCollimator

2 cm

Berillium target

DetectorsNeutron beam

1 cm40 cm

1 cm Filter

integrator

Deuterium beam

CurrentFlux meter

Figure 3.3: Final stage of the experimental setup used to irradiate the detectors.

In the first case we consider the relationship between the increase in the current density ∆I ,

related to the irradiation, and the equivalent fluence according to Eq. 3.4. A set of diodes, built

on the test structures surrounding the active area of the detector on the original silicon wafers,

have been irradiated together with the sensors. From the current behaviour before and after

irradiation the fluence has been calculated.

The damage constant α, measured at room temperature and for silicon detectors that have un-

dergone a beneficial annealing lasting 80 minutes at 60 C, is α = 4.0 · 10−17 A/cm, with an

accuracy of 5% [41]. This value is independent on the substrate and technology used so that is

the same for all test structures.

The current measurement must be performed on a properly defined diode geometry due to

the volume factor that appears in Eq. 3.4. Thus the current flowing in the device is measured

with the diode guard ring connected to ground; in this way the volume is well defined and is

about 0.440 mm3.

Since the α value refers to 20 C, the equation 3.5 has been used to obtain the correct current

value starting from the -10 C measured ones (at 500 V). The resulting mean 1 MeV equivalent

neutron fluence is (0.96 ± 0.12) · 1014 n/cm2. The uncertainty is mainly due to the fact that

diodes were positioned in three radial region around the neutron beam axis and have suffered

slightly different fluences.

In Fig. 3.4 the setup of the diode current measurement is sketched (a) and the current as a

function of the bias voltage is shown for several test structure (b).

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H

Keithley 480Bias voltage Picoamperometersupply

Keithley 237

H L L

(a)

T=-10oC

Post-annealing

Vbias(V)I di

ode(

A)

0.05

0.075

0.1

0.125

0.15

0.175

0.2

0.225

0.25

x 10-6

0 100 200 300 400 500 600 700

(b)

Figure 3.4: (a) Setup used to measure diode test structure current. (b) Diode current vs. biasvoltage for several diodes. (Current values for fluence determination are taken at 500 V.)

In the second case the flux estimation was done using a reference detector taken from the

same production batch as a previously irradiated one (“old” in the following) and with the same

electrical and geometrical characteristics . The “old” detector was exposed to a neutron beam

at the ATOMKI Cyclotron, Hungary, with a known dose of 0.97 · 1014 1 MeV equivalent n/cm2

with an uncertainty about 15% [42]. The reference detector has been irradiated at Louvain-La-

Neuve together with the other detectors and diodes and has undergone the same treatment, after

exposure, than the “old” one so that the α value is the same. According to Eq. 3.4 the leakage

current is proportional to the fluence and from a comparison with the values obtained from

the “old” detector the fluence can be measured once we know the reference detector leakage

current, being α and the volume the same. In Fig. 3.5 the leakage currents corresponding to the

reference detector and to the “old” detector as a function of the bias voltage are compared. From

their values at 250 V the 1 MeV equivalent neutron fluence turns out to be (1.3±0.2)·1014n/cm2.

From these two measurements we can estimate a fluence of 1.1 ·1014 n/cm2 that corresponds

to 10 years of operation at LHC for our detectors and which is enough to produce type inversion

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T = -10oCDose to be calculated (Ref.)

Φ = 9.7 x 1013 n/cm2 (Old)

Vbias(V)

I(A

)

0

0.05

0.1

0.15

0.2

0.25

0.3

x 10-3

0 50 100 150 200 250 300

Figure 3.5: I-V characteristics for the reference (Ref.) detector and the previously irradiatedone (Old).

(see chapter 3.3.3 and [42]).

3.3 Characterization of irradiated detectors

In the following sections the results of irradiated detectors characterization are reported with

particular attention paid to the implications on performances and operating conditions of the

final modules.

3.3.1 Leakage current

The leakage current measurement has shown an increase up to three orders of magnitude after

irradiation. For this reason (and in order to reduce the reverse annealing effect) all the measure-

ments have been done at -10C and this temperature has been adopted as the standard for the

subsequent irradiated module testing procedures.

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3.3.2 Bulk capacitance and full depletion voltage

The bulk capacitance measurement allows to extract the full depletion voltage (see Eq. 2.13)

from a plot 1/C2bulk versus bias voltage. The results are shown in Table 3.1 and it is evident that

the LR devices have a lower full depletion voltage value (about 130 V) than the HR ones (250

V).

From the full depletion voltage value the effective doping density is obtained using Eq. 2.9.

For comparison purpose in Table 3.1 the full depletion voltage values for non irradiated detec-

tors are reported as well.

Detector Vdepl irr. |Neff | irr. Vdepl non-irr. |Neff | non-irr.(V) (cm−3) (V) (cm−3)

< 111 > HR 250 3.6 · 1012 54 7.9 · 1011

< 100 > LR 128 1.9 · 1012 240 35 ∗ 1011

Table 3.1: Full depletion voltage and effective doping density after heavy neutron irradiation(1.1 ·1014 1MeV equivalent neutron fluence).Values for non irradiated detectors are reported forcomparison purpose.

3.3.3 Bias resistor

From the bias resistor behaviour as a function of bias voltage it is evident that our irradiated

detectors have undergone bulk type inversion. As shown in Fig. 3.6 the resistance reaches

its maximum stable value only after full depletion, while before irradiation the Rbias value is

voltage independent.

In fact, after type inversion, the depletion starts at the n+-p interface on the ohmic back-side

and the not-fully depleted substrate contributes with a resistance in parallel to Rbias. Thus the

measured resistance is reduced until the bulk is completely depleted. Before irradiation this ef-

fect disappears even with a few volts of polarization since the depletion starts from the junction

side where the resistors are located.

From the behaviour of the bias resistance versus voltage the new full depletion voltage is ob-

tained and agrees with the value calculated using Cbulk measurement.

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Vbias(V)

Rbi

as(M

Ω)

strip 116

strip 283

1.8

2

2.2

2.4

2.6

2.8

0 50 100 150 200 250 300 350 400 450

Figure 3.6: Bias resistor value vs. bias voltage. Two different resistors are shown, belonging todifferent regions of a F5 < 111 > HR sensor.

The metal strip resistance wasn’t measured due to setup problems but it is likely not to

have changed after irradiation and, in any case, its implication on detector performances are of

second order.

3.3.4 Coupling capacitance

The measurements performed on the irradiated detectors show that the coupling capacitors are

not damaged by the neutron heavy irradiation. In Fig. 3.7 the pinhole distribution before and

after irradiation for the same sensor is shown. No appreciable difference has emerged and this

makes us confident of the good behaviour of our detectors with respect to oxide layer defects

even after heavy irradiation. The measurement is made at room temperature with a 1 V direct

bias voltage across the coupling capacitor as explained in section 2.5.1.

The CAC value as a function of the bias voltage is influenced by the type inversion and

only with detectors overdepleted the coupling capacitance reaches its maximum. In order to

maximize the charge collection it is necessary to operate the irradiated devices in over depletion

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strip number

I (A

)

f4-4080non irradiated

strip number

I (A

)

f4-4080irradiated

10-13

10-11

10-9

10-7

10-5

100 200 300 400 500

10-1210-1110-1010-910-810-710-610-5

100 200 300 400 500

Figure 3.7: Comparison of the pinhole defects before and after irradiation on the same detector.

regimes. In Table 3.2 the CAC values are shown.

3.3.5 Interstrip capacitance

The implant capacitance was measured, only for the <100> detectors, with the wafers kept at

-10C in a climatic chamber. The effect of the charge accumulation layer at the silicon-oxide

interface is clearly visible from the increase in the Cimp value after irradiation, compared with

the non irradiated device value, shown in Fig. 3.8 (a) as a function of the bias voltage.

The different behaviour can be explained in terms of the free electrons accumulation layer

present at the silicon oxide interface. The layer can be modelled as a bias voltage dependent

resistor Re which increases its value when the charges are removed by the increasing field in

the region under the oxide. Thus the implant impedance is the parallel between the implant

capacitance and Re (see Fig 3.8 (b)). When the depletion reaches the strip side, the capacitance

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Vbias(V)

Cim

p(pF

)f = 400 Hz

irradiated

non irradiated

0

2

4

6

8

10

12

0 200 400 600 800 1000

(a)

+ + + + + + + + + + + + + + + + + - - - - - - - - - - - - - - - - - --- - - - - -

interface defects

R e

C imp

electrons

(b)

Figure 3.8: (a) Implant capacitance vs. bias voltage for a F5 high resistivity detector before andafter irradiation. (b) Model of the implant capacitance and of the free electron accumulatinglayer, due to surface radiation damage, present at the silicon-oxide interface.

decreases sharply until the bias voltage reaches a value two times higher than the full depletion

one. After that, the Cimp value decreases more slowly due to further electron confinement as

it happens for non irradiated detectors. The behaviour at bias voltage lower than 100 V can be

ascribed to the type inversion of the bulk and to the incomplete isolation of the strips from the

bulk.

In case of overdepleted device the implant capacitance turns out to be 1.71 pF and 1.27 pF

for the F4 and F5 detectors respectively, with an increase of about 10 % compared to the non

irradiated detector value.

In Table 3.2 the main electrical parameters are summarized. The measurement were per-

formed at -10C and the values are obtained with the detector over-depleted.

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Detector Type Rbias Cb CAC Cimp

(MΩ) (pF/cm) (pF/cm) (pF/cm)

F4 < 111 > 2.49 0.41 33.3 -

F5 < 111 > 2.49 0.45 33.1 -

F4 < 100 > 3.23 0.41 38.9 0.259

F5 < 100 > 3.23 0.48 37.9 0.225

Table 3.2: Main electrical parameters after heavy neutron irradiation (1.1·1014 1MeV equivalentneutron fluence). All the measurement were made at -10C and, when present, with a biasvoltage greater than twice the full depletion voltage.

3.3.6 Total capacitance

After the irradiation the behaviour of the total capacitance seen by the front-end electronics,

with respect to the bias voltage, is changed according to the implant capacitance increase. In

this case the minimum value of the capacitance is obtained for bias voltage greater than twice

the full depletion voltage. This effect is depicted in Fig. 3.9 where the full depletion voltage for

the irradiated detector is 128 V. We notice that the detectors have to operate at high bias voltage

Vbias(V)

Cto

t(pF

)

Module <100>

non irradiated

irradiated

5

10

15

20

25

30

35

40

45

100 200 300 400 500 600 700 800

Figure 3.9: Capacitance seen by the pre-amplifier input vs. bias voltage for the <100> detector(F4+F5) in case of irradiated and non-irradiated devices.

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to minimize the effects of irradiation which, in this case, increases the Ctot value of about 10 %.

It is evident the advantage of using low resistivity substrates which undergo type inversion

at higher fluences thus having lower depletion voltage than high resistivity ones at the end of

the detector lifetime. In this conditions heavily irradiated detectors can be easily overdepleted

decreasing the noise contribution due to the interstrip capacitive load to the front-end electron-

ics.

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Chapter 4

The APV6 front-end chip

In this chapter the main features of the CMS Silicon Tracker front-end chip prototype (APV6)

will be described. The APV6 chips, sitting on a ceramic support (hybrid), have been used to

test the detectors described in this work and to perform a first “full system test” of the Silicon

Tracker. The deep understanding of the chip functionality is one of the main topics that I have

studied for this thesis. In this framework part of the work has concerned the design of a test

procedure for the hybrids and their APV6 chips. The setup described in chapter 5 has revealed

very flexible in measuring all the main chip parameters in a few minutes. A set of 8 hybrids,

for a total number of 30 APV6 chips, has been tested to select the ones to be used for the

Milestone 99 modules. The Milestone 1999 had the goal of evaluating the capability to build

several Silicon Microstrip Tracker modules and to test their performances.

4.1 The APV6 chip

The read out architecture of CMS Tracker takes advantage on Very Large Scale Integration

(VLSI) technique that allows amplifying the signal, released by a particle crossing the detector,

very close to the silicon sensor, reducing the noise pick up. Front-end electronic characteristics

are imposed by the hard requirements, in terms of signal time localization within a single bunch

crossing, high occupancy, radiation hardness and low noise level, necessary to achieve the de-

sired tracking performances in the environment where the Silicon Tracker will have to operate.

Research and development (R&D) program started in 1992 (RD20 collaboration [28]) has lead

to the construction of fast readout electronics fulfilling such requirements and whose main block

is the APV (Analogue pipeline Voltage mode) front-end chip series. The last prototype for

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CMS Tracker front-end chips is the APV6, built using radiation-hardened Harris AVLSIRA

process [43] in 1.2 µm bulk CMOS technology from a Rutherford Appleton Laboratory and

CERN design [5]. The APV6 chip consists of a 128 channels analogue section and some sys-

tem features including a slow control communication interface, programmable on chip analogue

bias network and internal test pulse generation. Each channel contains a pre-amplifier and a

shaper stage, with a peaking time of nearly 50 ns, followed by a 160 location pipeline memory

in which samples (strip signals) are written at the 40 MHz LHC machine frequency. This ana-

logue memory is made of a 128 × 160 array of capacitor cells, whose dimensions are 35 µm

×30µm. Each cell contains two transistors, to perform read or write operations, and a 0.25 pF

storage capacitor.

The pipeline memory contains a record of the most recent data in a window of 160 × 25

ns= 4µs, in order to match the maximum CMS Level 1 trigger latency of 3.2 µs. Two pointers

control readout operations. A write pointer cyclically moves through the pipeline, one row per

bunch crossing, and decides in which location sampled data has to be written. A read pointer

follows the write one by an interval, referenced as trigger latency and measured in number of

pipeline clock cycles, that is the time between an analogue signal being applied to the APV6

input and the corresponding logical trigger time arrival to the chip. This data access mecha-

nism allows the marking and queuing of requested locations for output while embedded logic

ensures that samples waiting readout are not overwritten with new data. The pipeline buffering

is crucial in a high rate experiment like CMS in order to eliminate the dead time contribution

of the level-1 trigger. Following a trigger, a series of samples from the memory are processed

by the APSP (Analogue Pulse Signal Processor) section of the front-end chip. This part can be

operated in two modes: peak or deconvolution (see section 4.1.3).

After the APSP the processed data are held in a further memory buffer before switching

through an output analogue multiplexer. This additional buffer is required so that as one event

is multiplexed out another may be prepared for consecutive transmission reducing readout dead

time due to the statistical fluctuations of the “time-interval” distribution between two consecu-

tive level-1 triggers. The multiplexer operates at 20 MHz and uses a nested architecture to save

power since only the final 4:1 stage has to run at full speed. This has, as a consequence, that

the analogue data come out in a non-consecutive channel order but are interleaved [44] . A fifth

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input to the final stage allows the insertion of digital data, containing error coding and pipeline

address information (see Fig. 4.1), at the beginning of the analogue levels.

Address

4 bit header 128 analogue levels

7.0 microseconds

0uA

100

200

300

400

500

600

Time

Ou

tpu

t C

urre

nt

(u

A)

Address

4 bit header 128 analogue levels

7.0 microseconds

0uA

100

200

300

400

500

600

Time

Ou

tpu

t C

urre

nt

(u

A)

Figure 4.1: APV6 Output frame. A signal, as it appears in deconvolution mode (blue upperframe) and in peak mode (green lower frame), is also shown.

When there is nothing to transfer the analogue output of the chip is at the logic 0 level with

single logic 1 states, called tick marks, every 1.75µs. The output from the APV6 is in current

form in the range from 0 to 600 µA and a MIP equivalent signal is represented by a current

value of the order of ∼ 50µA. A layout picture of APV6 chip is shown in Fig. 4.2, with all

major logic and analogue blocks.

The chip overall size is 12.0 × 6.25 mm2. On the left the 128 analogue inputs pads, grouped

into four section of 32 separated by large power supply pads, are visible. Each group of inputs

is arranged in two staggered rows; pads on the same row are spaced at 86 µm but the other row

is offset 43 µm, to allow microbonding, and this results in an effective bond pitch of 43 µm.

On the right side, from top to left, remaining power supply, test, bias reference, data, address,

clock, trigger and serial control pads are located [5].

The power supplies are nominally run at ±2 Volts and ground, with a power consumption

of 2.4 mW/channel.

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Figure 4.2: Layout of APV6 readout chip. The real dimensions are 12.0× 6.25 mm2.

4.1.1 Analogue stages

Each APV6 channel is made of a pre-amplifier and a shaper stage, as shown in Fig. 4.3. The

software controlled parameters VSHA and VPRE allows to change the impedances that affects

the timing response of the analogue circuit. We have showed [47] that, contrary to what has

Vpbp

Vpcasc

Vpbn

M_p_pinp3000/1.4

M_p_pis150/10

Cfp .25p

M_n_pfb2.4/60

M_n_pcasc400/1.2

M_n_pis2330/10

M_n_psf400/1.2

M_n_pis3200/10

Vpsfb

Vsbp

Vscasc

Vsbn

M_p_sinp800/1.4

M_p_sis150/10

Cfs .25p

M_n_sfb2.4/60

M_n_scasc400/1.2

M_n_sis2100/10

M_n_ssf400/1.2

M_n_sis3200/10

Vssfb

VPRE

VSHA

Cc1.8p

Vsbp

Vscasc

Vsbn

M_p_sinp800/1.4

M_p_sis150/10

Cfs .25p

M_n_sfb2.4/60

M_n_scasc400/1.2

M_n_sis2100/10

M_n_ssf400/1.2

M_n_sis3200/10

Vssfb

PreamplifierShaper

Figure 4.3: APV6 front-end electronics scheme. The components interested by the VSHA andVPRE registers are shown.

been reported in literature [5], modifying the value of the VSHA register the APV6 output

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doesn’t behave as a true two poles CR-RC filter.

4.1.2 Control interface

The configuration, bias settings and error states of the APV6 are handled by a two wire se-

rial interface which conforms the I2C standard, so that it may be controlled using commercial

components [45]. The APV6 chip can only act as slave device.

Every I2C transmission is composed of three bytes. The first byte contains the APV6 ad-

dress, the second one the command to be executed (register name, read or write operation) and

the last one the register value to be set. The APV6 binary address “1111” is reserved for broad-

cast addressing, so when it is used all connected chips will respond. Consequently a maximum

of 15 APV6 chips may share the same controller with different addresses.

Up to 13 variables are set or read from APV6. The meaning of the main (from an user point

of view) registers is reported in Table 4.1.

Name Description

Latency LAT Distance between write and read pipeline pointers.Value up to 160 (1 step=25 ns).

MODE Allows to switch between Peak and Deconvolution mode,to turn the power OnOff,to use the internal calibration.

Analogue bias Programmed values are converted by on-chip DACs.VSHA,VPRE VSHA and VPRE act on the feedback stages of the shaper

and pre-amplifier circuit respectively.VADJ VADJ allows to change the output frame level.CDRV Selects which group of 8 channels to pulse in calibration

mode.CLVL Selects the charge injected in calibration mode.CSKW Sets the delay between trigger and calibration pulse

8 steps of 3.125 nsError (read only) latency or FIFO error

Table 4.1: Principal APV6 internal registers.

The Latency register allows to select the separation between the write and read pointer of

the pipeline in units of 25 ns. This distance, expressed in time unit, is referred to as latency and

it is a fundamental parameter of the timing sequence that controls the entire DAQ chain (see

chapter 5.4).

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4.1.3 Operation modes

The APV6 chip can be operated in two modes: peak mode in which the output sample cor-

responds to the peak amplitude of the amplifier output following a trigger, and deconvolution

mode, in which the output corresponds to the peak amplitude coming out from the APSP cir-

cuitry. In deconvolution mode three samples are sequentially read from the pipeline, as shown

in Fig. 4.4 in comparison with the peak sampling, and the output is a weighted sum of all three.

Time (5ns/division)

A.U

.

Ideal CR-RC output shape

Deconvolution ModePeak mode

-50 -25 0 25 50 75 100 125 150 175 200

Figure 4.4: Processed samples in peak and deconvolution mode after a trigger request.

This last operation effectively results in a re-shaping of the analogue pulse shape to one

confined within a bunch crossing time interval. The technique is referred to as deconvolution

since it retrieves the original current pulse from the amplifier shaped pulse [31]. By inverting

the transfer function of the shaper it is possible to calculate the set of weights which, applied to

three consecutive samples, perform the deconvolution operation. The weights are implemented

on the chip APSP circuitry by using three different capacitors.

The use of the deconvolution mode is mandatory in high luminosity LHC operations since

otherwise the effect of pile-up would result in a persistent background, for each triggered event,

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due to signals generated in previous events thus spoiling the track finding algorithm perfor-

mances. By reducing the particle signals within a single bunch crossing, the deconvolution

obtains a faster pulse shape at the expense of an increase in both power consumption and, what

is worse, in the electronic noise. In Fig. 4.5 the reconstructed shapes for the peak and decon-

volution mode are compared. These curves are obtained changing the latency value by 25 ns

steps in order to reproduce the effect of a particle signal coming from different bunch crossings.

It is evident that in deconvolution mode the signal from the two bunch crossing closest to the

optimal one are much more suppressed with respect to the ones in peak mode.

Peak mode

CK 40MHz

0 25 50 75 100 125 150 175 200 225 250 275 300 (ns)

Deconvolution mode

0 25 50 75 100 125 150 175 200 225 250 275 300 (ns)

CK 40MHz

Figure 4.5: APV6 output shape in peak and deconvolution mode.

The reduced time shaping has been obtained at the expense of an increase of the chip noise.

Nevertheless this is the default operating mode for the CMS Tracker in high luminosity runs and

the detectors and electronics must satisfy the required performances in terms of signal to noise

ratio using the deconvolution mode. As we will see in chapter 7 the detectors tested during

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this work have completely fulfilled the expected performances, even in the worst scenario. The

equivalent noise charge introduced by the APV6 chip has been measured as a function of the

input capacitance [5], both in peak and deconvolution mode, and has shown a linear dependence

on the detector input capacitance to the chip, and is given by:

ENC(e−) = 510 + 36 · Cinput(pF ) (4.1)

for the peak mode, and by:

ENC(e−) = 1000 + 46 · Cinput(pF ) (4.2)

for the deconvolution mode.

A further APV6 feature, fundamental for test purposes, is the internal calibration system. In

calibration mode a user adjustable charge level is injected in the input of a group of 16 channels

when a 50 ns trigger signal (lasting two clock cycles) reaches the APV6. The channels are

spaced with a module 8 pattern but they appear as a single block at the analogue output due

to the multiplexer architecture. In Fig. 4.6 the APV6 analogue frame acquired before digital

conversion is shown. The third group of 16 channels is pulsed with a charge corresponding to

1 MIP. It is visible the digital header before the analogue part and a tick mark following the

frame.

4.2 APV6 chip response

The complete output pulse shape produced by the APV6 analogue amplification section can-

not be measured directly but an image can be built up by sampling the calibration pulse at a

fixed time and progressively shifting its starting time by means of the CSKW register. In data

acquisition mode the same operation can be done by delaying the APV6 trigger with respect

to the physical trigger (see section 5.4). This measurement performed in peak mode allows to

obtain an image of the shaper output (Fig. 4.7(a)) while in deconvolution it gives the possibil-

ity to verify the effectiveness of the algorithm implementation on the APV6 chip (Fig. 4.7(b)).

Furthermore the time delay scan is a powerful method to find experimentally the optimum sam-

pling point in order to measure the signal at its peak value. All the measurement performed in

laboratory and during the beam tests have been preceded by an optimization of the sampling

point.

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Figure 4.6: APV6 analogue frame (upper curve) acquired before the digital conversion. On topof it the group of 16 channels pulsed by the internal calibration operation mode is visible. Thelower curve is the output enable signal provided by the chip in correspondence of the analogueframe.

Delay (ns)

Nor

mal

ized

out

put

Peak Mode

0

0.2

0.4

0.6

0.8

1

0 20 40 60 80 100 120 140 160 180

(a)

Delay (ns)

Nor

mal

ized

out

put

Deconvolution mode

-0.4

-0.2

0

0.2

0.4

0.6

0.8

1

0 20 40 60 80 100 120

(b)

Figure 4.7: Normalized output shapes in peak (a) and deconvolution mode (b).

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4.2.1 APV6 characterization

In order to study the chip behaviour as a function of the shaper feedback impedance the output

shape in peak mode has been measured, with the internal calibration mode, for different VSHA

values. A two poles semi-gaussian curve has been fitted to the experimental points obtaining

only a marginal agreement (see Fig. 4.8).

Delay (ns)

Char

ge (A

DC

coun

ts)

VSHA = 2.0 V calib. data

VSHA = -0.20 V calib. data

0

50

100

150

200

250

0 20 40 60 80 100 120 140 160 180

CR-RC fit

Figure 4.8: Semigaussian fit performed on the APV6 output for two different values of theVSHA register.

The function which better approximates the experimental curve is a four pole (two real and

two complex) transfer function (see Appendix A). This result agrees with the analytical study of

the front-end circuit [47]; in Fig. 4.9 the four poles transfer function inverse Fourier transform

is fitted to the experimental data.

Since the APV6 chip behaves as a true CR-RC filter with a 50 ns time constant only on a

first order approximation, the weights of the deconvolution algorithm are not properly adjusted

and the charge measured in deconvolution mode is slightly lower than the expected one. This

has been confirmed both by the laboratory measurements [7] and by the electronics response

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Delay (ns)

Char

ge (A

DC

coun

ts)

VSHA = 2.0 V calib. data

VSHA = -0.20 V calib. data

0

50

100

150

200

250

0 20 40 60 80 100 120 140 160 180

4 poles (2 real+2 complex) fit

Figure 4.9: Four poles transfer function inverse Fourier transform fit to experimental data.

simulation [47] (see Fig. 4.10). Fig. 4.10(b) refers to the simulated response of an ideal CR-RC

filter and shows that the corresponding output shapes in peak and deconvolution mode to iden-

tical input signals are equal. On the other hand Fig. 4.10(a) shows the simulated behaviour of

the APV6 chip using its detailed description explained in [47]. We see that the deconvolution

maximum is about 8% lower than the peak one, in agreement with the experimental results.

Furthermore the detailed simulation is able to reproduce the undershoot present in the experi-

mentally determined curves (see Fig.4.7(b)).

For all the APV6 chip we tested the linearity response has been measured using the internal

calibration system. Typical calibration curves, for a set of four different APV6 chips housed on

the same hybrid, are shown in Fig. 4.11 and in Fig. 4.12 for the peak and deconvolution mode

respectively. The CLVL values ranges from 0.3 MIP to 4 MIP equivalent charge.

The effect of the VSHA register when it is set to the extreme values allowed is reported

in 4.13. It is clearly visible that with a longer time constant (full circles in Fig. 4.13(a)), in peak

mode the output shape is deeply broadened and the charge measured is increased by 30% with

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-20

0

20

40

60

80

100

-50 0 50 100 150 200 250

APV6 chip reponse

Peak shapeDec. shape

Time (ns)

A.U

.

0 50-50 100 150 200 250

-20

0

20

40

60

80

(a)

-20

0

20

40

60

80

100

-50 0 50 100 150 200 250

Peak shape

Dec. shape

True CR-RC filter

Time (ns)

A.U

.

250200

80

150100500 -50

-20

0

20

40

60

(b)

Figure 4.10: (a) Simulated effect of the non ideal CR-RC behaviour on the output shape of theAPV6 chip. The signal measured in deconvolution mode is lower than the one measured inpeak mode. (b) APV6 output shapes for an ideal CR-RC 50 ns filter. The green lines are thedeconvolution shapes, the black one the peak shapes.

Clvl (MIP equivalent)

AD

C c

ount

s

chip 12chip 14chip 1achip 1c

0

20

40

60

80

100

120

140

160

180

0 0.5 1 1.5 2 2.5 3

Figure 4.11: Calibration register response linearity in peak mode for a set of four APV6 chipshoused on the same hybrid. The detector is not bonded to the hybrid.

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Clvl (MIP equivalent)

AD

C c

ount

s

chip 12chip 14chip 1achip 1c

0

20

40

60

80

100

120

140

160

180

0 0.5 1 1.5 2 2.5 3

Figure 4.12: Calibration register response linearity in deconvolution mode for the same APV6chips tested in Fig. 4.11

respect to the normally used shaper time constant. This behaviour is less critical in deconvolu-

tion mode.

Delay (ns)

Cha

rge

(AD

C c

ount

s)

VSHA = 2 VVSHA = -0.2 V

-50

0

50

100

150

200

250

300

0 20 40 60 80 100 120 140 160 180

(a)

Delay (ns)

Cha

rge

(AD

C c

ount

s)

VSHA = 2 VVSHA = -0.2 V

-100

-50

0

50

100

150

200

250

0 20 40 60 80 100 120

(b)

Figure 4.13: VSHA register effect on the output shape in peak (a) and deconvolution mode (b).

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The VSHA parameter can be used to increment the S/N ratio but the broadening of the

signal, especially in peak mode, deeply affects the detector response for the bunch crossing

following the particle crossing time, considerably increasing the occupancy.

4.3 The APV25 read-out chip

The new prototype of the front-end chip for the CMS silicon microstrip detectors is the APV25.

It can be considered the straigthforward translation of the APV6 chip in the “deep submicron”

0.25 µm IBM technology. The APV25 maintains all the APV6 features but it takes advantage

of the intrinsic radiation tolerance of the submicron process. The S/N ratio is considerably in-

creased while the power consumption is decreased. Furthermore the industrial scale of IBM

manufacturer guarantees more flexibility in handling the initial debugging runs and can be con-

sidered more reliable in the long term production phase with a large cost saving with respect to

the other specialized manufacturers. The use of the APV25 is one of the key issues, from both

technical and economical point of view, in the possibility to build the all-silicon solution for the

CMS Silicon Tracker.

The design has been slightly modified to take into account the advantages offered by the

smaller size process, for example increasing the pipeline depth from 160 to 192 locations. The

power supply lines for this new circuitry are ±1.25 V and ground. On the other hand the

APV25 can operate both in peak and deconvolution mode, has an internal calibration system

and an analogue storage pipeline similar to the APV6 chip. So all the measurement performed

on the APV6 are a very good starting point to quickly test this new prototype in order to enter

the final production phase.

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Chapter 5

The laboratory setup

The APV6 and the full size module testing procedures require the setting up of a flexible and

reliable system, able to switch between the different experimental situations that arise in the

R&D phase. In particular the same setup should be able to test the hybrid equipped with the

front-end chip alone, to test the fullsize module with a β source and eventually to allow the use

of a laser beam in order to perform a fast check of the response of all the strips and electronic

channels of the device.

A Data Acquisition System (DAQ) performing all these different tasks has been built in

the framework of this thesis. We took advantage on the availability of some official CMS

electronic chain blocks in order to easily compare the results obtained in our laboratory with

the CERN Beam Test ones. Furthermore the setup allows the testing of irradiated detectors

inside a climatic chamber.

In this chapter a detailed description of the laboratory setup is presented, with particular

emphasis on the custom electronic card and solutions especially developed by the CMS Florence

group in this context. The laser test facility will be described in chapter 6.

5.1 The Florence laboratory setup

The DAQ system is based on a VME crate equipped with a RIO8062 CPU running the real time

operative system Lynx-OS. A schematic view of the laboratory setup is shown in Fig. 5.1.

The module under test, or simply the front-end hybrid, is housed inside a climatic cham-

ber, model Haræus VTM 04/500, that allows to keep the detector temperature stable at the

appropriate operative point (usually -10C). The detector electronics is connected by means of

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I2C

CPU

Trigger

Kapton

Selected MIPsScintillatorPM

VME

FED

RS232

hp8131A

Interface card

Hybrid

β Source

Magnet

Logic Unit

SEQUENCER

Climatic chamber

Silicon detector

Delay generator

Trigger

Clo

ckT

rigg

er

Analogue output

Clock

Figure 5.1: Block scheme of the laboratory setup.

a “Kapton” cable to an interface card, which itself is placed inside the climatic chamber. The

interface card was developed by the CMS Silicon Microstrip Detector collaboration [48] and

is used for laboratory tests as well as in beam test environment. This card provides the power

supply, the I2C commands, the clock and trigger signals to all the APV6 chips located on the

same hybrid. The clock and trigger signals are buffered by a LVDS receiver prior to reach the

front-end chips. Furthermore the interface card receives the analogue output signals from the

APVs and, after an amplification stage, sends them to the FED ADC through up to four differ-

ential cables, one for each APV6 chip. The detector is biased with a high voltage power supply,

model EG&G Ortec 556H.

Detector response to MIPs is investigated using a β source. The sensor is installed on a box

containing a 90Sr source and a bending electromagnet. By adjusting the current flowing in the

magnet coil, only electrons with momentum close to the end point of the spectrum ( 2MeV)

are bent towards the detector, thus simulating minimum ionizing particles. A plastic scintillator,

coupled to a low noise fast photomultiplier and located on the opposite side of the silicon surface

with respect to the source, provides the trigger signal only for the particles that have completely

crossed the detector. The trigger signal, properly discriminated and shaped, is delayed in time

with an HP8131A pulse generator before being sent to the APV6. In this way we can adjust

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the delay between the arrival of the particle and the APV6 trigger at about 1 ns steps, being

able to study the APV6 response at different sampling time. As we have seen in section 4.1.2

this is also necessary since in “data acquisition mode” the APV6 can adjust the latency between

the particle passage and the trigger, using the internal LATENCY register, only in 25 ns coarse

steps.

In case of “internal calibration mode” the trigger signal is generated by a pulser which feeds

directly the Sequencer card.

The clock and trigger signal levels needed to run the APV6 chips and to operate the ADC

are provided by a custom made Sequencer card (section 5.3) that is the main block of the DAQ

systems. In order to follow the physical flow of data in our system it is necessary to first describe

the interface card that connects the module to the outer world.

5.2 The Tracker Interface Card

The hybrid is connected to the Tracker Interface Card (TRICARD) with a kapton flat cable

ending in two ERNI connectors (1.27 mm pitch), a 26 pins one devoted to the power supply

(± 2 V and GND) and a 50 pins one for the remaining services. The power levels are stabilized

on board by two voltage regulators working with ± 6 V.

The analogue output from every single APV6 chip is pre-amplified and transmitted by a

differential twisted-pair cable towards the ADC. The hybrid houses up to eight front-end chips

but the interface card is able to manage the analogue outputs of only four of them. This is not

a severe limitation since all of the modules produced for the Milestone 99 have a maximum of

512 strips (corresponding to 4 APV6 chips).

The clock and trigger signals are received from the Sequencer board and transmitted in a

LVDS (Low Voltage Differential Signal) logic standard to match the APV6 requirements, as

shown in Table 5.1.

The I2C control signal is transmitted to the TRICARD by a 4 way “Lemo” cable connected

to a VME board that houses four independent I2C drivers.

In Fig. 5.2 the TRICARD connected to a fullsize module is shown.

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Signal Logic state Voltage level

CLKP , TRGP 0 <-200 mV1 >+200 mV

CLKN , TRGN 0 >+200 mV1 <-200 mV

Table 5.1: Clock and trigger logic levels for the APV6 positive and negative lines.

Figure 5.2: The interface board connected to a fullsize module.

5.3 The Sequencer

The Sequencer card is described in details since it is a custom made device that has been com-

pletely developed in the framework of this thesis. The Sequencer board is the main block of the

electronic chain and is devoted to generate all the signals needed by the APV6 to work and by

the ADC to sample and store the data. Its main feature is the capability of perform a correct

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timing of the clock and trigger signals and to adjust the delay between the particle crossing time

and the front-end electronic trigger.

It contains the 40 MHz oscillator which provides the clock signal to all the DAQ system,

simulating the LHC machine bunch crossing rate. The correct timing sequence, described in

detail in section 5.3.1, is realized using an FPGA (Field Programmable Gate Array) chip. An

additional degree of freedom in the delay has been recovered programming an FPGA section

so to obtain a coarse 25 ns delay. The delay value is adjusted on the Sequencer board through a

RS232 serial interface hosted on the same VME CPU running the DAQ software.

40 MHzClock

Trigin

JTAG

Calin

Reset

ClkpClkn

ClkpClkn

Trgp

Trgp

Trgn

Trgnsignals

Reset button

APV signals

FEDALTERA

MAX7160

Serin

Figure 5.3: The Sequencer board.

Fig. 5.3 shows a picture of the Sequencer and the scheme with the I/O signals and the

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fundamental blocks.

The main components and signals of the Sequencer board are listed in the following:

• The clock is the 40 MHz system clock.

• The MAX7160 is the FPGA that generates the timing signals.

• The “Calin” and “Trigin” inputs are reserved to the trigger signal in case of internal

calibration or DAQ mode measurements respectively.

• The “Reset” input allows to perform a software reset of the APV6 chip in case of error

condition; the same functionality is exploited by a hardware button named “Reset button”.

• The “Clkp”,“Clkn”,“Trgp”,“Trgn” outputs are the LVDS signals that carry the clock and

trigger. A couple of LVDS transmitters, model DS90C031, drives these lines to the Inter-

face card and to the FED ADC using different cables.

• The “Serin” input receives from the serial interface RS232 the delay parameters to be

used by FPGA.

The FPGA is programmable through the “JTAG” connector. In Appendix C is reported the

complete layout of the custom Sequencer card, entirely designed by the CMS Florence group.

5.3.1 The timing circuit

The timing circuit is built using an FPGA Model MAX7160 manufactured by ALTERA Cor-

poration. This EEPROM contains 3200 programmable logic gates and provides a flexible way

to realize the timing of the signals which drive the APV6 chip and the ADC. The whole set of

signals in input and output from the FPGA is summarized in Fig. 5.4. The input signals have

been translated to TTL level to match the device requirements. The “Serin” line carries the

data to program the delay, the “Clock” line the master clock and the “Reset” line the request

for APV6 reset. Furthermore there are two inputs dedicated to the DAQ and the calibration

triggers. The output lines are reserved for the clocks (“Clockapv” and “Clockfed”) and final

triggers (“Trigapv” and “Trigfed”), properly synchronized.

As we have seen in section 4.1.3 the internal calibration pulse is generated when the APV6

chip receives a signal lasting two clock cycles, i.e. 50 ns, on the trigger line. In this case a

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clock 40MHz

Res

et

MAX7160

Calin

TrigapvTrigfed

ClockapvClockfedTrigin

Serin

Figure 5.4: Block scheme of the FPGA MAX7160.

charge spike is generated at the pre-amplifier input of every channel after a time selected with

the CSKW chip register. The 50 ns signal is internally generated by the FPGA using a D-type

Flip-Flop chain. Three Flip-Flops sequentially connected as shown in Fig. 5.5(a), with the

Delay (D) input connected to the power line Vss=5 V, the “Calin” signal to the clock input of

the first gate and the master “Clock” to the remaining two, make the calibration pulse.

A similar chain is used for the reset signal, lasting 75 ns or more; in this case we have used

4 D-type FLIP-FLOPs (see Fig. 5.5(b)).

The output pulses “Calout” and “Resout” are sent to the “trigapv” line via an OR gate (see

Fig. 5.6) and correspond respectively to the sequence recognized by the APV6 as “Calibration

request” and “Reset”.

The “Trigger” signal circuit, sketched in Fig. 5.6, delays the trigger with 25 ns steps and

sends it on the “trigapv” line. This circuit works both in DAQ and calibration mode. Its main

component is a 9-bit asynchronous counter (“LPM-counter”) built with a J-K type Flip-Flop

chain. The number of 25 ns clock cycles corresponding to the time delay is loaded to the

counter when the “aload” input is high and it is determined by the RS232 serial data stream

content decoded by another section of the FPGA. The counter starts when the input “count-en”

is enabled by a “Trigin” or “Calin” signal. After the programmed delay, lasting a time referred

to as D2 in the following, a combination of two exits of the counter makes a 25 ns trigger pulse

on the “trigapv” line. The same two exits (“qout0” and “qout8”) allow to reset the FLIP-FLOP

state and the counter through the “aclear” input.

The logic circuit implemented on the FPGA has been designed and tested with the MAX-

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clear

D Q

clear

D Q

clear

D Q

clear

D Qck40ck40

Vss

(b)ck40Reset

Resout

clear

D Q

clear

D Q

clear

D Qck40ck40

Vss

Calin

Calout

(a)

Figure 5.5: The internal calibration and reset FPGA section.

clear

D Q

clear

D Q

clear

D Q

clear

D Q

clear

D Q

clear

D Q

LPM-Counter

qout0

qout8

TrigapvResout

Calout

count-en

qout[0..8]ac

lear

aloa

d

qout8

qout0

ck40 ck40 ck40

VssTrigin

Calout

Vss

ck40

Figure 5.6: Trigger delay section and trigger final stage of the timing circuit.

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PLUS II software, distributed by ALTERA Corporation. The same PC running the software

allows to program the FPGA on the fly through a parallel port directly on the Sequencer socket,

avoiding a dangerous and time consuming extraction of the chip . The FPGA MAX7160 has

been chosen due to its sufficient number of macrocells (160, each containing a programmable

register, a FLIP-FLOP and several elementary logic gates) and its small maximum transit time,

certified within 7 ns by the manufacturer.

In Fig. 5.7 the sequence of a calibration request followed by a trigger pulse, generated by

the MAX7160, is shown. Great attention has been paid to adjust their relative phase with the

clock phase, so that the clock rising edge always finds the trigger line in a well defined logical

state.

Figure 5.7: Typical calibration request pulse (lasting 50 ns) followed by a trigger (black trace)and 40 MHz clock signal (grey trace) acquired with a digital oscilloscope on the Interface card.In this case D2 has been fixed to 100 ns.

5.4 The timing sequence

The APV6 pipeline is an essential feature of the CMS Silicon Tracker electronics since al-

lows to sample continuously the signal under investigation, in our case the charge collected on

every channel, and to retrieve the useful information only when a first level trigger signal is

received. To correctly readout the pipeline a deep knowledge of the timing sequence involved

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in the trigger pulse distribution is required. The main parameter related to this problem is the

elapsed time between the physical trigger pulse, connected to the particle crossing time, and the

front-end triggerarrival time at the APV6 chip input. In internal calibration mode the physical

trigger is replaced by the calibration pulse. In the following sections the timing sequence of the

calibration and DAQ mode will be reviewed.

5.4.1 Internal Calibration Mode

The entire sequence is started by the “Calin” TTL input on the Sequencer. The MAX7160 cir-

cuit produces, as described in the previous section, a 50 ns pulse, corresponding to a calibration

request, and, after a time delay D2, a second 25 ns pulse that plays the role of trigger. The delay

D2 can be adjusted at 25 ns steps.

The APV6 chip has an internal calibration chain made of T-type Flip-Flops. When the

chip receives a calibration request signal, a clock pulse is sent to the Flip-Flop chain after a

programmable delay CSKW (see section 4.1.2) The consequent transition between the logic

states “1” and “0” of the Flip-Flop output releases a known charge to be injected in the pre-

amplifier input capacitances.

The timing diagram of this process is sketched in Fig. 5.8 and is described in the following.

A trigger pulse enters the “Calin” Sequencer input (1) and a 50 ns calibration request signal

reaches the APV6 chip. The released charge produces, at the shaper output, a signal that reaches

its maximum after a time T1 from the falling edge of the 50 ns calibration request (3). T1

depends on the delay adjustable at 3 ns steps through the CSKW APV6 internal register and

on the time the output signal needs to reach its maximum (typically 50 ns). The output signal

is continuously sampled in correspondence of the rising edge of the 40 MHz clock (4), and is

stored in the pipeline. Finally, after a time D2 from the rising edge of the calibration request, the

trigger pulse reaches the APV6 (2) and the pipeline cell addressed by the value of LATENCY

register (corresponding to the time Tlat in Fig. 5.8) is read out (3). It is worth noticing that the

CSKW register allows to perform a fine scan around the signal maximum trimming the proper

time sequence.

The delay related to the APV6 chip internal LATENCY register and the delay D2 provided

by the Sequencer carry out the same function and are completely inter-exchangeable.

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1

2

4

3

D2

50ns

6ns

T1

25ns

latT

Figure 5.8: The Internal calibration timing sequence. The dotted curve in (3) shows a calibrationpulse optimized, by means of the CSKW register, so to have its maximum in correspondence ofthe clock rising edge. ( Time is not in scale).

5.4.2 DAQ mode

In data acquisition mode the trigger is generated by a particle crossing a plastic scintillator or

by a pulse generator in case the system is used as laser test station (see chapter 6). In Fig. 5.9

the timing diagram is shown, together with the time values measured with our laboratory setup

used to better explain the event sequence.

The photomultiplier signal (2) is processed by a constant fraction discriminator that gener-

ates an output signal lasting 50 µs (3). Since it is very dangerous to rely only on the 25 ns step

timing provided by the LATENCY register or by the Sequencer delay to correctly sample the

output analogue signal from the APV6 on its maximum, it is necessary to add in this point a

further delay stage. A pulse generator, model HP8131A, has been used to generate a 6 ns pulse

delayed in time D1 with respect to the discriminator output (plus 120 ns of cables and internal

delays), at 1 ns steps (4). From this point onward the trigger chain is identical to the one de-

scribed for the internal calibration acquisition mode. In particular a trigger signal is generated

by the MAX7160 after a delay D2 with respect to the pulse signal (5) and reaches the APV6

with a further delay due to cables (6).

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µs

1

2

3

4

5

6

50

6ns

25ns10ns

Latency

5ns

10ns 120ns+D1

D225ns

Figure 5.9: The DAQ timing sequence. (Time is not in scale). The sequence starts when aparticle crosses the scintillator (1). The photomultiplier signal (2) undergoes some electronicsprocessing and reaches the APV6 as a 25 ns trigger signal (6) after a delay due to the cables andto user adjustable registers (D1 and D2).

The time difference between the particle crossing the scintillator (1) and the trigger arrival

to the APV6 (6) has been measured with a digital oscilloscope in order to obtain a coarse

evaluation of the LATENCY register value. The final relationship between the LATENCY

register, the D1 and D2 times and the trigger delay (in Fig. 5.9 145 ns are introduced by the

cables and other electronic components), is given by:

LATENCY = Mod25(145ns + D1 + D2) (5.1)

It should be noted that only triggers arriving within a ±3ns time window around the clock

rising edge are used as APV6 final triggers (see Fig. 5.10). In fact the FLIP-FLOP chain that

starts the counter, shown in Fig. 5.6, is activated only in this case. This is unavoidable since we

are using a synchronous system (APV6+40 MHz clock) designed to be used in a synchronous

environment (LHC+CMS) on an asynchronous test bench (β source).

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Non accepted triggers

Accepted triggers

clock 40Mhz

6ns

6ns6ns

25ns

Figure 5.10: Relationship between accepted triggers and rising clock edge.

In this way only a fraction of the particles generating the triggers are processed, assuring

that their signals are properly sampled. Our setup, in the experimental conditions described

above and with the 90Sr source filtered through a window of approx 2 cm2, allows a final data

acquisition rate of about 50 Hz.

5.5 The Data Storage

The analogue output from each APV6 chip is sent to the TRICARD where it receives a first

amplification and an offset adjustment to match the levels and fully exploit the dynamic range

of the ADC circuit.

The ADC board is a PCI mezzanine card (PMC) inserted in the PMC slot of the RIO8062

CPU that controls the acquisition. The characteristics of this card, referred to as FED (Front

End Driver) in the following, will be described more in detail in the next section.

5.5.1 The FED ADC

The FED is a prototype of the ADC card that will be used in the experiment [6]. It contains 8

ADC channels and a Xilinx array that is programmable through the PCI connector and allows to

perform some preliminary operations on the acquired data. In particular it is possible to decide

the number of sample acquired for every trigger, the number of ADC channels to be used and

the sampling point with respect to the clock phase.

The FED ADC is a 9 bit converter running at 40 MHz. Since the output rate of the APV6

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multiplexer is only 20 MHz each channel is sampled and stored twice during the acquisition. In

CMS two APV6 chips will be further multiplexed thus obtaining a 40 MHz analogue output to

be digitized.

The sampling clock is provided to the FED by the Sequencer together with the trigger signal

that is necessary to start the acquisition. Due to the fact that there is a fixed delay and a jitter,

of the order of few µs but not predictable, between the trigger arrival time to the APV6 and

the output of the analogue frame, it is necessary to acquire a number of samples larger than

the 140 strictly necessary to get information about the 128 channels and the header. In our

setup we acquired up to 1024 samples for every trigger, covering a time window of 25.6 µs.

The string of conversions performed on the APV6 analogue output, connected to the FED, in

correspondence of a trigger is considered as a single event. Data are written in storage devices

as ASCII files containing the ADC values for all the APV6 chips in the readout chain, together

with some global information related to the software and type of acquisition performed, and are

immediately available for the offline analysis.

The maximum data acquisition rate in our system is of the order of 100 Hz for a single APV,

completely limited by the data storage rate on disk.

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Chapter 6

The laser test station

To be ready for the production phase of the final CMS silicon strip detectors a set of procedures

have to be defined in order to check the quality of the modules. One of the key steps that

have to be followed is the implementation of a flexible and affordable system that allows the

full functionality test of a complete detector, with respect both to the sensors and electronics

quality. In the context of this thesis a laser test station has been built, based on the same DAQ

system used for the MIPs measurements (see chapter 5).

A laser beam is the most suitable solution with respect to compactness, costs and measure-

ment rapidity to fully test all components of a silicon detector. Furthermore the readout signal

is easily detectable since the illuminated area is well known and stable; with this apparatus the

signal can be observed on-line even with an oscilloscope.

The laser radiation must excite electrons from the valence to the conduction band in order

to release charge in the detector, but at the same time must cross completely the detector to

simulate the passage of a particle through the entire silicon thickness. Since the crystalline

silicon wafers become transparent in the near infrared a laser radiation at λ=1064 nm can be

used [23] (see Fig. 6.1).

At this wavelength the single photon energy is 1.16 eV, compared with 1.12 eV band energy

gap. In a semiconductor with an energy gap ∆E between the valence band and the conduction

band the absorption of one photon of energy hν ≥ ∆E causes the creation of an electron-hole

pair. The absorption coefficient scales as√hν −∆E. The sensitivity of the sensors is still about

0.1 A/W and in literature we found a total transmission rate of 71% for 300 µm thick sensors

with oxide coatings on both surfaces at room temperature [49]. With these characteristics the

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Figure 6.1: Absorption coefficients for pure Ge, Si and GaAs as a function of the photon energy.Figure taken from Ref. [23].

laser beam is able to uniformly produce electron-hole pairs along its path in a silicon detector.

One of the main tasks of the job developed in this thesis has been the design of a driver

for the pulsed laser diode, the choice of an optical focusing system and the integration of two

remote controlled translation stages in the system.

6.1 The laser source

The choice of the laser source is mainly dictated by compactness and operational easiness.

The laser diodes have such characteristics and in addition are low power devices. Progresses

obtained in the last decade in semiconductor engineering, and consequent enlarged spectral

emission ranges, have made laser diodes the best candidates for applications in spectroscopy

field as well as in telecommunication, office devices, CD player etc, favouring their diffusion.

The device is a broad area high power pulsed laser operating at 1064 nm wavelength, model

C86119E manufactured by EG&G [50]. It employs MOCVD grown strained InGaAs/AlGaAs

layers offering high efficiency, low threshold and continuous wavelength tuning at approxi-

mately 0.3 nm/C. This last feature is not fundamental in applications that require only the

production of donor-acceptor pair in a silicon wafer.

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The basic principle of semiconductor lasers may be summarized as follows. When an elec-

tric current is sent in the forward direction through a p-n semiconductor diode, the electrons and

holes can recombine within the p-n junction and may emit the recombination energy in the form

of electromagnetic radiation. The wavelength is determined by the energy difference between

the energy levels of electrons and holes, which is essentially defined by the band gap. The

spectral range of spontaneous emission can therefore be varied within wide limits by the proper

selection of the semiconductor material and its composition in binary compounds. Above a cer-

tain threshold current the radiation field at the junction becomes sufficiently intense to make the

induced-emission rate exceed the spontaneous or radiationless recombination processes. The

radiation can be amplified by multiple reflections from the plane end faces (orthogonal to the

junction plane and optically treated) of semiconducting medium and may become strong enough

that induced emission occurs at the p-n junction before other relaxation processes deactivate the

population inversion. The wavelengths of the laser radiation are mostly determined by the spec-

tral gain profile and by the eigenresonances of the laser resonator. Usually the cavity face with

the larger transmission coefficient is devoted to radiation output while the light exiting the other

face is collimated on a monitor photodiode that allows the check of device functionality.

A rugged 14 pin, flanged, dual-in-line package encloses the laser diode, the silicon monitor

photodiode, the thermoelectric cooler and the thermistor used for the test station. The laser

output face is optically coupled, internally to the package, to a multimode 100 µm fiber.

The laser must be operated by pulsing it in the forward bias direction. To this end a custom

driver circuit has been designed and will be described in section 6.2. The maximum rated pulse

duration (200 ns) and duty factor (0.1 %) must never exceeded. If the specified pulse duration

or duty cycle is exceeded, the lasing action may be quenched because of the heat generated in

the junction and the device may be eventually destroyed. However the repetition rate may be

increased if the pulse duration is reduced provided the maximum duty factor is not exceeded.

The peak forward current is 4 A and the peak reverse voltage is 2 V, providing a 100 mW peak

output power from the fiber.

For our application the spectral purity of the emission is not relevant so we haven’t stabilized

the device temperature. Nevertheless the calibration of the thermistor value vs. temperature has

been measured in a climatic chamber since the data sheet provided by the manufacturer doesn’t

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report this relation. The results are shown in Fig. 6.2, where the uncertainty on the resistance is

about ±0.5 kΩ due to the thermal drift.

Temperature (oC)

The

rmis

tor

(KΩ

)

0

2.5

5

7.5

10

12.5

15

17.5

20

22.5

25

0 10 20 30 40 50 60

Figure 6.2: Thermistor calibration.

6.2 The laser driver

The laser driver has been designed to obtain a sequence of radiation pulses with the desired

duration and intensity. If the amplitude of the pulse is not a problem, more attention requires the

short duration of the laser pulse that must be of the order of few nanoseconds to be comparable

to the collection time of the charge released by a relativistic particle crossing the detector. In

addition, the circuit must maintain the laser operational conditions within the maximum ratings

provided by the manufacturer even in case of malfunctioning of some of its components.

The laser diode emits a radiation pulse in correspondence of a trigger TTL signal (T1 in

Fig. 6.3), which acts as trigger also for the DAQ system described in chapter 5. The circuit

schematic is reported in Fig. 6.3 with a set of electrical component values used during the tests.

The main block of the driver circuit is a differential pair made with two high bandwidth

transistor (model NPN-BLF80). The differential pair is switched by a fast trigger signal named

T2 derived by T1. The diode is placed on a branch of the pair and is kept in forward conduction

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T1

A A

B B

C C

D D

E E

44

33

22

11

Vdd

= -2

V

Vss

= -5

V

Vcc

= 5

V

Vdd

Vdd

Vdd

Vss

Vss

Vcc

Sign

al

U1A

7414

12

U1A

7414

12

U2A

1012

4

12

C2

270

pF

U1A

7414

12

D2

DIO

DE

R3

100

U2A

1012

4

12

R2

51

D1

DIO

DE

C3

1.3

nF

U2A

1012

4

12

Q2

NPN

-BLT

80

Q3

NPN

-BLT

80

U1A

7414

12

R6

5.6

U1A

7414

12

R1

52

R7

5.6

R8

47

R9

47

C4

1 nF

Q1

NPN

-BLT

80R

4

50

R5

1K R11

1K5

R12

33

C4

100

nF

R13

1.4

R15

27

D3

DIO

DE

D4

lase

r

C5

100

nF

U1A

7414

12

R14 27

T3

T2

T1

Figure 6.3: Laser driver schematic.

when the corresponding transistor base is low. A pair of resistor networks correctly bias the

transistor bases while a normal diode on the branch opposite to the laser one symmetrizes the

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response of the device. The current flowing through the laser diode is regulated by a resistor

switch (R13) after the collector of the differential pair output transistor (Q1). In order to reduce

the device working time this transistor conducts only in correspondence of a trigger signal T3,

derived from T1 and synchronous to T2 but longer. Furthermore a RC filter allows the current

to flow through the resistor switch only when the current flows through the laser (D4).

The trigger signal (T1) from a local oscillator reaches the differential pair after a series of

logic gates (NOT gates) and a CR shaping stage which allows to adjust the duration of the TTL

pulse, properly selecting the values of a capacitor (C2) and a resistor (R2). A diode suppresses

the undesired signal polarity. The trigger T1 is sent in a second branch and is shaped with a

larger time constant in order to obtain the signal T3. The circuit is biased between +5V (Vcc)

and -5V (Vss), with a further bias reference Vdd=-2V.

The design has been tested with a SPICE simulation and the results are in agreement with the

pulses obtained experimentally (see Fig. 6.4). The regulation of the collector resistance (R13)

allows a dynamic arrangement of the current flowing into the diode and of the output power,

while the RC (R2-C2) time constant responsible of the pulse signal duration can be adjusted

to obtain pulse width down to 20 ns with good shapes. The voltage drop, corresponding to

the current pulse in the laser, measured with a digital oscilloscope connected to the laser diode

cathode is shown in Fig 6.4.

Figure 6.4: Laser pulse duration for R=51 Ω and C=300 pF.

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6.3 The optical and the positioning systems

The laser beam is strongly divergent at the multimode fiber output. A measurement performed

with a photodiode array over several distances from the fiber end leads to a divergence of about

25 degrees. In order to obtain a smaller spot size, to avoid keeping the fiber in a dangerous way

close to the detector surface, it is necessary to use an optical collimation system between the

fiber and the sensor. Furthermore the system must be compact and must be positioned vertically

to scan the detector surface that is placed on a horizontal plane over a pair of translation axis.

A system based on a microscope objective as a collimator and a convergent lens, coaxial to

the fiber, has been chosen (Fig. 6.5). The fiber, kept safe in its final stage inside a fiber holder, is

Microscope objective

Laser beam

Fiber

Fiber holder

Fiber coupler

LensSilicon detector

(a) (b)

Figure 6.5: Laser beam collimation system.

housed inside a fiber coupler (model Newport-M-F1015). On the same optical axis an objective

lens is placed in order to collimate the strongly divergent beam coming out from the fiber. The

fiber coupler is devoted to easily adjust the distances between the fiber and the objective and

their relative position by means of a set of three dimension micrometric positioning system.

The collimated beam is directed on a convergent lens and is focused on the detector surface.

The lens is placed on a micrometric translation stage (model Newport-UMR8.25) that allows

to change the distance between the detector and the lens, so to have an additional degree of

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freedom in the overall geometry. The fiber coupler and the translation stage are fixed on an

aluminium bridge standing over the detector.

The detector is placed on a pair of orthogonally coupled translation axes in order to make the

system able to perform a scan of the entire sensor surface. The longer axis is fixed on the laser

station reference surface and holds, orthogonally to its displacement direction a second shorter

axis that carries the detector. The two axes, manufactured by Newport (Model MT70 300 and

M UTM150 PP 1HL respectively), are step motorized with a position resolution of 1µm. They

are driven by a controller model MM2500 that allows manual and software displacement. A

software control code, based on a Macintosh/OS, has been developed to move the axes via

a parallel IEEE-488 interface. Position and translation velocity are set by the user so that the

detector scan can be localized and optimized. A picture of the whole system is shown in Fig. 6.6

Translation axis

Laser Driver

Optical system

Detector

TRIcard

Laser source

Figure 6.6: The laser test station.

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6.4 System performances

The laser system setup structure is summarized in Fig. 6.7. Several configuration of the optical

system have been tested in order to obtain a spot size as small as possible. It has been found

that, due to the fiber coupling, the laser beam doesn’t behave as a true gaussian beam and it is

more difficult to focus.

Translation axis

LASERPulse generator

Analog signal( to VME )

Pc/Mac

GPIB

Axis Driver

DetectorSequencer

(TRIGGER)

Figure 6.7: The laser test station structure.

The spot size has been measured with a photodiode linear array made of 128 pixels each

with a 25 µm width. The array scanning is carried out at a multiplexer frequency of 2.725 KHz,

corresponding to 2.75 µs/pixel. Beam waist measurements performed with the photodiode array

agree with data collected with the silicon detectors. The narrower beam waist is obtained with a

19 mm focal-length plano convex lens and a 40 mm focal-length 0.10 N.A. objective lens, and

corresponds to a FWHM about 80 µm, as shown in Fig. 6.8.

The second adjustment concerns the laser intensity that is regulated by changing the resistor

R13 in Fig. 6.3. The high intensity configuration allows to detect easily the laser beam position,

mainly for debugging purposes, since the signal on the lightened strips is visible directly on

the oscilloscope, while a lower intensity configuration is used to emulate MIPs charge release.

The laser intensity calibration has been performed by changing the R13 resistor value and by

measuring the charge released. In Fig. 6.9 the measured charge (in peak mode) as a function of

the R13 resistor value is shown.

The setup allows to perform a scanning of the detector response over all the strips in a couple

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Figure 6.8: Beam waist measurement performed with a photodiode array. (1µs=9.1 µm);FWHM ∼ 80µm.

R13 resistor (Ω)

Cha

rge

(AD

C c

ount

s)

10

20

30

40

50

60

70

5 6 7 8 9 10 11 12

Figure 6.9: Laser intensity calibration. The charge measured in peak mode vs. the R13 resistorvalue is shown.

of minutes if we take into account a 50 Hz event acquisition rate and we want to collect enough

statistic on every channel (512 strips in total). This procedure has revealed itself to be very

effective in finding unbonded or broken strips/channels. Furthermore broken bondings can be

easily traced to the crystal-hybrid or the crystal-crystal interface. A laser scan, together with

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a pedestal and noise measurement, can give all major information about every single detector

channel and is a good candidate to setup a module test procedure. The uniformity response

of all the detector channels is shown in Fig. 6.10 (a); previously unbonded strips are clearly

visible in correspondence where no clusters have been reconstructed . The cluster charge (laser

induced) distribution is shown in Fig. 6.10(b), where the fit to a gaussian curve is superimposed.

Strip number

Rec

onst

ruct

ed c

lust

ers

0

5

10

15

20

25

30

0 100 200 300 400 500

(a)

67.31 / 60Constant 40.33Mean 27.84Sigma 4.805

Entries

AD

C c

ount

s

0

10

20

30

40

50

60

5 10 15 20 25 30 35 40 45 50 55

ADC counts

Ent

ries

ADC counts

(b)

Figure 6.10: Detector channel response to a laser beam continuously scanning the detectorsurface (a) and cluster charge distribution for a MIP-like laser generated charge (peak mode)(b).

The mean value of the distribution in Fig. 6.10(b) is close to the most probable signal re-

leased by a MIP.

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Chapter 7

Performances of the detector prototypes

In this chapter the performances of the detector prototypes described in section 2.5 and 3.3 are

summarized. This study is important since the size, strip design and front-end electronics of

these detectors are very similar to the ones that will be installed in the inner forward part of the

CMS silicon tracker.

All the detectors have been carefully characterized in laboratory measuring the electrical

parameters, the noise and MIPs response. Later they were tested at CERN with a muon beam

in a more complex experimental setup. The performances in terms of signal to noise ratio have

been compared with the values estimated from the detectors electrical parameters. The complete

set of modules available, which covers several of the main possible choice for the substrate type,

and the presence of irradiated detectors has allowed a wide analysis of the performances of this

kind of prototypes and has showed that satisfactory values of S/N ratio have been obtained even

in the worse experimental conditions. Finally, the first results on the MIP response of a 500 µm

thick detector bonded to the APV6 chip are presented.

All these measurements, which are the main object of the work performed during the thesis

and which I have done personally, have been submitted for publication [8] [53] [54].

7.1 Off-line analysis

The information related to the analogue output frame of each APV6 chip are converted by the 40

MHz CMS ADC (FED [6]) and stored on disk for subsequent off-line analysis. The data taking

is done on individual runs, each one consisting of approximately 1000 events for the laboratory

measurements and 10000 events for the beam test acquisition. For each front-end chip an event

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contains a redundant number of consecutive digitized samples of the analogue output and is

defined by an external trigger generated by scintillation counters. Only a fraction of the data

stored in every events consists of the 12 bit logical header and the 128 samples related to the

detector channels read out by the APV6 chip. The first operation performed by the analysis

code is to extract the 128 voltage levels, converted by the ADC, by means of a robust threshold

recognition algorithm. Since the APV6, due to the multiplexer design, presents at its output the

channel voltage levels in a non sequential way with respect to the strip number on the detector

a reorder is needed. The 128 ADC values thus obtained, referred to as ADCni in the following,

with i channel number and n event number, are the starting point for every subsequent off-line

analysis. The signal Sni of each channel and its noise σi are calculated from the raw data after

a subtraction of the common mode and pedestals. Only at this stage the presence of a charge

signal (cluster) due to particle crossing is searched. Since we are still in a debugging phase for

both the detectors and software no zero suppression has been performed at DAQ level. This will

be a fundamental component of the final CMS DAQ software.

The pedestal of each channel PEDi is defined as the average strip output level when no

signal (charge or calibration) is present. Its calculation is performed by an iterative process. A

first raw estimation PEDrawi is given by the average on N events of the ADC counts for each

individual channel:

PEDrawi =

∑Nn=1 ADCn

i

N(7.1)

A correction has to be applied, for each event, to the raw data in order to take into account

the shift of the baseline for all the strips belonging to the same electronic section of the APV6

chip. This effect is known as common mode noise and it is event dependent since it is mainly

due to electronic noise pickup at the pre-amplifier inputs. The common mode noise CMN n is

calculated, event by event, as the average of the pulse heights for contiguous strips removing

the channels that may carry a particle signal or that are too noisy:

CMNn =1

Nch

Nch∑i=1

(ADCni − PEDraw

i ) (7.2)

where Nch is the number of channels that are considered to be affected by the same common

noise shift. In the case of the APV6 chip, since the analogue inputs are grouped in 4 blocks

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of 32 channels, we calculated four different common noise values on a 32 channel basis. The

common mode algorithm has revealed to be robust and all the common mode distributions for

our detectors are well fitted with a gaussian curve.

The final value of the pedestals is then recalculated after the common mode noise subtraction

as shown in Eq. 7.3. From each channel the corresponding common noise is subtracted and the

pedestal for the ith channel is recalculated:

PEDi =1

N

N∑n=1

(ADCni − CMNn) (7.3)

The reordered pedestals profile, common mode subtracted, is shown in Fig. 7.1 for a set of four

APV6 chips housed on the same hybrid; the 32 strips pattern is clearly visible. The common

Channels

PE

Di (

AD

C c

ount

s)

APV6 chip 12

Channels

PE

Di (

AD

C c

ount

s)

APV6 chip 14

Channels

PE

Di (

AD

C c

ount

s)

APV6 chip 1a

Channels

PE

Di (

AD

C c

ount

s)

APV6 chip 1c

0

50

100

150

200

250

300

50 1000

50

100

150

200

250

50 100

0

50

100

150

200

250

50 1000

50

100

150

200

250

300

50 100

Figure 7.1: Pedestal profiles of the four chips housed on the hybrid after common mode sub-traction. The APV6 chips are bonded to the detector.

mode noise is calculated a last time using the new value of the pedestals obtaining the final

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CMNn. In Fig. 7.2 the typical distributions for the common mode noise corresponding to the

4 groups of 32 contiguous strips are shown. The signal Sni present during the event n on the ith

common noise chips =1

IDEntriesMeanRMS

91 4000 -.1348E-02

4.878 92.68 / 58

Constant 199.9Mean -.6556E-01Sigma 4.681

common noise chips =2

IDEntriesMeanRMS

92 4000 -.4798E-02

5.136 86.20 / 67

Constant 195.7Mean -.6366E-01Sigma 4.786

common noise chips =3

IDEntriesMeanRMS

93 4000 -.1498E-02

5.061 116.9 / 65

Constant 199.8Mean -.2029E-01Sigma 4.652

common noise chips =4

IDEntriesMeanRMS

94 4000 -.5980E-03

4.870 69.54 / 59

Constant 201.0Mean -.4564E-01Sigma 4.682

0

50

100

150

200

250

-20 0 200

25

50

75

100

125

150

175

200

225

-20 0 20

0

50

100

150

200

250

-20 0 200

25

50

75

100

125

150

175

200

225

-20 0 20CMN (ADC counts)

CMN (ADC counts) CMN (ADC counts)

Ent

ries

Ent

ries

chip 1C

chip 12

chip 1A

chip 14

CMN (ADC counts)

Figure 7.2: Distribution of the common mode noise of 4 APV6 chips housed on the samehybrid. The APV6 chips are bonded to a complete detector.

strip is calculated subtracting from the sampled ADC value ADCni the strip pedestal and the

common mode noise effect:

Sni = ADCn

i − PEDi − CMNn (7.4)

The statistical fluctuation of the signal around its pedestal value defines the noise σi associated

with a channel:

σ2i =

1

N − 1

(N∑

n=1

(ADCni − CMNn)2 −N · PED2

i

)(7.5)

The noise is calculated on the same event sample in the case of beam test runs or on a

separate file acquired in absence of particle beam during laboratory measurement. In both cases

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the whole process is performed with several iterations; in a first step all the strips and events are

included so to have a preliminary estimation of the strip signal and noise. These quantities are

later used to identify the strips which have collected some charge and that have to be removed

from the pedestal, common and strip noise calculation. Furthermore the analysis code identifies

and tags the detector channels that show an anomalous behaviour with respect to noise. More

in detail this happens when a strip is not connected or it is noisy. The latter case, if not related

to the front-end electronics, is due to an increase of the leakage current, of the capacitive load

subsequent to a short between adjacent strips or to a pinhole in the coupling oxide layer. The

overall effect is the removal from the off-line analysis of the strips with a noise exceeding a

given range around the detector noise mean value. In Fig. 7.3 the noise profile of 128 strips (a)

and their distribution (b) is shown for a non irradiated module.

profilo sigma (cmn sub) chips =1

IDEntries

21 128

0

0.5

1

1.5

2

2.5

3

3.5

20 40 60 80 100 120

1

2

3

Noi

se (

AD

C c

ount

s)

0 20 40 60 100 12080Strips

(a)

sigma (cmn sub) chip =1

IDEntriesMeanRMS

31 128

1.545 .8381E-01

19.69 / 9Constant 28.55Mean 1.536Sigma .6004E-01

Noise (ADC counts)

Ent

ries

0

5

10

15

20

25

30

35

40

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2

Entries

0

40

1 2

10

20

30

Peak mode

0Noise (ADC counts)

Ent

ries

(b)

Figure 7.3: Measured noise profile for a single chip of a non irradiated detector operating in peakmode (a). Distribution of the noise for the same APV6 chip. The fit to a gaussian distribution issuperimposed (b).

The noise value that will be used to estimate the detector performances in the following is

obtained as the most probable value of the gaussian fitted to the noise distribution.

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7.1.1 Cluster and total charge reconstruction

The experimental evidence of the passage of a particle through the detector is obtained searching

for a group of contiguous strips (cluster) with a total signal value compatible with the charge

released by a MIP. The cluster finding algorithm is based on the previously defined quantities

“strip signal” and “strip noise”. Three parameters allow to select only the strips and clusters

with a signal which exceeds given thresholds. For each event the analysis code loops over the

strips to find the ones with a signal to noise ratio greater than a given threshold Ts:

Sni > Ts × σi (7.6)

These strips assume the role of cluster seeds. Then the neighbour strips, up to three for each

side of the seed, are checked to see if they have a bigger S/N and in that case they are promoted

to cluster seed. When this search is terminated the seed is established and the nc neighbour

strips satisfying the condition:

Sni > Tn × σi (7.7)

are added to the seed to form a cluster. The maximum number of strips allowed in a cluster is

limited by the fact that in our tests particles cross the detector orthogonally and we have always

measured a cluster multiplicity below 7 strips. On the other hand, setting a loose limit to the

cluster size we risk to merge into a single cluster the strips affected by the close passage of two

different particles. Anyway the lateral strips search on each side of the seed ends when the first

strip not satisfying condition 7.7 is found.

Finally, the total cluster charge is computed as the sum of the signal over the accepted strips:

Sncluster =

∑nc

Si (7.8)

The last threshold is given on the total charge; the cluster is retained if:

Sncluster > Tc × σi(seed) (7.9)

The threshold values used in this analysis are:

Ts = 4 Tn = 2 Tc = 5 (7.10)

and are a compromise between the need of maintaining a good reconstruction efficiency and the

risk of introducing noise cluster (ghost hits).

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7.2 The 300 µµµm detectors

All the modules built in the framework of this thesis have been carefully characterized with

respect to S/N ratio performances in laboratory with MIPs extracted from a β source and in

three beam test sessions at CERN during summer 2000. I have taken care of all the measurement

done in laboratory and I have participated to the beam test activities together with other groups

of the CMS Tracker collaboration.

The APV6 registers have been set out, during all the measurements, at their nominal value;

in particular the VSHA register is adjusted to 2 V (see section 4.2).

7.2.1 The βββ source measurements

The detectors have been exposed to MIPs in the experimental setup described in 5.1. For the

whole set of detectors we have computed the cluster charge distributions and fitted them to a

Moyal function (see Eq. 2.14 for the meaning of the plot parameters) approximating the energy

loss distribution in a thin silicon layer. The measurements have been performed at -10C for the

irradiated devices and at room temperature for the non irradiated ones.

The cluster charge distribution with the APV6 chip operating in peak mode is shown in

Fig. 7.4; the result of the fit is superimposed. The cluster charge value to compute the S/N

ratio will be referred to as the peak value of the fitted function to such distribution. The cluster

charge measurements have shown a good reproducibility over long term periods (about 5% for

the cluster signal).

The strip noise profile for all the detectors is quite flat and follows a gaussian distribution

around the mean value. For this reason we have always used the strip noise mean value of the

fitted gaussian to calculate the signal to noise ratio without applying a weighted sum to the strip

noises involved in the cluster.

The S/N ratio

The main target of this analysis is to measure the signal to noise ratios for the two kinds of

substrates, both irradiated and non irradiated. The signal to noise ratio, as stated before, is

defined as the ratio of the most probable value of the “Moyal function” fit to the cluster signal

distribution to the most probable value of the gaussian fit to the strip noise distribution. The

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EntriesMean

871 42.65

63.32 / 41P1 309.6P2 35.09P3 5.230

ADC counts

Ent

ries

0

10

20

30

40

50

60

70

80

90

0 20 40 60 80 100 120

(a)

EntriesMean

528 44.88

59.57 / 51P1 147.3P2 34.22P3 6.422

ADC countsE

ntri

es

0

5

10

15

20

25

30

35

40

45

0 20 40 60 80 100 120 140 160

(b)

Figure 7.4: Cluster charge distribution for the non irradiated (a) and irradiated (b) <111>detectors. The measurement are performed in peak mode at a bias voltage of 200 V (a) and 500V (b). See Eq. 2.14 for the fit parameter meaning.

results are summarized in Table 7.1. Due to the uncertainties related to the fit procedure and

mainly to the spread observed on measurement performed with the same APV6 and detector

conditions, the S/N values are affected by an uncertainty of the order of ±1mainly of systematic

origin. In particular we have observed a strong dependence on the detector temperature, which

needs to be stabilized. In the worst cases the irradiation procedure has reduced the signal to

noise ratio of about 15 % but even in deconvolution mode the S/N value is far above the limit

of 10. The tests performed have shown no experimental evidence, in the uncertainty limits

mentioned above, of a different behaviour between the <111> HR and the <100> LR devices,

once they are operated overdepleted. This is true for both non irradiated and irradiated detectors

after taking into account the different depletion voltages.

On all the devices we performed a voltage scan to study the effect of different bias voltages

on the charge collection mechanism. In Fig. 7.5 the results are shown for the non irradiated and

irradiated <111> HR detectors, in terms of signal to noise ratio, both in peak and deconvolution

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mode.

Vbias (V)

S/N

Peak mode

Deconvolution mode

Non irradiated HR detector

0

2.5

5

7.5

10

12.5

15

17.5

20

22.5

0 50 100 150 200 250 300

(a)

Vbias (V)

S/N

Irradiated HR detector

Peak modeDeconvolution mode

8

10

12

14

16

18

100 150 200 250 300 350 400 450 500

(b)

Figure 7.5: Bias voltage scan for the non irradiated (a) and irradiated (b) high resistivity detec-tor. Measurements are performed both in peak and deconvolution mode with a β source.

The signal to noise increases with the applied voltage even after the silicon bulk is fully

depleted due to the increase in charge collection and a reduction in noise. A possible expla-

nation of the signal increase after the depletion voltage has been reached is that our LHC type

electronics suffers of a ballistic defect due to the non negligible charge signal formation time.

This effect is particularly evident when dealing with irradiated devices. The measurements per-

formed have shown that we can safely over deplete the irradiated devices but an efficient cooling

system is crucial to operate the detector. We can observe the increase, due to irradiation effects,

of the bias voltage that optimize the S/N ratio, as expected from the considerations presented in

chapter 3. From the S/N ratio versus bias voltage plot we determine the operating voltage for

the whole set of detectors.

A careful characterization has been performed on the modules to test their response to a

change of the main APV6 registers. In particular the cluster charge measurement as a function of

the trigger delay with different VSHA values has proved that the APV6 response doesn’t change

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with an external load, as shown in Fig 7.6 for peak mode measurements. In this plot the APV6

output shape obtained in calibration mode with the hybrid not connected to the detector (open

circles) is superimposed to the shape obtained with β source MIPs on the complete module

(full triangles). The signals are normalized to the peak value and their shapes are completely

overlapped.

Delay (ns)

Sign

al (

AD

C c

ount

s)

VSHA = 0.56 V β source

VSHA = 2.0 V β source

VSHA = -0.20 V cal. mode

VSHA = 2.0 V cal. mode

Non irradiated detector0

50

100

150

200

250

0 20 40 60 80 100 120 140 160 180

Figure 7.6: Effect of the VSHA register in calibration mode (with the APV6 not bonded to thedetector) and with a β source. Data are normalized to the shape peak value.

The decrease of the VSHA value (in Volts) correspond to a larger shaper time constant (see

Fig. 7.6, full circles and open squares) so the charge collected increases; this is shown also in

Fig 7.7 for the non irradiated device.

Anyway the VSHA value that has been used during beam tests and laboratory performance

measurements is the one corresponding to the fastest response (VSHA=2 V).

7.2.2 The Beam Test measurements

The detectors have been exposed to a muon beam during two beam tests in the area called X5

at the CERN SPS during summer 2000. The particles had a momentum of about 100 GeV/c

and an intensity of 104 muons per spill (extraction cycle). The experimental setup used during

the beam tests is more complex than the one described in chapter 5.1 since it is based on a

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Vsha (Volts)

Cha

rge

(AD

C c

ount

s)

non irradiated detector

β source

105

110

115

120

125

130

135

140

0 0.5 1 1.5 2

Figure 7.7: Effect of VSHA on the charge collected in peak mode with the β source.

DAQ system similar to the final one foreseen for the CMS tracker. In particular the trigger and

clock signals are delivered through a Front End Controller (FEC) and are processed by a Central

Control unit (CCU) before reaching the detectors [3]. The analogue APV6 output signals are

transmitted to the FED by means of analogue laser drivers and optical fibers [51]. Furthermore

this system has been successfully operated for the first time under LHC like beam conditions in

a 25 ns structured beam provided by the SPS accelerator complex [52].

All the detectors were installed in a temperature controlled box. The non irradiated devices

are operated at 10 C while the irradiated ones at -15C.

The muon beam was centred on the central region of the detector as shown in Fig. 7.8 where

the cluster seed is plotted for the two central APV6 chips only.

In order to reduce the noisy clusters we select only the events in which the clusters show

a strong position correlation with two other reference detectors (straight tracks). In Fig. 7.9

the cluster seed position is plotted for the <111> HR non irradiated detector and two other

detectors, showing a strong correlation.

From the track clusters we have measured the cluster charge distribution and the corre-

sponding noise. A typical charge distribution is showed in Fig. 7.10 for the < 111 > HR non

irradiated detector operating in peak (a) and deconvolution mode (b).

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EntriesMean

2157 126.3

0

20

40

60

80

100

Ent

ries

Strip number

0 50 100 150 200 250 300

Rec

onst

ruct

ed c

lust

ers

Strip number

Figure 7.8: Beam profile measured during the beam test.

050

100150

200250

300

050

100150

200250

Stri

p nu

mbe

r (F

lore

nce)

Strip number (Module 11) Strip number (Module 10)

0

25

50

75

100

125

150

175

200

225

250

Figure 7.9: Cluster position correlation between 3 detectors.

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90.54 / 67P1 262.3P2 46.13P3 6.675

0

10

20

30

40

50

60

70

80

0 20 40 60 80 100 120 140 160 180 20020 40 60

Non irradiated

80 100 120 140 160 180

20

40

60

80E

ntri

es

Charge (ADC counts)

S/N=20

(a)

112.9 / 72P1 273.9P2 38.77P3 7.350

0

10

20

30

40

50

60

70

80

90

0 20 40 60 80 100 120 140 160 180 2000 20

20

40

40

60Charge (ADC counts)

60

80

80

100 120 140 160 180

S/N=13

Non Irradiated

Ent

ries

(b)

Figure 7.10: Cluster charge distribution for the < 111 > HR detector measured in a muon beamin peak mode (a) and deconvolution mode (b).

The noise profile and the noise distribution measured for an APV6 of the same detector in

peak mode with the X5 beam test experimental setup are shown in Fig. 7.11.

The performances obtained in terms of signal to noise ratio agree with the values obtained

in laboratory with the β source (see Tab. 7.1). Furthermore, from the comparison of the APV6

digital header amplitudes (see chapter 4.1) acquired in the two different experimental setups,

that are closely related to the relative analogue amplification gain, we have confirmed that the

beam test and Florence setup charge and noise measurements are consistent.

The signal to noise ratio as a function of the bias voltage has been measured for all the four

detectors showing a good agreement with the data obtained in laboratory. The S/N versus bias

voltage for the non irradiated devices is shown in Fig. 7.12

7.2.3 Results summary

The performances obtained during the laboratory and beam test measurement have shown a

very good agreement in terms of S/N ratio. This makes us confident that our setup can perform

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Channel

Noi

se(A

DC

cou

nts)

7.569 / 4Constant 43.47Mean 2.288Sigma .1406

ADC counts

Ent

ries

0

0.5

1

1.5

2

2.5

3

20 40 60 80 100 120

0

10

20

30

40

50

0 1 2 3 4 5 6 7 8 9 10

Non irradiated detector

Peak mode

Non irradiated detector

Figure 7.11: Noise distribution for the non irradiated <111> HR detector.

Vbias (V)

S/N

Detector 111 non irr.Detector 100 non irr.

Non irradiated detector

0

2.5

5

7.5

10

12.5

15

17.5

20

22.5

0 50 100 150 200 250 300 350 400

Figure 7.12: Bias voltage scan for the non irradiated detectors.

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the test of the detectors functionality in all the situations where spatial resolution measurements

and full electronics integration are not required. From the other side our detectors have provided

a reference benchmark to test the noise performance of the more complex beam test setup at

CERN. In order to fully validate the measured signal to noise ratio a comparison is fulfilled with

the expected values obtained starting from the relations derived in chapter 2.6 after the sensors

electrical characterization.

In Table 7.1 the main results in terms of S/N ratio are summarized. The measured S/N ratios

are slightly lower than the expected ones, in particular for the non irradiated devices, but this

discrepancy has almost entirely disappeared for the irradiated detectors.

The experimental conditions with respect to temperature and leakage current are taken into

account to calculate the expected S/N values. The accuracy on the S/N ratio is of the order

of ±1 as emerged from measurement reproducibility over long term operation and different

environment condition.

Detector <111> HR <100> LR

non irradiated irradiated non irradiated irradiated

LABORATORY

S/N Pk 20.1 @200 V 16.9 @500 V 18.5 @400 V 17.0 @450 V

S/N De 12.0 @200 V 11.5 @500 V 11.5 @400 V 11.2@450 V

BEAM TEST

S/N Pk 20.0 @200 V – 18.5 @350 V –

S/N De 12.7 @200 V 10.6 @500 V 11.8 @600 V

Expected values

S/N Pk 22.5 – 22.5 16.7

S/N De 14.3 – 14.3 12.7

Table 7.1: 300 µm Milestone 99 detectors performances. The S/N ratio is reported both in peak(Pk) and deconvolution (De) mode.

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7.3 The 500 µµµm detector

The outer part of the silicon tracker is based on large area detectors in order to take advantage of

the new 6” production lines. Since the increase in strip length will worsen the noise contribution

it is necessary to employ thicker detectors so to collect more charge and maintain signal to noise

well above the required threshold of 10.

In the framework of this thesis the first results on the performances of 500 µm thick silicon

detectors, before and after irradiation, bonded to the CMS front-end electronics have been ob-

tained [54] [53]. Is is worth stressing that a wafer thickness of 500 µm is currently an industry

standard for 6” lines and this would result in significant cost savings for the sensors and a further

simplification in the production phase.

7.3.1 The modules

The prototypes under study were produced by ST Microelectronics (Catania, Italy) starting from

a design of the CMS Pisa group that has looked after to the preliminary electrical characteriza-

tion too. They are manufactured on 500 µm thick n-type silicon bulk from 6” wafers and have

an active area of 31 × 50 mm2 with a “barrel type” geometry. The bulk resistivity is greater

than 4 KΩ·cm and the crystal lattice orientation is <100>. The sensors are single sided with

256 p+ strips with an implant width of 24 µm and a pitch of 122 µm. The implant strips are AC

coupled to the APV6 read-out chips through integrated capacitors obtained with multi-layers of

SiO2. The bias voltage is provided through polysilicon resistors in the same way as described

for Florence detectors (see chapter 2.4.1). The active area is surrounded by six guard rings in

order to increase the breakdown voltage and a n+ implantation along the edge of the device is

added to reduce the cut line contribution to the leakage current.

In our analysis we used two identical sensors, one of which has been irradiated, bonded to

hybrids equipped with APV6 chips. For a later comparison of the performance of the 500 µm

modules with respect to the 300 µm ones, a 300 µm thick sensor with 120 mm long strips and

a pitch of 122 µm has been bonded to the same hybrid of the irradiated device. This reference

detector has 128 strips.

The detectors have been uniformely irradiated, using the Louvain-la-Neuve cyclotron facil-

ity described in section 3.2, up to a flunce of 1.6 · 1013 1 MeV equivalent n/cm2, similar to the

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expected value for 10 years of LHC operation in the outer silicon tracker region [4]. During

irradiation the detectors were fully depleted by applying a bias voltage of 150 V and they were

kept at a temperature of -10C. After irradiation they were stored at -25C in order to reduce

reverse annealing effects.

The characterizations performed on detectors before and after irradiation has shown that

the devices can be operated in stable conditions up to 400 V in both cases [53]. From a bulk

capacitance measurement as a function of the bias voltage the full depletion voltage turns out

to be 53 V and 42 V, for the non irradiated and irradiated detector respectively. Due to the low

neutron fluence the irradiated detector is not type inverted.

7.3.2 Florence laboratory results

The detectors have been exposed to minimum ionizing particle beam obtained selecting elec-

trons from a β source with the same experimental setup described in chapter 5.1 The mea-

surement have been performed at -10C. To study the effect of temperature we operated the

non irradiated detector both at -10C and at 10C but the data collected, in this case, show no

significant variations.

Data were taken both in peak and in deconvolution mode and the detectors were operated

within a wide range of bias voltages. In Fig. 7.13 the cluster charge distributions in peak mode

for the 300 µm and the 500 µm thick detectors in the same operating conditions are shown; in

this particular case the bias voltage is 150 V.

Comparing the total cluster charge for the 300 µm and 500 µm detectors we observe a direct

proportionality between charge and thickness (see Table 7.2). The charge collected as a function

of the bias voltage is plotted in Fig. 7.14 for the 500 µm irradiated and non irradiated detectors.

Main results are summarized in Table 7.2, where the most probable signal values and the

noise are reported for data taken at a bias voltage of 150 V and a temperature of -10C for

all the detectors. The noise increases only slightly after irradiation ( 5% both in peak and

deconvolution) and the cluster charge loss is below 10 %.

It should be stressed here that the performances in term of signal to noise ratio for these

prototypes with reduced strip length are not important. It is of main importance the demonstra-

tion that the collected charge for the different devices scales with the thickness and the effect of

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23.49 / 22P1 259.6P2 35.74P3 5.418

ADC counts

Ent

ries

/bin

0

10

20

30

40

50

60

70

0 50 100 150 200 250 300

(a)

83.86 / 37P1 796.6P2 59.90P3 8.304

ADC countsE

ntri

es/b

in

0

25

50

75

100

125

150

175

200

225

0 50 100 150 200 250 300

(b)

Figure 7.13: Cluster charge distribution in peak mode for the 300µm (a) and 500µm (b) thickdetectors.

Detector Signal Noise Signal Noise Signal/µm

(Peak) (Peak) (Dec.) (Dec.) Peak Dec

500 µm irradiated 55.0 1.40 45.0 2.26 0.11 0.09

500 µm non irradiated 59.9 1.32 49.2 2.14 0.12 0.10

300 µm Ref. non irr. 35.8 1.79 29.3 2.64 0.12 0.10

Table 7.2: Signal and noise results for 500µm thick detectors compared to a 300 µm referencedetector. The values reported are in ADC counts. The strip lengths are different in the two casesso that noise cannot be directly compared.

irradiation on 500 µm samples does not alter significantly the noise and charge values.

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Vbias (Volts)

Cha

rge

(AD

C c

ount

s)

Non irradiated detector - peak modeIrradiated detector - peak modeIrradiated detector - deconvolution mode

10

20

30

40

50

60

70

80

0 50 100 150 200 250 300

Figure 7.14: Collected charge versus bias voltage for the 500µm irradiated and non irradiateddetector.

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ConclusionsThe work performed in the context of this thesis has concerned the study of the performances

of the silicon microstrip detector prototypes for the forward part of the CMS tracker at LHC,

with particular emphasis on the radiation effects and their influence on the signal to noise ratio.

A set of modules, with the same geometrical characteristics, has been built by the CMS Flo-

rence group starting from two different substrates: a high resistivity <111> crystal orientation

and a low resistivity <100>. Two of them, one for each kind, have been heavily irradiated with

a neutron beam (up to a fluence of 1.1 · 1014 1 MeV equivalent n/cm2, that is the value expected

after 10 years of LHC operation in the region where these detectors are going to be installed) to

study the radiation damage effects.

In order to measure the signal and noise performances, a β source test and DAQ system,

which has revealed to be very flexible in performing the modules and front-end electronics

characterization, has been built in the framework of this thesis in Florence laboratory. On the

same DAQ system I have implemented a laser station with the primary goal of providing a fast

check of the detector channels functionality.

All the tested detectors were bonded to the APV6 chip, a prototype of the Silicon microstrip

tracker front-end electronics very similar to the final version that will be used in the experiment.

A deep investigation has been done in order to understand the operating principle of the APV6

and its main features. The flexibility of the laboratory DAQ setup has allowed to plan a fast test

procedure of all the main APV6 functions (logic, channel response, noise). The main object

of the work I performed during the thesis has been the testing of the modules during their

construction stages, from the APV6 chip alone to the irradiated modules.

The whole set of detectors has been exposed to a high energy particle beam in three different

test periods at CERN. In this case a complete prototype of the CMS tracker read-out and control

system has been used, with components as close as possible to the final design. This system

has been successfully operated for the first time under LHC like conditions in a 25 ns structured

beam.

Main results obtained from the laboratory and beam test measurements, which fully agree

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among them, may be summarized as follows:

• The HR and LR devices are both type inverted with full depletion voltages values re-

spectively of 250 and 130 V after an irradiation with 1.1 · 1014 1MeV equivalent n/cm2.

From the bias voltage scan it appears that the detectors have to be operated overdepleted

in order to optimize the S/N ratio.

• No experimental evidence on a difference between the <111> HR and <100> LR mod-

ules in terms of signal to noise ratio has been obtained, provided that they are used overde-

pleted.

• The signal to noise ratio changes, before and after irradiation, from 20 to 17 in peak mode

and from 12 to 11 in deconvolution mode.

• An efficient cooling system is crucial to operate the irradiated detectors, avoiding the

potentially dangerous thermal runaway effect.

The measured S/N ratios show only a slight discrepancy with the values expected from a

calculation based on the detector electrical parameters measurement and the APV6 chip perfor-

mances.

From previous experience coming from test beam measurements it is known that a S/N≥10,

using our clustering algorithm, assures an efficiency close to 100 % while reduces under a

negligible level ghost hits related to statistical noise fluctuations.

The collected results have shown that this threshold is guaranteed, with the APV6 front-end

chip, even in the presence of irradiated detector working in the high-luminosity LHC condi-

tions. In particular the detectors were irradiated up to the foreseen fluence for 10 years of LHC

operations and the main goal of a S/N∼ 11 in deconvolution mode, while keeping the full de-

pletion voltage below an acceptable limit, has been obtained. Initial low resisitivity substrates

help in reducing the optimal detector operating bias voltage in the crucial high luminosity phase

of LHC once the tracker will be heavily irradiated. This makes us confident that this kind of

detectors will ensure satisfactory performances for the whole lifetime of the experiment.

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Finally, the total cluster charge and noise have been measured, for the first time, for a 500µm

thick silicon detector bonded to CMS electronics, comparing these values before and after irra-

diation. The results are in good agreement with expectation in terms of linearity of the charge

collected with respect to the thickness and in term of measured noise, both in peak and in de-

convolution mode. These data show that 500µm devices are a promising technology for large

area silicon trackers.

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Appendix A

APV6 response parametrization

The transfer function for the circuit shown in Fig. 4.3 can be derived in two independent ways.

The first possibility is to find the best transfer function F (ω) by fitting experimental data with

the inverse Fourier transforms of a multipole functions plausible set. In a second case an an-

alytical approach can be used and from a comparison with the experimental points the main

parameters of a simplified equivalent circuit can be calculated.

I Method

The experimental data are well fitted with the time function F (t) obtained as the inverse

Fourier transform of a four poles (two real and two complex) function F (ω) given by:

F (ω) =1

(1 + jωτ1r)(1 + jωτ2r)(1 + jωθ)(1 + jωθ∗)(A.1)

The time domain corresponding function F (t) is given by:

F (t) = QR·[A · e−

t−t0τ1r +B · e−

t−t0τ2r + (C · sin (ω0(t− t0)) +D · cos (ω0(t− t0))) · e−

t−t0τs

](A.2)

where: τs = |θ|2

(θ)

ω0 = (θ)|θ|2

while the expressions for A,B,C,D are:

A =(1+τ2

s ω20)τ2

1r

(τ1r−τ2r)·[(τs−τ1r)2+(ω0τsτ1r)2]

B =(1+τ2

s ω20)τ2

2r

(τ2r−τ1r)·[(τs−τ2r)2+(ω0τsτ2r)2]

C =(1+τ2

s ω20)·[τ1rτ2r(1−τ2

s ω20)+τs(τ1r+τ2r−τs)]

ω0·[(τs−τ1r)2+(ω0τsτ1r)2]·[(τs−τ2r)2+(ω0τsτ2r)2]

D =(1+τ2

s ω20)τs(2τ1rτ2r−τ2rτs−τ1rτs)

[(τs−τ1r)2+(ω0τsτ1r)2]·[(τs−τ2r)2+(ω0τsτ2r)2]

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VSHA (V) τ1r (ns) τ2r (ns) τs (ns) 1/ω0 (ns) t0 (ns) QR

2.00 31.8± 1.2 31.8± 1.2 21.0± 0.6 14.9± 0.3 3.3± 0.3 9349

-0.20 23.4± 2.5 871.1± 155.2 21.8± 2.0 13.6± 0.4 2.9± 0.6 144760

Table A.1: Numerical results for the free parameters of Eq. A.2 fitted to Florence data.

The parameters τ1r, τ2r, τs, ω0, the amplitude coefficient QR and a delay time t0 are let as free

parameters during the fit procedure. The fit results are shown in Fig. 4.9 for two different shaper

time constants. The numerical results for the correspondent free parameters are summarized in

Table A.1.

It is worth noting that the VSHA register mainly affects just one pole (the real τ2). Thus

the shaper feedback resistance change, operated by VSHA, is responsible of the pulse shape by

moving one real pole of the transfer function.

II method

The single channel APV6 simplified equivalent circuit is is shown in Fig. A.1.

The pre-amplifier and the shaper circuit are both based on a “cascode” (Fig. A.1(b)) with

the feedback capacitor Cf = 0.25 pF. The “cascode” output is followed by a source follower

and fed back to the input through the transistor resistance adjustable by means of the VPRE and

VSHA registers. Cx is the first transistor input gate capacitance, plus, for the pre-amplifier, the

detector capacitance if present; G,Cd and Rd are the transconductance, drain capacitance and

resistance of the common-source input transistor of the cascode [47].

The cascode with feedback can be sketched as an ideal amplifier A with input impedance

ZA:

A =

(−G +

1

Zf

)· ZdZf

Zd + Zf

ZA =Zx · (Zf + Zd)

Zf + Zd + Zx +GZxZd

where Zx =1

jωCx, Zf =

1jωCf

, Zd =Rd

1+jωCdRd.

The final model is reported in Fig. A.1(c) where RB is the source follower resistance, Rfpa

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Cf

Cx Cd Rd

VoVi

ViG

Vi Vo

ZA

A

ZAshZApa Cspa

Cssh

Rfpa RfshCc

V

Vpbp

Vpcasc

Vpbn

M_p_pinp3000/1.4

M_p_pis150/10

Cfp .25p

M_n_pfb2.4/60

M_n_pcasc400/1.2

M_n_pis2330/10

M_n_psf400/1.2

M_n_pis3200/10

Vpsfb

Vsbp

Vscasc

Vsbn

M_p_sinp800/1.4

M_p_sis150/10

Cfs .25p

M_n_sfb2.4/60

M_n_scasc400/1.2

M_n_sis2100/10

M_n_ssf400/1.2

M_n_sis3200/10

Vssfb

VPRE

VSHA

Cc1.8p

Vsbp

Vscasc

Vsbn

M_p_sinp800/1.4

M_p_sis150/10

Cfs .25p

M_n_sfb2.4/60

M_n_scasc400/1.2

M_n_sis2100/10

M_n_ssf400/1.2

M_n_sis3200/10

Vssfb

i

(a)

paApa Vi shAsh

Vout

δ(t)QIs = RBRB

Voutpa

Vi pa Vi sh(c)

(b)

Figure A.1: Single channel APV6 circuit model.

and Rfsh are the feedback resistances driven by VPRE and VSHA registers, CSpa and CSsh

are the capacitances on pre-amplifier and shaper outputs. The transfer function is analytically

calculated as in the following:

F (ω) =Vout

Is(A.3)

=ZAshZLsh(RB + AshRfsh)(Rfsh + ZAsh) · T 2

pa

ZApaZLpa(ZcZAsh + ZcRfsh + ZAshRfsh)(RB + ApaRfpa) + Z2Ash

ZLsh(RB + AshRfsh)Tpa

(A.4)

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ZINsh = Zc +ZAsh

ZAsh + Rfsh

·(Rfsh +

ZAshZLsh(RB + AshRfsh)

(Rfsh + ZAsh)(RB + ZLsh) + ZLsh(RB −AshZAsh)

)

ZLpa = ZINsh//CSpa =ZINsh

1 + jωZINshCSpa

Tpa =Vpa

out

Is=

ZApaZLpa(RB + ApaRfpa)

(Rfpa + ZApa)(RB + ZLpa) + ZLpa(RB −ApaZApa)

Zc =1

jωCc

ZLsh =1

jωCSsh

In a more compact form F (ω) can be expressed as:

F (ω) Rfsh · jωRfpaCc · (1− jωτ0)

1 + jωa− ω2b− jω3c+ ω4d+ jω5e+ ω6f(A.5)

where a, b, c, d, e, f are function of the circuit elements.

The transfer function has an amplitude proportional to Rfsh and this means that is strictly

dependent on the VSHA register, as we expected. The transfer function shows six poles and

two zeros which, after a double pole-zero cancellation, even if not exact, is compatible with the

four poles transfer function obtained with the phenomenological approach.

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Appendix B

The effect of deconvolution on noise

The evaluation of noise after the deconvolution operation is important for detectors equipped

with APV6 chips since they will run, during the LHC high luminosity phase, with this oper-

ational mode. The noise treatment must, in our case, deal with a system that is based on the

sampling of a continuous waveform.

In general the deconvoluted signal at some arbitrary time, in the presence of noise alone, is

given by:

sk =∑i

wivk−i+1 (B.1)

where vi are the noise output voltages and wi the weights. Both sk and vi have a mean

expectation value equal to zero.

The noise is defined as the variance of sk, which is:

σ2(sk) =<∑ij

wivk−i+1wjvk−j+1 > (B.2)

The rms noise after shaping can be considered as the sum of two components, σp and σs, repre-

senting parallel and series noise at the amplifier input [55] [56]. This can be written as:

σ2tot = α

∫ ∞

−∞[h(t)]2dt+ β

∫ ∞

−∞[h′(t)]2dt = σ2

p + σ2s (B.3)

where h(t) is the response to a charge pulse and α and β are coefficients which depend on the

details of the noise sources. Since they are uncorrelated we can treat the two contributions to

the noise separately; for the CR-RC filter they can be written as:

σ2(s) = (w21 + w2

2 + w23)σ

2 + 2w1w2C(∆T ) + 2w2w3C(∆T ) + 2w1w3C(2∆T ) (B.4)

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where ∆T is the sampling interval and the functions C(∆T ) give the average correlation be-

tween a measurement at some time and another delayed by ∆T ; C(0) = σ2. For the CR-RC

shaper these functions can be calculated and turn out to be:

C(x) = σ2p(1 + x)e−x (B.5)

for the parallel noise and

C(x) = σ2s(1− x)e−x (B.6)

for the series noise, with x = ∆Tτ

ratio of the sampling interval to amplifier time constant. For

large values of x, or samples well separated in time, C(x) → 0, meaning no correlation present,

while for x→ 0, C(x) → σ2, meaning complete correlation.

The two components of the noise after deconvolution can be expressed, after some algebra,

as:

σ2p(s) = (σ2

pe−2/x2)[e2x − 4x− e−2x] (B.7)

σ2s(s) = (σ2

se−2/x2)[e2x + 4x− e−2x]

In our case, in which x=0.5, it turns out:

σp(s) ≈ 0.45σp (B.8)

σs(s) ≈ 1.45σs

We can observe that the deconvolution method decrease the parallel noise while series noise

increases, according to the fact that the operation is equivalent to using a filter with a shorter

time constant. It can be demonstrated that using a CR-RC filter with a shorter time constant τ ′

the consequences for the parallel and series noise are:

σ2p(s) = σ2

py (B.9)

σ2s(s) = σ2

s/y (B.10)

where y = τ ′τ

. In our case the deconvolution actually reduces parallel noise more than re-

shaping with a similar ratio of time constant, while the series noise is increased a slightly more.

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Thus provided that the series noise of the system is sufficiently low, the deconvolution method

offers greater immunity to increased parallel noise from radiation induced leakage currents dur-

ing LHC operations.

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Appendix C

The Sequencer schematic

The layout of the Sequencer described in section 5.3 and developped in the framework of this

thesis is shown in Fig. ??.

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AcknowledgementsSincere thanks to all members of the CMS Florence group for their advice, support and spur

to carry on with this work. In particular I’m in debt with Carlo, who has spent several Christ-

mastime days in helping me to write the thesis, and with Dr.Marco Meschini, Dr.Raffaello

D’Alessandro, Dr.Alessandro Buffini, for the encouragement and suggestions. I’m also very

grateful to Prof. Anna Cartacci for the continuously shown kindness and to Prof. Giuliano

Parrini for the helpful comments and for the constant presence. Last, but not the least, I wish to

thank the BAR managers and Mrs Gabriella and Mrs Guglielma that make people to be like one

of the family.

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