Part 2i State of the Art

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    Overview of Part 2

    Properties of Silicon

    Structure

    Doping

    Overview of the Fabrication of a Silicon Based Device

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    Silicon is a crystalline

    material,

    Properties of Silicon Semiconductor

    with a tetra-

    hedral unit cell.

    Silicon has two types of charge carriers - electrons and holes. The

    carrier concentration can be controlled by doping, or

    electrostatically.

    Each silicon atom has 10

    core electrons (tightly

    bound), and 4 valence

    electrons (loosely bound).

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    Properties of Silicon Semiconductor

    For simplicity we can consider a flattened model structure

    At room temperature there are ~1 x 1010cm-3 free carriers (out of ~2

    x 1023 cm-3)

    Holes and electrons can

    move around the lattice, or

    recombine to form acomplete bond.

    Due to thermal effects some

    bonds are broken, givingmobile holes andelectrons.

    + -

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    Properties of Silicon Semiconductor

    Donor dopants increase the number of conduction electrons

    A donor atom, such as

    phosphorus, has five

    valence electrons, four ofwhich participate in

    bonding, leaving one extra

    electron that is easily

    released for conduction.

    The donor

    site becomes positively charged (fixed charge).

    Silicon doped with a donor is called n-type.

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    Properties of Silicon Semiconductor

    Acceptor dopants increase the number of holes in the lattice

    Silicon doped with an acceptor is called p-type.

    An acceptor atom, such as

    boron, has three valenceelectrons, and can therefore

    easily accept an electron

    from a neighbour, leaving a

    free hole. The dopant has a

    fixed negative charge.

    B-

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    Properties of Silicon Semiconductor

    Overall doping depends on the relative number of acceptors and

    donors.

    Silicon doped with donor andacceptor atoms is called

    Counter Doped, and can

    have multiple separate

    regions of n- and p-typeconductivity

    B- B-

    P+

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    Properties of Silicon Semiconductor

    The carriers distribution is also affected by electric fields

    Between collisions with the

    lattice the carriers are

    accelerated in the directionof the electrostatic field.

    B-

    E

    Combining the effects of doping and fields on the carrier concentration

    and distribution, we can realise useful devices.

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    Fabrication of a Device (MOSFET)

    Silicon devices are built up in a series of layers, using processes

    such as photo-lithography, etching and doping.

    Oxide layer is grown on n-type silicon by heating to around

    1000C in oxygen or steam.

    A light sensitive resist is coated on the Si, and exposed to a

    light pattern. The exposed resist is developed in a solvent

    The unexposed areas of resist are used as a mask to protect

    areas of the wafer from plasma etching, dopant implantation,

    or metal coating.

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    Fabrication of a Device (MOSFET)

    B+ B+ B+ B+ B+ B+ B+ B+ B+ B+

    A Metal-Oxide-Semiconductor Field Effect Transistor is a fairly simpledevice, but still requires four separate lithography steps. The lithographic

    step is probably the most important in microfabrication. Modern chips

    frequently require 30 to 50 layers (each with multiple process steps)

    Gate MetalContact

    SiliconOxide

    Silicon

    Doped

    Silicon

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    Fabrication of a Device (MOSFET)

    Silicon devices are built up in

    a series of layers, using

    processes such as photo-

    lithography, etching and

    doping.

    An oxide layer is grown on n-

    type silicon by heating to

    around 1000C in oxygen or

    steam.

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    Fabrication of a Device (MOSFET)

    Light sensitive material, known

    as resist, is spin coated onto

    the surface

    Light is projected through a patterned mask onto the

    resist.

    A developing solvent is then

    used to remove the exposedresist.

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    Fabrication of a Device (MOSFET)

    The sample is etched with

    plasma or acids to remove the

    exposed oxide.

    A 50 nm Gate Oxide layer isthermally grown.

    The resist pattern is removed with

    chemical stripper or oxygen

    plasma

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    Fabrication of a Device (MOSFET)

    A 50 nm layer ofpoly-silicon is

    made by chemical vapour

    deposition.

    Another resist pattern isdefined, and developed.

    The pattern is transferred

    through both the poly-silicon

    and the gate oxide by etching,

    and the resist is stripped.

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    Fabrication of a Device (MOSFET)

    Boron dopant atoms are ion

    implanted,B+ B+ B+ B+ B+ B+ B+ B+ B+ B+

    and then driven

    in by heating to 950C in oxygen

    Yet another photolitho-graphy,

    etch and resist strip step is

    used, to create contact cuts in

    the oxide layer

    Contact Cuts

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    Fabrication of a Device (MOSFET)

    B+ B+ B+ B+ B+ B+ B+ B+ B+ B+Aluminium is evaporated on to

    the surface.

    And one last patterning, and

    etching step to afford aMOSFET (metal-oxide-

    semiconductor field effect

    transistor)

    It took four separate lithography steps to realise this fairly simpledevice. The lithographic step is probably the most important in

    microfabrication. Modern chips frequently require 30 to 50 layers

    (each with multiple process steps)