OPen collector and tri state gate

8/13/2019 OPen collector and tri state gate

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Chapter 8

O.C., O.D. AND

TRISTATE GATES


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Ch08L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006

Outline

Open Collector gate circuit Open Collector gate features

Open Collector gate applications


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Internal Active pull up in TTL NAND Circuit withNPN Transistor

V-EE

ActivePull up

+5V

R

V+CC

VCE

Logic 1 or 0A

TNext

stages

TTL

inputsT

F

Rc

RET

T


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Open Collector TTL NAND Circuit with provision

for external active or passive pull up to V+high

V-EE

ExternalPull up

+5V

R

V+high

VCE

Logic 1 or 0

Next

stages

TTL

inputsT

F

Rc

RET


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Output Stage Voltage pull up for outputstate 1

External passive or active resistor circuit Active device is preferred in place of pull

up resistances like Rp

in order to reduce

power dissipation because a resistive

element causes Joule loss

Pull up increases the loading and thusfan-out


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Outline




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Open Collector Gate Features

Ability to work at Voltage levels of V

p, which is greater than 5V in theTTL gates.

Voltages of operations can be as perneed, for example, 12V.

Rp

>> Vp/ (Maximum I

OL) so that

T does not draw an excessivecurrent. Maximum IOL

= Maximumpermissible i

sinkcurrent through T.


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Both isource

and isink

controlled externally.

Fan-out to the connected stages as perrequirement.

10000 A i.e. 10 mA through an LEDwhatever may be the co gate TTL family

A higher power LED also by keeping Vp

= 12V and choosing Rp appropriately .


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Increased noise margins for 0 and 1

A higher gate speed if a reduced Rp(active resistor) compared to one

internally used 4k in 74 or 74 LSfamilies


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interconnect output of the various

gates through a common line by aspecial circuit called wired OR

circuit.


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Outline




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Open Collector TTL NAND Circuit with provision

for external active or passive pull upthrough LED and 330 to V+CC

V-EE

External

Pull up

+5V

R

V+cc

VCE

330

T

F

Rled

RET


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Teletype loop

Let Vp

up to +12V and keep Rp above 200

Ohm. Let us look at the application of this.If V

p= 5V and R

p= 250 Ohm, then a 20mA

can source from such an arrangement to an

O.C. gate. In Teletype current loop baseddigital whereby 16mA to 20 mA is treated

as logic '1'. If Vp

= 12V, we can also treat

state '1' for V ~ of 12V instead.


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Driving dc Motor

Let Vp

up to +12V and keep Rp above 2000

Ohm. Let us look at the application of this.

If Vp

= 5V and Rp

= 2500 Ohm, then a 2

mA can source from such an arrangement to

an O.C. gate. If the output F connects a

power transistor, in which collector current

drives a motor, then OC gate can be used todrive the motor.


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Summary


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O.C. gate TTL circuit has externalactive or passive pull up

O.C. gate used for the increased fan-out, higher voltage, current operations

and lower propagation delay


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End of Lesson 1 on

OPEN COLLECTOR

GATE


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Thank you

OPen collector and tri state gate

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