OPAL-RT RT14 Conference: Three level inverter SynRM drive

The 7th International Conferenceon Real-Time Simulation TechnologiesMontreal | 9-12 June, 2014

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Lesedi MasisiSupervisors: Prof P. Pillay and S.S Williamson

Power and Energy Research Group, Concordia University

[email protected]

Three Level Inverter Synchronous Reluctance Machine (SynRM) Drive


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• Introduction• Research area and motivation

• Research goal and objectives

• Three level inverter

• SynRM drive

Outline


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• Fluctuating prices of rare earth permanent magnets• Used in permanent magnet synchronous machine (PMSM)

• PMs predominantly in China

• Control strategy of a SynRM is similar to that of a PMSM

• More mechanically robust than PMSM and induction machines (IM)• Can reach higher speeds

• Easier to cool

Why synchronous reluctance machine?


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Challenges of a SynRM

• Low saliency

• Poor power factor

• Short constant power region

• Higher torque ripples


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• Increasing demand for better vehicle performance• Higher dc bus voltage demand

• Demand for higher converter switching frequency

• Compared to a 2-level inverter• Lower dv/dt (total harmonic distortion)

• Lower torque ripple

• Lower switching losses

• Less burden on the cooling system

Why a three level inverter ?


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• Maintaining a balanced neutral point voltage• Balanced dc bus capacitors

• Suppressing the neutral point ripple voltage• Affects the switch power ratings

Challenges of a three level inverter


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Balancing algorithm using SVM: 3LVSI


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Balancing algorithm using SVM: 3-level inverter

SV (100)

SV (0-1-1)


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New Balancing Algorithm Scheme

Switching sequence


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• Neutral point voltage ripple [1]• Power factor

• Modulation index

• RMS output inverter current

• Inverter fundamental frequency

• DC capacitor

• Capacitor sizing• Machine saliency

3LVSI: DC capacitor sizing

[1] J. Pou, R. Pindado, D. Boroyevich, and P. Rodriguez, “Evaluation of the low-frequency neutral-point voltage oscillations in the three-level

inverter,” Industrial Electronics, IEEE Transactions on, vol. 52, no. 6, pp. 1582–1588, 2005.


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3LVSI: DC capacitor sizing using saliency

Motor phasor diagram [2]Where k is the saliency ratio

[2] T. Matsuo and T. Lipo, “Rotor design optimization of synchronous reluctance machine,” Energy Conversion, IEEE Transactions on, vol. 9,

no. 2, pp. 359–365, 1994.


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3LVSI: DC capacitor sizing using saliencyNeutral point voltage ripple (Normalized)


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Vector control of SynRM


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Prototype SynRM

Stator housing Rotor Rotor with shaft


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Prototype 3LVSI

• IGBTs• 600 V

• 100 A

• Universal gate drivers• Powerex (BG2B)

• Dead time IC• 6 inputs (6-

complements)


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Experimental Set-up• Sampling time

• 20 us

• Dc bus• 250 V

• 13 Analog signals• 6-outputs

• 7-inputs

• Computational time• < 10 us


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3LVSI: DC capacitor sizing using saliency

Neutral point voltage @ mi=0.85(average) with 490uF capacitorTheoretical neutral point voltage:

• Ignored motor resistance (accuracy will improve for bigger machines ) • Experimental errors• Maximum torque/amps closest to the maximum power factor point

Measured neutral point voltage:

= 47.8 V


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SynRM Electric Drive: 2/3 LVSI resultsTwo level inverter Three level inverter


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@ a modulation index of 0.45

@ a modulation index of 0.85

Simple 2-Pole SynRM

SynRM Electric Drive: 2/3 LVSI results


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• Conducted for the first time 3LVSI SynRM drive

• Demonstrated a new balancing algorithm based on SVM

• The use of machine saliency to size the dc link capacitors

• The three level inverter promises lower core losses

Conclusion


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Questions ?

Thank you!

OPAL-RT RT14 Conference: Three level inverter SynRM drive

Technology

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