On-Board Data Handling for the PAMELA Experiment

Ralf WischnewskiRoma2 & DESY-Zeuthen

Alghero, 30.9.2002

R.Wischnewski

The task

Space requirements

Pamela CPU: PSCU

On-board DAQ design

Data downlink

Status & Summary

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TRDTRD

TRD

• e±,p threshold detector.

• 9 radiator planes (Cfibres) + straws tubes (Xe/CO2).

• Separazione 102 e/p (E > 1GeV/c).

TRKTRK Si Tracker + Magnet

• PermantMagnet B=0.4T

• 6 Si-planes (x & y)

• Spatial resolution ~3m MDR = 740 GeV/c

TOFTOF

Time-of-flight system

• Trigger (Level-1)

• TOF particle identification (< 1 GeV/c)

• dE/dx

• Plastic Scintillators + PMT

• Time resolution ~70ps

CALOCALO

Si-W Calorimetro

• Imagining Calorimeter (e/p)

• Resolution for e±

E/E = 15% / E1/2

• 22 planes Si-X / W / Si-Y

16 X0 / 0.6 0

ANTIANTIAnticoincidence

• Plastic scintillators + PMT

•TrackerAccept.+BGSuppres.

NDND

Neutron detector

• Energy range extention to 10 TeV (e and p)

• 36 3He counters in a polyethylen moderator

The INSTRUMENT

PSCUPSCU

Pamela CPU

R.Wischnewski

• Trigger rate: 1 Hz – few 10 Hz • Event size: ~ 5 Kbyte/event• Dead time ~10% i.e. EvtR/O to CPU-MM ~ 10 ms.

Science Data Acquisition

The Tasks (1)

• Real-time response to S/C Telemetry requests• Quasi-autonomous experiment-control: Run / Calib / SetupChanges • Pamela Status Verification and Emergency / Error Response• Logging and optional extended debugging • On-Orit Debug of Soft/Hardware with uplink comands <1 kB/day needs a highly debugged & automatized system

Experiment Slow Control & Quality Monitoring

R.Wischnewski

The Tasks (2)

• Space Qualified Systems: - Radiation hardness (SEU, Latchup) - Mechanical stability (vibration & shock) - Thermal stability • Limited: Power consumption, Mass & Volume• Interface to Satellite CPU • Extended error detection • High redundancy design & ground-test Telemetry (downlink/uplink)

Space Requirements

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DC/DC

HK U CP U

M e mM o d 's

P IF

TM TC MIL

STD

15

53

Bu

s

Even

t Tr

igg

er I

nt

DAQ CM D

Sys-B u s

R -B u sW -B u s

32

32

ONC m d

OFFC m d

Pr im ar yPo w e r Bu s

TAM

P C M C I A B u s

SCU

CPU (ERC32 SPARC V7) 17 Mips @ 24MHz

SRAM 4 Mbyte

Boot PROM

EEPROM 1 Mbyte

1553 Remote Terminal to Satellite CPU

64 Kb x 16 RAM buffer

Logic ASIC which include PCMCIA

bus controller & Parallel System Bus

Solid State Mass Memory: 2 + 2 Gbytes

Pamela Interface (PIF): DMA bus controller and TAM interface

Telemetry & Housekeeping board: 32 outputs + 78 inputs

DC/DC converter integrato da 27 V a 14.4 V + 5.2 V

Quartz clock ± 1 ms

PAMELA STORAGE AND CONTROL UNIT

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PAMELA DAQ – Schematics

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Dete

ctor s

Trigger

CPU

PIF

MassMem

TMTC

FrontEnd

R/O Compress

IDAQMPX,Level-2 Trg

PSCU

16 x Error

Data,Status

CMD,SetupCMD,Setup

Data,Status

PAMELA DAQ – Schematics

Spacecraft

Data

MKCMD, TeleM

CPU

MassMem>100GB

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Data Downlink to S/C and Earth

Science and HK data (1-2 GB) to be transfered from Pamela to Satellite MassMemory (>100GB) every few hours.Asynchronous request from Master S/C-CPU.

Downlink from S/C to earth during ground station passages (Moscow & Sturup/Sweden) @ 320Mbps over a few minutes.Needs fast analysis for uplink response on next orbit.

All operations based on pre-defined absolute time schedule, arbited from S/C and uplinked from Ground.

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Satellite dish

Temp Download storage

PAMELASCU

PAM-RL

OB-VRL

Satellite attitude control(not in NTSOMZ)

RF

Uni

t AR

F U

nit B

FR

AM

E R

EM

OV

ER

AF

RA

ME

RE

MO

VE

R B

DLT 80 TAPE DRIVE

Pamela Data Path:S/C to Ground

MM S/C

DLink S/C

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The PSCU is constructed in 2 phases by LABEN/Milano:

1. Engineering Model (EM), currently under full test @ INFN

2. Flight Model (FM), under construction @ LABEN

PSCU – Engineering Model

RAM (2x2 GB)

CPU, PIF, TMTC

DCDC

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Assembly of the Engineering Model (EM) is the major functionality and I/F test to be passed before the final Flight Model (FM) is build:

System compability test;

Mechan. & electr. interface test;

Test procedure definiton for ground test equipment (EGSE).

PAMELA ENGINEERING MODEL

Note: The PSCU is (with Power Supply) the main Interface between Pamela and the Satllite.

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PSCU-EM Tests

Basic functionality test:

Trigger rate 80 Hz

1/10 evts transfered to CPU-RAM to simulate sampled event analysis

Telecomand communication (1553 Bus)

Write to PSCU MassMemory and download via TAM

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PSCU TEST EQUIPMENT

Full functionality test of PSCU needs an “Electrical Ground Support Equipment” (EGSE),simulating all system interfaces:

power supply (27 V) Control Command (ON/OFF, RESET) bus 1553 for telecomands telemetry I-DAQ board to receive FE Comands and

reply detector data in real time monitor for PSCU electrical/thermal status debugger and monitoring SW simulator for Housekeeping input event trigger simulation science data readout (TAM)

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PSCUEM

Cable 20 to J07

Cable 1Cable 2Cable 3

Cable 7Cable 8

Cable 9 - monitors

1553 BC Simulator

PC1

IDAQ SimulatorTAM Simulator

PC2

Terminal/debugger

PC3

MonitorsControl Commands

Stimuli

PC4

ELCUS 1553 BOARD

Cable 6

Adapter RS422

Cable 4Cable 5

Cable 10 - triggerCable 11 - ML & SER

RS422/LVDS line adapter

Cable 12 - trigger

Cable 13 - NIDAQ

NIDAQ Patch Panel

Cable 14 - CC MCable 15 - CC R

CC Driver Box

Cable 19

Cable 16 ANA StimuliCable 17 Dig Stimuli

Cable 18 CC for users

PS 2+ 27 V Power supply

Cable P1

PS1+ 3.3 V Power supply

Cable P4

PS3+ 5 V Power supply

PS4+ 5 V Power supply

Cable P2

Cable P3

Adapter Box 1

PS5+ 27 V 16 A Power supply

Cable P5

NI 6025E PCI

PSCU TEST EQUIPMENT @ ROMA

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PSCU - ON-BOARD SOFTWARERTEMS as Operation System: (Real-Time Executive for Multiprocessor systems)

multitasking preemptive or monotonic scheduling comunication zone and intertask synchronisation interrupt handling optional: task & interrupt priority dynamic memory allocation

RTEMS is supported by ESA/ESTEC including Cross Compiler ERC32CC with:

GNU C compiler Linker, assembler, archiver etc. Standalone C-library RTEMS real-time kernel with ERC32 BSP ERC32 boot-prom utility Standalone simulator ERC32 GNU debugger with ERC32 simulator & DDD

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System Idle

Calibration

Fullacquisition

Housekeeping

Systemconfiguration

Debug

Telemetry

Rate Metermode

Belts mode

TMTC1553

Overview of Pamela main functional modes and parallel system tasks.Telecomands from S/C Master CPU switch between operation modes. Automatic-mode change is under implementation.TMTC-Housekeeping, S/C 1553 I/F, Logging, Error check and General Interrupt handling tasks are permanentely active.

Main Functional Modes and Tasks

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Science data event managment chart

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e @ 20-300 GeVp @ 300-350 GeV

BEAM TEST @ CERN SPS 5-12/06/2002

PSCU Buffers are optimized for event size < 16 kB.

Tracker data size (compressed).

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Second Level Trigger

Trigger on IDAQ-Board Fast DSP-rejection algorithm for Background events, w/o PSCU. Using: AntiCoincidence – Veto. But: signal rejection by back- scattering from calorimeter.Calorimeter - particle classification (non-interacting, hadronic, em).TOF - n° of hits per planeTRACKER - n° of clusters, no online reconstruction.

Verification with SPS/PS test beam data (2002).

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Next steps:

• DAQ / FE-board system test with & S/C-Simulator in Rome (12/2002)

• Deliver Pamela-EM to Russia for S/C EM test (1/2003)

• Integration of Pamela FM with FM-PSCU, physics test, delivery to Russia (5/2003).

PAMELA DAQ - Summary

Most components of the Pamela DAQ and Slow Control are ready for system test.

CPU-EM in full test @ INFN; CPU-FM in production @Laben

Finalization of Pamela Slow & Autonomous Control Procedures