27th February 2007Page 1

On-Board Calibration System for the Range Delay of the

BepiColombo KaT

G.Boscagli (ESA-ESTEC) M.Mascarello (AAS-I)27th February 2007

MORE Team Meeting

27th February 2007Page 2

Introduction for BepiColombo KaT On-board Calibration

(for Ranging Delay)

27th February 2007Page 3

Approach for On-Board Calibration

The approach hereafter preliminary analysed is based on the idea of implementing this function directly inside the KaT unit:

Target Calibration as KaT Internal Unit Function

The idea is to include inside the KaT unit both the SSPA and the Diplexer function.In general more compact solutions improve S/C design (mass, interfaces routing, etc); it is believed that also calibration performances should be improved following this approach.

NOTE – In this way the calibration doesn’t take into account the wave-guides (from-to-antenna) and the antenna itself. They are outside the calibration loop. Which is the contribution of wave-guides and antenna in the overall end-to-end ranging budget error? At present it is understood that the main effect to be considered is related to the input/output mismatching variation due to temperature variation. This might cause multi-path effects and error in the end-to-end ranging measurements.

27th February 2007Page 4

Approach for On-Board Calibration

For this reason (Calibration as an internal KaT function) the KaT unit must be commanded (by the on-board computer) in two different modes:

Nominal Mode: RF link via antenna, unit in coherent mode (down-link coherent with the uplink both for carrier and ranging signal) when RX in Tracking Mode.

Calibration Mode: RX and TX in Loop-back Configuration, unit running with the internal oscillator, RX coherent (in tracking) with the loop-back signal from the TX

The approach hereafter proposed is based on the use of PN regenerative ranging, the reasons are:

The use of this ranging scheme simplifies the calibration scheme in particular for the ambiguity resolution (when compared with other approaches as the ESA STD or the NASA Tone Ranging).

Note - The ambiguity must be solved since the KaT loop-back delay (TX-RX) is expected of the order of microseconds, while the WBRS band should be in the range 5-20 MHz. This comment might not be valid anymore in case the group delay variation (versus environmental conditions and including aging) is inside the WBRS ambiguity resolution. This is difficult to be predicted at this stage.

The PN regenerative ranging is already implemented inside the BepiColombo X/X/Ka Deep Space Transponder, so it can be easily re-used for the KaT unit simplifying the multi-frequency operation as needed by BepiColombo for plasma cancellation.

27th February 2007Page 5

Impact of Calibration on BepiColombo KaT Front-End

Architecture

NOTE: this section has been written without considering the current subsystem architecture

27th February 2007Page 6

Impact of Calibration on KaT Front-End Architecture

RF Budget

TX 2 W 33.01 dBm

TX coupler 30 dB 3.01 dBm

Attenuator- T1 30 dB -26.99 dBm

Passive Mixer 10 dB -36.99 dBm

Attenuator- T2 60 dB -96.99 dBm

RX coupler 50 dB -146.99 dBm

Preliminary RF Power Budget (TX Filter neglected)

T2 is indicated as variable attenuator, it might be commanded for selecting the proper RF power (at RX input) for calibration: minimum value around -146 dBm (nominal value around -125 dBm, TBC) .

34 GHz

AmplifierTX Filter

T1

X

T2

To Ant LO @ 2 GHz

32 GHz

RX Filter

2 Watt SSPA

LNA

TX coupler

RX coupler

Amplifier Gain Control (TBC)

Loop-Back Path

27th February 2007Page 7

Impact of Calibration on KaT Front-End Architecture

According to the proposed approach, the new circuits/functions to be developed are:The functions in the light-blue boxes: 2 GHz LO, T1, T2,

MixerThe functions in the light-green boxes: TX coupler, RX coupler

NOTE - The functions indicated in the light-red boxes represent the Diplexer and they are present in any case. In the current subsystem baseline (see dedicated slides by AAS-I on this issue), the Diplexer is indicated as external to the KaT; the advantage of having it integrated inside the KaT unit is clear from a calibration point of view and for a more compact solution.

According to the architecture as proposed in the previous slide, when in calibration mode the loop-back signal is routed back from the TX to the RX side and to the antenna as well.

NOTE – It might be useful (TBC) to introduce the control of the TX Power (2 Watt SSPA) to minimise the TX power via antenna when in calibration mode;question: is the SSPA delay dependant on the selected Gain/Output-Power?

27th February 2007Page 8

Impact of Calibration on KaT Frequency Plan

The KaT frequency plan must be carefully studied in order to simplify the generation of the 2 GHz LO signal and to avoid internal RFI issues.

NOTE - For instance considering the Cassini KaT frequency plan (next slide) we observe that the 1st IF chain is almost at the same frequency of the LO signal for calibration.

The Cassini KaT turn-around ratio (next slide) is not included in the current CCSDS/ECSS recommendations for TT&C applications. The values from the current ECSS-E-50-05B (Radio Frequency and Modulation, draft issue under public review) are:

The Ka/Ka turn-around ratio values are under discussion also in the frame of CCSDS, at present the draft recommendation (January 2007) is to use 3599/3344 and 3599/3360

27th February 2007Page 9

Front-End

X

1st IF

AGC LOOP

x3& Filter

294F

294Fto external amplifier

SPLLx49

98F

2F

21F F

x2

X

x4

F

4F

HPLLx5

20F

VCXO

X X

LoopFilter

LockDetector

Lock Status

Q-branchI-branch

90°

315F

Ka-Band input

Ka-Band output

2nd IF

XTAL Filter

0°

A

FILTER

AGCDETECTOR

F 109 MHz

Turn-around ratio = 294/315 = 14/15

Preselector L.N.A. & Filter Bw = 80 MHz Bw =2 MHz Bw = 15 KHz

(TWTA)

Cassini KaT Frequency Plan

27th February 2007Page 10

CURRENT COMMUNICATIONS SUBSYSTEM BASELINE

(from BepiColombo SRR Data Package)

This section has been provided by AAS-I (Marco Mascarello)

Question: Are there any difficulties (due to on-board baseline architecture) for implementing the above proposed approach for calibration?

27th February 2007Page 11

Communications Subsystem Current baseline

27th February 2007Page 12

Communications Subsystem (Option KaT Amplifier)

27th February 2007Page 13

KaT on board calibration including Triplexer

Including a Triplexer inside the KaT, it would be possible to calibrate all the paths till the antenna interface.

34 GHz

AmplifierTX Filter

T1

XT2

To AntLO @ 2 GHz

32 GHz

RX Filter

2 Watt SSPA

LNA

circulator

coupler

Ka TRIPLEXERKaT assembly

From Ka-Band TWTA (X/X/Ka DST)

27th February 2007Page 14

Triplexer (from current BepiColombo SRR Data Package)

The Ka-Band Triplexer is a 4 port device in charge of splitting input and output signals. It will consist of a new development for BepiColombo based on existing technology.

The splitting will be accomplished by an E-plane trifurcation. Each sub-band will be selected by an H plane filter. The foreseen useful bandwidth of the filters will be the following:

Rx Filter : 50 MHz (TBC) within 34 200 to 34 700 MHz Tx1 Filter : 200 MHz (TBC) within 31 800 to 32 300 MHz Tx2 Filter : 50 MHz within (TBC) 31 800 to 32 300 MHz

As for the X-Band diplexer, the mechanical concept will be two symmetrical pieces. Interfaces will be standard WR28 waveguide flanges. The estimated dimensions for the assembly are 75 x 45 x 23.1 mm, while the estimated maximum mass should be less than 65 g.

27th February 2007Page 15

Concern

The above solution based on the Triplxer inside the KaT unit shows an important drawback: The Ka-band DST signal is applied to the Antenna through the KaT unit.

This represents a blocking point !

Other solution must be addressed, for instance:1. Keeping the Triplexer external to the KaT unit

(calibration not anymore an internal KaT function).2. Analysing different mixing approach between DST

and KaT signals at HGA input.

27th February 2007Page 16

BepiColombo X/X/Ka DST PN Regenerative Ranging

1999 JPL

Balanced Weighted-Voting Tausworthe (v=2 and 4)

27th February 2007Page 17

Introduction to Pseudo Noise (PN) Ranging Sequence

• The term “Pseudo-Noise (PN) ranging” refers in a strict sense to the use of a ranging-sequence system in which the ranging sequence is a logical combination of the so-called range clock-sequence and several Pseudo-Noise (PN) sequences.

• The range clock sequence is the alternating +1 and –1 sequence of period 2 chips.

• A Pseudo-Noise (PN) sequence is a binary 1 sequence of period L whose periodic autocorrelation function has peak value +L and all (L–1) off-peak values equal to –1.

TC

(a) ranging–sequence waveform

(b) range–clock waveform

.Hz T

fC

RC 2

1

Range Clock Frequency =

27th February 2007Page 18

Example for the introduction of the Titsworth/Tausworthe generation scheme

As an example, considering the following component sequences of period 2, 3 and 5, respectively (the first period of each sequence is underlined):

Combined by majority logic give the following period-30 sequence:

Component Sequencesor

Probe Sequences PN Sequence

PN Sequence

Seq. Gen. # 1

Seq. Gen. # 2

Seq. Gen. # 3

Introduction to Pseudo Noise (PN) Ranging Sequence

27th February 2007Page 19

Note that the period T of the PN sequence obtained with the Tausworthe scheme is given by: with LCM = Least Common Multiple

mT,...,T,TLCMT 21

30 in the above example

The correlation of this sequence (considered as +/-1 sequence) with the component/probe sequences gives the following results:

Note that 2 + 3 + 5 = 10 operations of correlation are required instead of the 30 operations needed in the “classical” approach. In fact, only 9 decisions are required because of the antipodal result of the sequence of period-2 (the clock sequence). Only one of the two operation of correlation must be performed because the other correlation will be the negative of the other.

Importance of having prime length component sequences

Introduction to Pseudo Noise (PN) Ranging Sequence

Example for the introduction of the Titsworth/Tausworthe generation scheme

27th February 2007Page 20

The ranging sequence is acquired by the receiver as the result of correlations between the received sequence and certain ±1 periodic sequences (and their cyclic shifts) whose periods are divisors of the rangingsequence period and that we will refer to as probing sequences.

The probing sequences are related in some manner to the ranging sequence, e.g., the ranging sequence might be the sequence resulting from some sort of voting by the chips of all the probing sequences at the same chip time.

The probing sequences must have the property that when all these “in-phase” decisions are correctly made, then these decisions determine the delay (modulo the ranging sequence period L) in chips of the received ranging sequence relative to the corresponding model of the ranging sequence. The (one-way) ambiguity (U) due to the period of the ranging sequence in meters is

RCc f

LcTLcU

42

1

For example, with L = 1,009,470 chips and Hz, U 75,710,000 m or about 75,710 km.610RCf

Introduction to Pseudo Noise (PN) Ranging Sequence

= ranging clock frequency22

1 _ RateChip

cRC

f

Tf

RateChipf _ chip ratec = speed of the light

More in general we can state that:

27th February 2007Page 21

The 1999 JPL PN Ranging scheme (Tausworthe scheme)

The combining logic is based on the following rule: the ranging-sequence chip is a +1 if and only if either C1 has a +1 at that position or all five of the sequences C2, C3, C4, C5 and C6 have a +1 at that position, or both.

where the combining logic is 1 2 3 4 5 6C C C C C C C

Titsworth/Tausworthe generation scheme

C1, C2, … C6 are the so called Probing Sequences.

In literature this sequence can be indicated also as JPL 99 or Taus

27th February 2007Page 22

The 1999 JPL PN Ranging scheme (Tausworthe scheme)

It is obvious from this combinational rule that the range clock will be strongly correlated with the ranging sequence, which facilitates locking on to the range clock at the receiver.

Since the component sequences C2, C3, C4, C5 and C6 are all PN sequences with relatively prime periods 7, 11, 15, 19 and 23, respectively, the period of the 1999 JPL ranging sequence is L =2x7x11x15x19x23 = 1,009,470 chips.

The probing sequences in the 1999 JPL PN ranging-scheme are the range clock sequence together with the five component PN sequences.

The total number of correlation operations required for the probing sequences, excluding the range clock, is thus 7 + 11 + 15 + 19 + 23 = 75.

27th February 2007Page 23

The 1999 JPL PN Ranging scheme (Tausworthe scheme)

Correlation characteristics and spectrally relevant properties of the ranging sequence and probing sequences

The spectrum shows a powerful clock component at half the chip rate and below a noisy floor originating from the combination process with the other probing sequences. The fact the range clock is strongly correlated with the ranging sequence will facilitate locking on to the range clock at the receiver. The chip is square-wave shaped.

Residual carrier Mod index = 0.82 rad-pk

Clock Componentsat ±fRC

Chip Rate at ± fChip_Rate = 2.5 Mcps

27th February 2007Page 24

Weighted-Voting Tausworthe PN Ranging-Sequence Scheme

The Weighted-Voting Tausworthe sequences are derived from the 1999 JPL PN Ranging sequence with an apparently small modification on the vote logic. The selection of different value for the clock vote (v=2 or 4) provides:

flexibility in the choice of the strength of the range-clock component in the ranging sequence different level for the power allocated to the clock and the other ranging spectral components.

+1 1

+1 +1 +1 1 1 +1 1

+1 +1 +1 1 1 +1 1

+1

1 +1 +1 1

+1 +1 +1 1 1 +1 1 1 1 +1 +1 1 +1 1

+1 +1 +1 +1 1

+1 +1 +1 +1 1+1

+1 1 +1 1 1 +1 1 1 +1 1 +1 +1 1 1

+1 1 +1 +1 1 1 +1 +1 1 1 +1 1 +1 1 1 1 1Sel

ect c

hip

valu

e w

ith m

ost v

otes C1

C2

C3

C4

C5

C6

v

1

1

1

1

1

where the combining logic is 6

2

2 1i

C sign C Ci

v

27th February 2007Page 25

Balanced Weighted-Voting Tausworthe PN Ranging-Sequence Scheme

The Balanced Weighted-Voting Tausworthe sequences are derived from the Weighted-Voting Tausworthe sequences (scheme above) with an apparently small modification on the polarity of some probe sequences. As the 1999 JPL PN Ranging scheme (Tausworthe scheme) also the Weighted-Voting Tausworthe PN Ranging-Sequence Schemes (both for v=2 and 4) present a DC component.A simple way to reduce the imbalance in the ranging sequence (and to produce what we call the Balanced Weighted-Voting Tausworthe ranging-sequence scheme) is choosing the PN probing sequences with the following first periods:

C1 = +1 1 C2 = +1 +1 +1 1 1 +1 1

-C3 = 1 1 1 +1 +1 +1 1 +1 1 1 +1-C4 = 1 1 1 1 +1 +1 +1 1 +1 +1 1 1 +1 1 +1

C5 = +1 +1 +1 +1 1 +1 1 +1 1 1 1 1 +1 +1 1 +1 +1 1 1-C6 = 1 1 1 1 1 +1 1 +1 1 1 +1 +1 1 1 +1 +1 1 +1 1 +1 +1 +1 +1Note - The key to elimination of imbalance is the fact the negative of a real

sequence has the same autocorrelation function as the original sequence.

27th February 2007Page 26

BepiColombo X/X/Ka DST: Code Phase Acquisition

Down-LinkRanging Code

Qc

IN-PHASEINTEGRATOR

MID-PHASEINTEGRATOR

NCO

DELAY

TIMINGLOGIC

SIGN

LOOPFILTER

L

N Carrier LoopError

Nominal ChipRate

CODE GENERATOR #1

CODE CORRELATOR #1

Code ComponentsGenerators Clock

Max.Search

Lock

Dismiss

AND

OR

Lock Status

C1

CODE GENERATOR #2

CODE CORRELATOR #2 Max.Search

DismissC2

CODE GENERATOR #3

CODE CORRELATOR #3 Max.Search

DismissC3

CODE GENERATOR #4

CODE CORRELATOR #4 Max.Search

DismissC4

CODE GENERATOR #5

CODE CORRELATOR #5 Max.Search

DismissC5

CODE GENERATOR #6

CODE CORRELATOR #6 Max.Search

DismissC6

Lock

Lock

Lock

Lock

Lock

C2

C3

C4

C5

C6

C1

Chip Tracking Loop

Code Correlators

Down-Link Code Generator

REGENERATIVE RANGING CHANNEL

+/-1

the Chip Tracking Loop (CTL) for ranging code clock component phase and frequency recovery

the In-phase Integrator output is provided to Code Correlators: Six Correlators running in parallel for probe sequences (C1,…. C6) position recovery

the Down-link Code Generator (In this case only the JPL99 case is represented)

The current model of BepiColombo X/X/Ka DST is programmable and can handle the different schemes: JPL99, BT2 and BT4. The Regenerative Ranging Channel is composed by:

From Carrier Quadrature branch

27th February 2007Page 27

BepiColombo X/X/Ka DST: Chip Tracking Loop (CTL)

MID-PHASEINTEGRATOR

NCOTIMINGLOGIC

r/i)

LOOPFILTER

L

NCarrier Loop

Error

Nominal ChipRate

Code ComponentsGenerators Clock

+/-1

CTL Detector

Q(k)

The mid-phase integrator output is multiplied by +/-1 in order to provide the right correction to the loop. In a certain way the multiplication by +/-1 replaces the transition detector typical of a DDTL, considering that the PN sequence resembles a square-wave.

CTL NCO Base Frequency

Filtered Loop Error

Scaled Carrier Loop Error

Quadrature Carrier Branch Output

27th February 2007Page 28

BepiColombo KaT Calibration based on

PN Regenerative Ranging

27th February 2007Page 29

Impact of Calibration on BepiColombo KaT Baseband Processing

We need a separate PN code generator on the TX side clocked by the on-board oscillator

In the current X/X/Ka DST design the TX PN code is generated coherently with the received up-link PN code (see previous slide).

The TX PN NCO and the RX PN NCO must be clocked with the same

oscillator, avoiding any timing error between the two signals.

At the start of the calibration procedure (defined by a strobe signal common to RX and TX processing functions) the two PN code generators (RX and TX) must be identically initialised.

The loop back ranging signal acquired by the RX provides the delay from TX to RX (Loop-Back Delay).

The PN code phase acquisition (using the Probe Sequences) is used for ambiguity resolution

The phase difference between TX and RX ranging clock provides the accurate delay measurement

27th February 2007Page 30

Impact of Calibration on BepiColombo KaT Baseband Processing

The phase difference between the RX and TX PN Ranging Clock can be measured using the filtered phase error loop term of the CTL

CTL Detector

RX NCO

1/SX

X

+

+

B (nominal chip rate)

α

β

TX NCO

On-Board Clock

To RX PN Code Generator

To TX PN Code Generator

B (nominal chip rate)

Kd

KNCO

CTL second order loop

E

27th February 2007Page 31

Impact of Calibration on BepiColombo KaT Baseband Processing

Open Loop CTL Transfer Function s

K

sKsG NCO

d

)(

In the X/X/Ka DST the CTL is digitally implemented inside the RX Digital Section (Ts is the loop sampling time), using the Z transfer function we have

11

2

11)(

z

K

z

TTKzG NCOs

sd

CTL Detector

RX NCON-BIT

X

X

+

+

B (nominal chip rate)

αTs

βTs2

FCLK=1/Ts

TsKd

E

CTL second order loop:digital representation

27th February 2007Page 32

Impact of Calibration on BepiColombo KaT Baseband Processing

After the transient phase, the error term E provides the measurement of the delay between the TX and RX ranging clock signal. In radiant we can write:

ETEF

NsNclk

2

12

22

While in time we have: sNTE

2

1

It is evident that for typical loop sampling time of the order of 40 MHz and N=32 bit NCO the phase/time resolution is well below the required BepiColombo ranging delay accuracy. The calibration resolution in time due to the digital loop implementation is: N

sT 2

The Probe Sequence acquisition phase and the CTL error term (E) must be transmitted via telemetry down-link (using the X/X/Ka DST link). This information (after proper post-processing) can be used (on-ground) to evaluate the accurate Loop-Back delay.

27th February 2007Page 33

Impact of Calibration on BepiColombo KaT Baseband Processing

Notice that the KaT Ranging Delay (RX => TX) and the Loop Back Ranging Delay (TX => RX) might be different, this is due to:1. The TX/RX different paths (between nominal and calibration mode)

in the Front-End (Attenuators, Mixer, Couplers)2. Different routing of the signal in the baseband digital processing

(ASIC gates).

Probably the first contribution could be kept small (and negligible also under variations of environmental conditions) in terms of overall error budget. This to avoid further complications in terms of calibration.

Also the second contribution (inside the DSP) might be kept

negligible; however if not negligible, the delta (between the KaT Ranging Delay and the Loop Back Ranging Delay) can be measured at unit level in the LAB. Notice that this contribution is almost independent from the temperature since it is related to the clock drift (Note - the X/X/Ka DST is embarking an OCXO).

27th February 2007Page 34

CONCLUSIONS

27th February 2007Page 35

In order to improve the calibration performances and to minimise the on-board complexity it is suggested to integrate inside the KaT unit the SSPA, the Diplexer (*), the RF Calibration Front-End (Attenuators, Couplers, mixer, LO).(*) The possibility to integrate the Diplexer/Triplexer is not clear (under discussion).l

The use of PN Ranging (as per X/X/Ka DST) simplifies the calibration function in particular for ambiguity resolution.

Minor changes are foreseen for the base-band digital signal processing(*). The approach is to transmit the CTL error term via TLM link for post-processing at the G/S.

(*) However these have an impact on the current X/X/Ka DST FPGA/ASIC

Conclusions