Proceedings of the

European Conference

on Circuit Theory and DesignECCTD '99

Under the Patronage of the European Circuit Society (ECS)With the technical cosponsorship of the Institute of Electrical

and Electronic Engineers Region 8 (IEEE Region 8) and the

IEEE Circuits and Systems Society (IEEE-CAS)

29 August - 2 September 1999

Stresa - Italy

Volume I

Editors: C. Beccari, M. Biey, P.P. CiVALLEiu, M. Gilli

With the cosponsorship of

The Commission of the European Communities, Brussels

Ministero degli Affari Esteri, Roma

Politecnico di Torino

Dipartimcnto di Elettronica, Politecnico di Torino

TABLE OF CONTENTS pag.

Volume I

SESSION SOI: ANALOG CIRCUITS FOR INDUSTRIALAPPLICATIONS

A MOSFET-R-C Filtering Technique With Improved Linearity 01

M. Banu (Bell Laboratories, Lucent Technologies, Murray Hill, NJ, USA), N. Lifshitz

(Independent Consultant, formerly with Bell Laboratories, Lucent Technologies,Murray Hill, NJ, USA).

Considerations for the Design of a 10.7MHz Bandpass Sigma-Delta Modulator 05

D. Tonietto, P. Cusinato, F. Stefani (STMicroelectronics s.r.l., Milano, Italy), A. Baschirotto

(Universita di Lecce, Lecce, Italy).

Novel CMFB Circuits for SC Stages with Large Common-Mode Input 09

B. Wang (Marvell Semiconductor, Inc., Sunnyvale, CA, USA), Gabor C. Temes

(Oregon State University, Corvallis, OR, USA).

Voltage Down Converter for High Speed SRAMs 13

D. Montanari, M. Whately, K. Murray, C. Phelan (Cypress Semiconductor, San Jose, CA, USA).

A Fully Integrated BiCMOS AM/FM Car Active Antenna with On-Board Battery 17

Voltage RegulatorS. Brigati, F. Francesconi (Micronova Sistemi S.r.l., Trivolzio, Italy), P. Malcovati, F. Maloberti

(Universita di Pavia, Pavia, Italy), M. Poletti (Micronova Sistemi S.r.l., Trivolzio, Italy).

Low-Power and Low-Voltage RF Circuits Integrated in a Standard Digital CMOS Process 21

T. Melly, A. -S. Porret (EPFL-LEG, Lausanne, Switzerland), C. Enz, E. Vittoz (CSEM, Neuchatel,

and EPFL-LEG, Lausanne, Switzerland).

SESSION S02: TRANSPONDER CIRCUITSAND SYSTEMS FOR RFID

RFID-Technology - Recent Development and Future Requirements 25

C. Kern (Sihl GmbH, Dueren, Germany).

Dynamic Performance of Inductive RFID Systems 29

M. Beigel (Beigel Technology Co., Encinitas, CA, USA).

Combined Radio Frequency Identification, Automatic Vehicle Detection and Train Position 34

Location

F. Petersen (Traffic Supervision Systems A/S, Lyngby, Denmark).

System Evaluation, Analog Front End Design Considerations and Software Concept for the 37

TIRIS Digital Receiver Module

T. Flaxl (Texas Instruments, Freising, Germany).

The Advantages ofAsynchronous versus Synchronous Circuit Designs for Use in Passive RFID 41

ApplicationsY. Lee, S. Poulin, P. Sorrels (Microchip Technology Inc., Chandler, AZ, USA).

A Low-Power Digital Signature Transponder IC for High-Performance RFID Authentication 45

U. Kaiser, R. Friebel, R. Ganz, H. Meier, W. Steinhagen, A. Sabetti (Texas Instruments, Freising,

Germany).

SESSION S03: NONLINEAR TOOLS FOR SIGNALANALYSIS

Chaotic Lightwave Communications and Some Ideas on Using Nonlinear Dynamics 49

Henry D.I. Abarbancl (University of California, San Diego, CA, USA).

Noise Reduction for Human Speech Signals by Nonlinear Filters 54

R. Hegger, H. Kantz, L. Matassini (Max-Planck-Institut, Dresden, Germany).

Nonlinear Approach to Signal Coding and Compression 58

H. Dedieu (Swiss Federal Institute of Technology, Lausanne, Switzerland), M. J. Ogorzalek(University of Mining and Metallurgy, Krakow, Poland).

Prediction and Analysis of Spatio-Temporal Data Using TSTOOL 62

U. Parlitz, C. Merkwirth (University of Gottingen, Gottingen, Germany).

SESSION S04: APPLICATIONS OF SYMBOLIC CIRCUITANALYSIS

Symbolic Modeling and Analysis ofAnalog Integrated Circuits 66

R. Sommer, E. Hennig, M. Thole, T. Halfmann, T. Wichmann

(ITWM, University of Kaiserslautcrn, Germany).

Calculation of First- and Second-Order Symbolic Sensitivities in Sequential Formvia the 70

Transimpedance Method

F. Balik (Wroclaw University ofTechnology, Wroclaw, Poland), B. S. Rodanski

(University of Technology, Sydney, Australia).

Using Term Ordering to Improve Symbolic Behavioral Model Generationof Nonlinear 74

Dynamic Analog Circuits

L. Nitthke, R. Popp, L. Hedric, E. Barke (University of Hannover, Hannover, Germany).

On the Validity Region of Behavioural Models 78

O. Gucrra, J. D. Rodriguez-Garcia (IMSE-CNM, Sevilla, Spain), L. Garcia (School of

Engineering, Sevilla, Spain), F.V. Fernandez, R. Dominguez-Castro,A. Rodriguez-Vazquez (IMSE-CNM, Sevilla, Spain).

Fault Diagnosis of Analog Circuits Using SymbolicAnalysis Techniques 82

G. Fedi, R. Giomi (Universita di Firenze, Firenze, Italy), A. Luchetla (Universita della Basilicata,Potenza, Italy), S. Manetti, M. C. Piccirilli (Universita di Firenze, Firenze, Italy).

Symbolic Analysis of CMOS Regenerative Comparators 86

Geert Van der Plas, W. Daems, W. Verhaegen, E. Lauwers, J. Vandenbussche, G. Gielen, W.

Sansen (ESAT-MICAS, Heverlee, Belgium).

90

SESSION R01:ANALOG CIRCUITS -1

A New Versatile Building Block: Current Differencing Buffered Amplifier and Its

ApplicationsSerdar Ozoguz, Ali Toker, Muhammed A. Ibrahim, Cevdet Acar (Istanbul Technical University,Istanbul, Turkey).

A Low Voltage High Output Impedance Tail Current Source and Its Application to a 94

Differential AmplifierEitake Ibaragi, Akira Hyogo, Keitaro Sekine (Science University of Tokyo, Tokyo, Japan).

A Highly Linear V-I Converter 98

Mikko Waltari, Saska Lindfors, Kari Halonen (Helsinki University of Technology, Espoo,Finland).

VIII

Low-voltage High-Frequency MOS Transconductor 102J. Sabadell, S. Celma, C. Aldea, P. A. Martinez (Universidad de Zaragoza, Zaragoza, Spain).

Submicron Regulated Cascoding for a Low-V Fast-Settling OTA 106Esa Tiiliharju, Kari Haloncn (Helsinki University of Technology, Espoo, Finland).

High Output Impedance Current-Mode Multifunction Filter with Dual Output CCIIs 110

Providing Wide Dynamic RangeHakan Kuntman (Istanbul Technical University, Istanbul, Turkey), Oguzhan Cicekoglu (BogaziciUniversity, Istanbul, Turkey).

SESSION R02: LOWPOWER DESIGN

Transistor Sizing for Switching Activity Reduction in Digital Circuits 114Christian V. Schimpfle, Artur Wroblewski, Josef A. Nossek (Munich University of Technology,Munich, Germany).

A Low Power Hand-Over Mechanism for Gated-Clocks FSMs 118

Bengt Oelmann, Mattias O'Nils (Mid Sweden University, Sundsvall, Sweden).

A Simple Control for FFT Coefficient Access 122Yutai Ma, Lars Wanhammar (Linkoping University, Linkoping, Sweden).

A IV 450 uW CMOS Fully Integrated Bandpass Filter for Pager Applications 125

H. Hashemi, A. Parsa, K. Shakeri, A. Fotowat (Sharif University of Technology, Tehran, Iran), A.

Rofougaran (University of California, Los Angeles, CA, USA).

Adiabatic Gates: a Critical Point ofView 129M. Alioto, G. Palumbo (Universita di Catania, Catania, Italy).

A Low-Power Pipelined Map Overlaying Architecture for Hand Held Applications 133

Wacl M. Badawy, Magdy A. Bayoumi (University of Southern Louisiana, Lafayette, LA, USA).

SESSION R03:ANALOGANDDIGITAL ICs -1

A Low-voltage High-Speed Sense Amplifier for Multilevel Nonvolatile Memories 137

Cristiano Calligaro (MAPP Technology, Milano, Italy), Alcssandro Manstretta

(STMicroclectronics, Agrate Brianza, Italy), Andrea Pierin, Paolo Rolandi (STMicroelecironics,Pavia, Italy), G. Torelli (Universita di Pavia, Pavia, Italy).

A Novel Capacitive Circuit Architecture for Compact Realisation of Flash Analog-Digital 141

Converters

R. Baumgarlner (Worcester Polytechnic Institute, Worcester, MA, USA), A. Schmid (SwissFederal Institute of Technology, Lausanne, Switzerland), D. Bowler, Yusuf Leblebici (Worcester

Polytechnic Institute, Worcester, MA, USA).

Word-line Read Voltage Regulator with Capacitive Boosting for Multimegabit Multilevel 145

Flash Memories

Osama Khouri (Universita di Pavia, Pavia, Italy), R. Micheloni (STMicroelectronics, Agrate

Brianza, Italy), I. Motta, G. Torelli (Universita di Pavia, Pavia, Italy).

The Design of the GRAVITYAsynchronous Processor Core 149

Francesco Pessolano, Martin E. Bush, Dave Protheroe (South Bank University, London, UK).

Current-Mode Approach in High-Speed Low Power A/D Converters 153

Grzegorz Gesiarz, Zygmunt Ciota, Andrzcj Napieralski (Technical University of Lodz, Lodz, Poland).

IX

SESSION R04: POWER ELECTRONICSAND SYSTEMS - /

Analysis of Class D-E Resonant DC/DC Converter Using Thinned-out Method 157

Hirotaka Koizumi (Keio University, Yokohama, Japan), Shinsaku Mori (Nippon Institute of

Technology, Saitama, Japan), Iwao Sasase (Keio University, Yokohama, Japan).

High-Performance Gate Unit Driving a Multiple Connection of Insulated Gate Devices 161

G. Greco, A. Raciti (Universita di Catania, Catania, Italy), G. Belverde, A. Galluzzo, M. Melito,S. Musumeci (STMicroelectronics, Catania, Italy).

Class E2 Converter with +/- Output Voltage 165

Itsda Boonyaroonate, Shinsaku Mori (Nippon Institute ofTechnology, Saitama, Japan).

A CMOS Audio Power Amplifier Driving 8Vpp into a 7 Ohm Resistive Load 169

S. Brigati, F. Francesconi (Micronova Sistemi Sri, Trivolzio, Italy), P. Malcovati (Universita di

Pavia, Italy), M. Poletti (Micronova Sistemi Sri, Trivolzio, Italy).

Characteristic Coefficients of DC-DC Switching Converters 173

Elena Niculescu, Eugen-Petrisor Lancu (University of Craiova, Romania).

SESSION ROS: NONLINEAR CIRCUITSAND SYSTEMS / CHAOS,BIFURCATIONSANDAPPLICATIONS

Experimental Confirmation of Nonlinear HM Synchronization for Chua's Circuit 177

M.E. Yalcin, J. A. K. Suykens, J. Vandewalle (K. U. Leuven, ESAT-SISTA, Leuven, Belgium).

Decomposed Canonical State Models of the Third-Order Piecewise-Linear Dynamical Systems 181

Jiri Pospisil, Jaromir Brzobohaty, Zdenek Kolka, Jana Horska (Brno University of Technology,Brno, Czech Republic).

An Extended Two-Port Van Der Pol Model for the Efficient Simulation of Injection-Locked 185

Oscillator Steady-State and Transient ResponseEnrico F. Calandra, Claudio Maniscalco (Universita di Palermo, Palermo, Italy).

Topology and Dynamics ofMutual Inductors with Ferromagnetic Non-Linearity 189

S. Leva, A.P. Morando (Politecnico di Milano, Milano, Italy).

A Tailed Tent Map Chaotic Circuit Exploiting S2I Memory Elements 193

S. Callegari, R. Rovatti (Universita di Bologna, Bologna, Italy), G. Setti (Universita di Ferrara,

Ferrara, Italy).

SESSION R06: DIGITAL FILTERSAND FILTER BANKS -1

Realization of Low-Sensitivity IIR Digital Filters with Hypercomplex Coefficients 197

Hiroshi Adachi, Kazuhiro Okabayashi, Shin-ichi Takahashi (Keio University, Yokohama, Japan).

A Novel Technique for the Design of QMF Filter Banks with Approximately Linear Phase, 201

Based on Allpass Filters

S. S. Lawson, A. Klouche-Djedid (University of Warwick, Coventry, UK).

Linear-Phase Paraunitary FIR Filter Banks with Unequal Lenghts (ULLPPUFB) 205

Toshichika Urushibara, Takayuki Nagai, Masaaki Ikehara (Keio University, Yokohama, Japan).

Analytical Approach to the Design of FIR Filters 209Miroslav Vlcek, Pavel Zahradnik (Czech Technical University, Prague, Czech Republic), Rolf

Unbehauen (University of Erlangen-Nurnberg, Erlangen, Germany).

Improved Scaling for Block Digital Filters 213M. Gaida, E. Liider (University of Stuttgart, Stuttgart, Germany).

X

SESSION R07: ANALOG FILTERS -1

CMOS Gm-C Biquadratic Stage for PRML Read Channel Applications 217Adrian Ryan, Marius Neag, Oliver McCarthy (University of Limerick, Limerik, Ireland).

CMOS Low-Noise Asymmetrical Poly-Phase Filter for GMS Low-IF Radio Receivers 221Jan H. Mikkelsen (Aalborg University, Aalborg, Denmark).

Simulation and Realization of OTA-Based Active-C Filters 225Umesh Kumar (IIT Delhi, New Delhi, India), M. N. Doja, Moinuddin (Jamia Millia Islamia

University, Okhla, New Delhi, India).

Biquad Based on a Generalized Divider Structure 229

Dasa Ticha (University of Zilina, Zilina, Slovak Republic), Pravoslav Martinek (Czech Technical

University, Prague, Czech Republic).

New Current-Mode Allpass Filters Using Current Feedback Amplifier 233

R. Nandi, S.K. Sanyal (Jadvpur University, Calcutta, India), T.K. Banerjee (Hooghly Institute of

Technology, Hooghly, India).

SESSION R08: TESTING: ANALOG, DIGITALAND MIXED I VLSI

PHYSICALDESIGN

A Novel CMOS Standard Cell Structure for Self-Routed Clock Net Generation 235

F. K. Gurkaynak, I. Halirnaz, Yusuf Leblebici (Worcester Polytechnic Institute, Worchester, MA,

USA).

Use of Linear Models to Optimize Test Procedures for Mixed-Signal integrated Circuits 239

Cartsten Wegener, M. P. Kennedy (University College Dublin, Dublin, Ireland).

Description of the DC Fault Dictionary in the Measurement Space 243

J. Rutkoswski, J. Machniewski (Silesian University of Technology, Gliwice, Poland).

On Reducing the Peak Power Consumption ofTest Sequences 247

F. Corno, M. Rebaudengo, M. Sonza Reorda, M. Violante (Politecnico di Torino, Torino, Italy).

Generation of Minimal Delay Routing Trees in Presence of Obstructions 251

Eugene Shragowilz, Jian Liu (University of Minnesota, MN, USA).

PLENARY SESSION: TUTORIALS T2

Network Synthesis: Some Modern Applications 255

J. O. Scanlan (University College Dublin, Dublin, Ireland).

Chaotic Communications Over a Noisy Channel 256

M. Hasler (Swiss Federal Institute ofTechnology, Lausanne, Switzerland).

SESSION SOS -1: LOW-COMPLEXITY DIGITAL FILTERS -1

Graphical Methods for Efficient Multiplier Design: Theory and Algorithms 257

A. G. Dempster (University of Westminster, London, UK), M. D. Macleod (University of

Cambridge, Cambridge, UK).

Graphical Methods for Efficient Multiplier Design: Application to Digital Filters 261

A. G. Dempster (University of Westminster, London, UK), M. D. Macleod (University of

Cambridge, Cambridge, UK).

XI

FIR Multiplierless Cellular Networks 265

S. Samadi (University of Electro Communications, Tokyo, Japan), A. Ni.shihara (Tokyo Institute

ofTechnology, Tokyo, Japan), H. Iwakura (University of Electro Communications, Tokyo, Japan).

Design of Signal Word Decomposed Filters with Optimal Filter Length and Coefficient 269

Wordlength Assignment to Each Subfilter

M. Yagyu (Texas Instruments, Tsukuba, Japan), A. Nishihara (Tokyo Institute of Technology,Tokyo, Japan).Reduced Complexity Primitive Operator FIR Filters for Low Power Dissipation 273

D. H. Horrocks, Y. Wongsuwan (Cardiff University, Cardiff, UK).

Short Wordlength Selective IIR Filters 277

M. D. Lutovac (IRITEL, Belgrade, Yugoslavia), L. D. Milic (Mihajlo Pupin Institute, Belgrade,Yugoslavia).

SESSION S06: INTEGRATED CIRCUITS FOR WIRELESSCOMMUNICATIONS

High-Performance Integrated RF Passives 281

Markku Aberg, Hannu Ronkainen, Tarja Riihisaari, Hannu Kattelus (VTT Electronics, Espoo,Finland).

Phase Noise in LC Oscillators 285

Qiuting Huang (Swiss Federal Institute of Technology, Zurich, Switzerland).

Design of an Integrated Transmitter for Broadband Applications 289C. De Ranter, M. Borremans, M. Sleyaert (ESAT-MICAS, K.U. Leuven, Leuven, Belgium).

A 2.56-GHz Continuous-Time Sigma-Delta Modulator 293F. Belfiore (STMicroelectronics s.r.l., Catania, Italy), G. Palmisano, R. Salerno (Universita di

Catania, Catania, Italy).

High Frequency Resolution 2.4GHz Band Rapid Frequency Change Synthesizer 297

Eiji Okada, Takahiro Oie, Tadamilsu Iritani (University of Tokushima, Tokushima, Japan).

Si BJT Negative-Conductance Circuit Topologies for GHz-Range Oscillators 301

Kari Stadius, Risto Kaunisto, Veikko Porra (Helsinki Univ. of Tech., Helsinki, Finland).

SESSION R09: ANALOG CIRCUITS - II

A Continuously Adjustable Video-Frequency Current Amplifier for Filter Applications 305

Hanspeter Schmid, George S. Moschytz (Swiss Federal Institute of Technology, Zurich,Switzerland).New Controlled Oscillator with Grounded Resistances Based on Current Conveyors 309

Herve Barthelemy (Laboratoire LEMMI, ISEM, Toulon, France), Alain Fabre (Laboratoire IXL,Universit6 de Bordeaux, Talence, France).

A Continuous-Time CMOS Common-Mode Feedback Circuit (CMFB) with Gain 313

Partitioning Using Replica Bias

Gerry Quilligan (University of Limerick, Limerik, Ireland), Philip Burton (PEI, Limerick, Ireland).

Switched Current Circuits with Simple Programmable Transconductance Amplifiers 317

Andrzej Mazurck (Technical University of Koszalin, Poland).

On the Frequency Response of M-Channel Mixed Analog and Digital Maximally Decimated 321Filter Banks

Per Lowenborg, Hakan Johansson, Lars Wanhammar (Linkoping University, Linkoping, Sweden).

XII

An OTA Consisting of Pair-MOSFET's for Low Power Supply Voltage 325Kawori Takakubo (Tokai University, Kanagawa, Japan), Shigetaka Takagi (Tokyo Institute ofTechnology, Tokyo, Japan), Hajime Takakubo (Chuo University, Japan), Nobuo Fujii (TokyoInstitute of Technology, Tokyo, Japan).

SESSION S07: HARMONICBALANCE TECHNIQUES: CIRCUITSAND BEYOND

Signal and Noise Analysis of Large Nonlinear Microwave Circuits by Advanced Harmonic- 329Balance TechniquesV. Rizzoli, F. Sgallari, F. Mastri (Universita di Bologna, Bologna, Italy), C. Cecchetti (FondazioneUgo Bordoni, Pontecchio Marconi, Italy), A. Lipparini (Universita di Bologna, Bologna, Italy).

Harmonic Balance Techniques Allow Nonlinear Simulations of Microwave Circuits from 333Devices to SubsystemsR. Que're; J. Obregon, E. Ngoya, R. Sommet (IRCOM CNRS, University de Limoges, France).

Harmonic Balance Analysis ofLarge-Scale Circuits and Semiconductor Devices 337Boris Troyanovsky (Hewlett-Packard Company, Santa Rosa, CA, USA).

Harmonic Solution of Boltzmann's Transport Equation for Microwave and Millimetre-Wave 341Active Device ModellingG. Acciari, F. Giannini (Universita di Roma 'Tor Vergata', Roma, Italy), G. Leuzzi (Universitadell'Aquila, L'Aquila, Italy).

A Spectral Approach to the Computation of Floquet Multipliers for the Bifurcation Analysis 345of Limit CyclesF, Bonani, M, Gilli (Politecnico di Torino, Torino, Italy).

General-Purpose Electron Device Model Based on Non-Linear Discrete-Time Convolution 349F. Filicori, A. Santarelli, P. A, Traverso (Universita di Bologna, Bologna, Italy), G. Vannini

(Universita di Ferrara, Ferrara, Italy).

SESSION RIO: CHAOS, BIFURCATIONSAND APPLICATIONS -1

Performance Analysis of Impulsive Synchronization 353

Makoto Itoh, N. Yamamolo (Fukuoka Institute of Technology, Fukuoka, Japan), Tao Yang, LeonO. Chua (University of California, Berkeley, CA, USA).

Synchronization and Clustering of Phases in Coupled Network with Wien-Bridge 357

Oscillators

Seiichiro Moro (Fukui University, Fukui, Japan).

All Periodic Orbits with Period n <26 for the IWnon Map 361

Zbigniew Galias (University of Mining and Metallurgy, Krakow, Poland).

Synchronization Method of Hyperchaotic Circuits Based on a Scalar Transmitted Signal 365

M. Brucoli, D. Cafagna, L. Carnimeo (Politecnico di Bari, Bari, Italy).

Electro-Thermal Nonlinear Phenomena in Power Diodes 369

Angelo Brambilla, Amedeo Premoli, Giancarlo Storti-Gajani (Politecnico di Milano, Milano,

Italy).

Chaos-Based FM of Clock Signals for EMI Reduction 373R. Rovatti (Universita di Bologna, Bologna, Italy), G, Setti (Universita di Ferrara, Ferrara, Italy),S. Graffi (Universita di Bologna, Bologna, Italy).

SESSION Rll: PLL/DELTA-SIGMA MODULATORS

Explosion of Strange Attractors and Crisis Induced Intermittency from a Forced Phase- 377

Locked Loop Circuit: Theory and ExperimentsTetsuro Endo (Meiji University, Kawasaki, Japan), Wataru Ohno (Toyota National College of

Technology, Toyota, Japan), Yoshisuke Ueda (Kyoto University, Kyoto, Japan).

Phase-Jitter Bounds in DPLLs - Low-Denominator Rational Resonance 381

Alexey Teplinski (Academy of Sciences, Kiev, Ucraine), Orla Feely (University College Dublin,

Dublin, Ireland).

Dynamical Analysis of Certain Bandpass Sigma-Delta Modulators 385

Ina Taralova-Roux, Orla Feely (University College Dublin, Dublin, Ireland).

On Stability Issues of Lowpass Sigma-Delta Modulators 389

Jurgen van Engelen (Technical University of Eindhoven, The Netherlands), Domine Leenaerts

(Philips Research Laboratories, Eindhoven, The Netherlands), Rudy van de Plassche (Technical

University of Eindhoven.The Netherlands).

Signal Distortion and Wave-Form Conversion in a Classical PLL 393

Mart Min, Velio Mannarna, Toivo Paavle (Tallinn Technical University, Tallinn, Estonia).

SESSION SOS - II: LOW-COMPLEXITY DIGITAL FILTERS - II

An Interleaved Architecture for Lattice FIR Filters 397

F. Yu, A. N. Willson, Jr. (University of California, Los Angeles, CA, USA).

Design of Optimal Finite Wordlength FIR Digital Filters 401

D. M. Kodek (University of Ljubljana, Ljubljana, Slovenia).

Polyphase Realizations of Fractional Sample Rate Converters 405

H. G. Goeckler (Ruhr-Universitaet Bochum, Bochum, Germany).

Efficient Multirate Digital Filters Based on Fractional Polyphase Decomposition for 409

Subnyquist ProcessingH. G. Goeckler, A, Groth, CM. Flatten (Ruhr-Universitaet Bochum, Bochum, Germany).

A Comparison of FIR and IIR Digital Filters Satisfying Magnitude and Phase Specifications 413

M. C. Lang (Vienna University of Technology, Vienna, Austria).

SESSION S08 -1: RECENT TRENDS INANALYSISAND DESIGN

OF HIGH SPEEDINTERCONNECTS -1

Operating Frequency Trends For High Performance Off-Chip Buses 417

George A. Kalopis (IBM Corp., Poughkeepsie, NY, USA).

Recent Development in Interconnect Analysis and Simulation Based on Distributed Models 421

of Transmission Lines

Ernest S. Kuh, Janet M. L. Wang (University of California, Berkeley, CA, USA).

Simulation of Distributed Interconnects with Frequency Dependent Parameters Using 425

Krylov-Space TechniquesP. Gunupudi, R. Achar, M. Nakhla, A. Dounavis (Carleton University, Ottawa, Canada).

Advanced Techniques for the Modeling and Simulation of Interconnects 429

Jose Schutt-Aine (University of Illinois at Urbana-Champaign, Urbana, IL, USA).

Power Analysis of Large Interconnect Grids with Multiple Sources Using Model Reduction 433

Eli Chiprout, Tuyen Nguyen (IBM Austin Research Lab., Austin, TX, USA).

XIV

SESSION S09: COMMUNICATING WITH CHAOS

Chaotic Communications: State of the Art 437M, P. Kennedy (University College Dublin, Dublin, Ireland).

Robust Chaotic Synchronisation for Communications 441

C. Williams (Communications Dept., DERA Malvern, Malvern, UK).

Robust Chaotic Communications without Synchronization 445G. Kolumban, B. Frigyik (Technical University of Budapest, Budapest, Hungary).

Chaos-Based DS-CDMA: Results and Open Problems 449G. Mazzini (Universita di Ferrara, Ferrara, Italy), R. Rovatti (Universita di Bologna, Bologna,Italy), G. Setti (Universita di Ferrara, Ferrara, Italy).

Piecewise Affine Markov Maps for Chaos Generation in Chaotic Communication 453M. Delgado-Restituto, A. Rodriguez-Vazquez (Instituto de Microelectronica de Sevilla, Sevilla,Spain).

SESSIONR12:NUMERICAL METHODSAND CIRCUITSIMULATION-1

Dynamic Model ofPWM Zero-voltage Transition Boost Converter. Large-Signal Analysis 459Y. Berkovich, A. Ioinovici (Institute for Technological Education Holon, Holon, Israel).

On the Boundary Crossing ofLinear Regions in Piecewise-Linear DC Analysis 463J. Roos, M. Valtonen (Helsinki University of Technology, Espoo, Finland).

An Effective Algorithm for Finding all the DC Solutions of MOS Transistors Circuits 467

Represented by Original Polynomial Nonlinearities

M. Tadeusiewicz, S. Halgas (Technical University of Lodz, Lodz, Poland).

Steady-State Analysis of LSI Circuits Coupled with Multi-Conductor Transmission Lines 471Akio Ushida, Yoshihiro Yamagami, Yoshifumi Nishio (Tokushima University, Tokushima, Japan).

The Charge - Flux Method in Simulation ofFirst Kind Switched Circuits 475

Jan Ogrodzki, Marcin Skowron (Warsaw University of Technology, Warsaw, Poland).

A New Technique for the Formulation of the Constraint Equations for Time-Variant 479

Topology Electrical Circuits

G. Acciani, E. Chiarantoni, G. Fornarelli, F. Vacca (Politecnico di Bari, Bari, Italy).

SESSION R13: ELECTROMECHANICAL SYSTEMS I SENSORS/ROBOTICS

A Digitally Enhanced Resolution Technique for Rotary Encoder Systems 483

F. Cherchi (Universita di Pavia, Pavia, Italy), L. Gonzo (Istituto Trentino di Cultura, Trento, Italy),V. Liberali, G. Torelli (Universita di Pavia, Pavia, Italy).

A CMOS Monolithic Optical Head for High-Resolution Position Encoders 487

D. Stoppa, L. Ravezzi (Universita di Trento, Trento, Italy), G. F. Dalla Betta, M. Gottardi, G.

Soncini (Istituto per la Ricerca Scientifica e Tecnologica, Povo, Trento, Italy).

Path Planning by Unsupervised Neural Nets for a Planar Robot Moving among Unknown 491

Obstacles

G. Martinelli, F. M. Frattale Mascioli, A. Rizzi, W. Iandolo (Universita di Roma "La Sapienza",

Roma, Italy).

Integrated Interface Electronics for a Hall Magnetic Sensor 495

Z. Randjelovic, M. Kayal, R. S. Popovic (Swiss Federal Institute of Technology, Lausanne,

Switzerland).

A Thermodynamic-Circuital Approach to the Theory of Time-Varying Inductive Electro- 499

Mechanical Multi-Ports

C, M. Arturi, A. Gandelli (Politecnico di Milano, Milano, Italy).

SESSION R14: ANALOGAND DIGITAL ICs - II

CMOS Voltage Buffer with Resistive Frequency Compensation 503

Marius Neag, Oliver McCarthy (University of Limerick, Limerick, Ireland).

Low-Voltage Current-Mode Gates for MAD Systems 507

Piotr Pawlowski, Andrzej Guzinski (Technical University of Koszalin, Koszalin, Poland).

Aries: A Compact Modular Macro-Block for Digital Filtering Applications 511

F. K. Gurkaynak, Yusuf Leblebici (Worcester Polytechnic Institute, Worcester, MA, USA).

Switched-CurrentImplementation of an Image Processor for Portable Digital Cameras 515

Andrzej Handkiewicz, Marcin Lukowiak, Marek Kropidlowski (Poznan University of

Technology, Poznan, Poland).

Comparison on CMOS Full Adders in Different Design Styles with Emphasis on Low-Power 519

TopologiesM. Alioto, G. Palumbo (Universita di Catania, Catania, Italy).

High-Linearity Digitally Programmable Components For Continuous-Time Signal 523

ProcessingS. Celma, J. Sabadell, C. Aldea, P. A. Martinez (Universidad de Zaragoza, Zaragoza, Spain).

SESSION R15: NEURAL NETWORKS -1

Selforganizing Neural Networks Versus Neurofuzzy Networks 527

Stanislaw Osowski, Tran Hoai Linh, Krzysztof Siwek (Warsaw University of Technology,

Warsaw, Poland).

A New Sufficient Condition for Global Stability of Neural Networks 531

Sabri Arik (Istanbul University, Istanbul, Turkey), Vedat Tavsanoglu (South Bank University,London, UK).

Design Method of Limit Cycle Generator by Cyclic Connected Neural Networks 535

Teru Yoneyama (Shizuoka University, Hamamatsu, Japan), Hiroshi Ninomiya (Shonan Institute of

Technology, Japan), Hideki Asai (Shizuoka University, Hamamatsu, Japan).

Dual Extended Kalman Filter Algorithm for Training RBF Networks 539

Iulian Ciocoiu (Technical University of Iasi, Iasi, Romania).

SESSION S08 - II: RECENT TRENDS IN ANALYSISAND DESIGN OF

HIGH SPEED INTERCONNECTS - II

Influence ofFrequency-Dependent Characteristics on Deep Submicron Crosstalk Simulations 543

Hartmut Grabinski, Dieter Treytnar, Uwe Arz, Ktata Faiez, Petra Nordholz (University of

Hannover, Hannover, Germany).

Electromagnetic Analysis of Interconnects Using the Finite Difference Time Domain Method 547

Christian Schuster, Andreas Witzig, Wolfgang Fichtner (Swiss Federal Institute of Technology,Zurich, Switzerland).

XVI

Circuit Modelling of High-Density Electronic PackagingLuc Martens (University of Gent, Gent, Belgium).

551

Time Domain Scattering Parameters - The Fast and Convenient Tool for Transient 555Simulation in Coupled Transmission Lines

W. Bandurski (Poznan University of Technology, Poznan, Poland).

Passive Model Order Reduction for RLCG Interconnects Via the Moment Components 559Method

Izzet Cem Goknar (Istanbul Technical University, Istanbul, Turkey), Haydar Kutuk, Sung-Mo(Steve) Kang (University of Illinois, Urbana, IL, USA).

SESSIONR16: POWER ELECTRONICSAND SYSTEMS - II

A New Approach to Model Self-Heating of Electrical Circuits through Thermal Networks 563Lorenzo Codecasa, M. Santomauro (Politecnico di Milano, Milano, Italy).

Electrothermal Breakdown Modes in the Darlington Power Transistor 567Janusz Zarebski, Krzysztof Gorecki (Gdynia Maritime Academy, Poland), Witold J. Stepowicz(Technical University of Gdansk, Poland).

Small-Signal Symbolic Analysis of PWM DC-DC Converters Operated in Continuos and 571

Discontinues Current Mode

A. Reatti (Universita di Firenze, Firenze, Italy), A. Luchetta (Universita della Basilicata, Italy).

LC Matching Circuits for Class E Inverter with Non-Stationary Load 575

Boguslaw Grzesik, Jacek Junak (Silesian Technical University, Gliwice, Poland).

SESSION R17: WAVELETAND MULTIRATE SIGNALPROCESSING

Wavelet Filter Construction for Optimal Regularized Image Restoration Using the 579

Generalized-cross-validation Criterion

Ioannis M. Stephanakis, Stefanos Kollias (National Technical University ofAthens, Greece).

A Unified ModuleArchitecture for Forward and Inverse Discrete Wavelet Transforms 583

Shogo Muramatsu, Hitoshi Kiya, AkihikoYamada (Tokyo Metropolitan University, Tokyo, Japan).

A Novel Wavelet Filtering Method in Automated Lineament Detection by Hough Transform 587

In Sar ImagesG. Simone, F. C. Morabito (Universita di Reggio Calabria, Italy),

Signal Flow Graph Approach to Wavelet Lifting 591

Paul Cristea, RodicaTuduce (Politechnica University of Bucharest, Bucharest, Romania).

SESSION R18: TESTING: ANALOG, DIGITALAND MIXED

A Genetic Algorithm for Test Pattern Generation ofMVL Circuits 595

V. Levashenko (State Economic University, Minsk, Belarus), S. Yanushkevich (Technical

University, Szczecin, Poland).

Sensitivity Based Analog Fault Dictionary 599

J. Rutkoswski, J. Machniewski (Silesian University of Technology, Gliwice, Poland).

A Software Program for Ambiguity Group Determination in Low Testability Analog Circuits 603

J. Starzyk, J. Pang (Ohio University, Athens, OH, USA), G. Fedi, R. Giomi, S. Manetti, M. C.

Piccirilli (Universita di Firenze, Florence, Italy).

Tests of 64Mb Sdram for Space Applications 607

S. Bertazzoni, G. C. Cardarilli, G. C. Grande, D. Piergentili, M. Salmeri, S. Sperandei (Universitadi Roma "Tor Vergata", Roma, Italy), S. Bartalucci, G. Mazzenga, S. Ricci (1st. Naz. di Fisica

Nucleare, Frascati, Italy), V. Bidoli, D. De Francesco, E. Reali (1st. Naz. di Fisica Nucleare,

Roma, Italy), A. Rovelli (1st. Naz. di Fisica Nucleare, Catania, Italy).

SESSION R19: GENERAL CIRCUITSAND SYSTEMS -1

Performance Characterisation Transformed into the Load Plane via Impedance Parameters 611

Filiz Gunes, Tuna Vural (Yildiz Technical University, Istanbul, Turkey).

Frequency Responses of Linear Systems with Interval Parameters 615

Z.A. Garczarczyk (Silesian Technical University, Gliwice, Poland).

A New Theorem on Nonminimal Realization of Transformerless, Common-Ground, Two- 619

Element-Kind RLC Networks

Dragan Kandic, Branimir Reljin (University of Belgrade, Belgrade, Yugoslavia).

Broadband Matching of Complex N-Port Loads 623

Gennadij Chavka (Bialystok Technical University, Bialystok, Poland).

Author Index 627

Volume II

PLENARYSESSION: TUTORIALS T3

Low Power CMOS Design Methods 631J. A. Nossek, A. Schlaffer, C. V. Schimpfle, M. Wroblewski (Munich University of Technology,Munich, Germany).

Optimal Circuit Designer 632

A. Petrenko (Kiev Polytechnical Institute, Kiev, Ukraine).

SESSION R20: ANALOG CIRCUITS - III

On the Stability of Multistage Amplifers 635J. Ladvanszky (Innovation Company for Telecommunications, Budapest, Hungary).

Active-R Three-Phase Oscillator Operating at Power Line Frequencies 639

John Vosper (The Manchester Metropolitan University, Manchester, UK), Oscar Roitegui(University of the Basque Country, Vitoria-Gastiez, Spain).

Binary Signals with Separated Baseband and Their Application to High Performance Class- 643D Audio AmplifierMartin Streitenberger, Helmut Bresch, Wolfgang Mathis (Otto von Guericke UniversityMagdeburg, Germany).

Realization of Sinusoidal Oscillators Employing a Newly Introduced Active Element: 647

CDBA, Current Differencing Buffered AmplifierSadri Ozcan, Ali Toker, Cevdet Acar, Hakan Kuntman (Istanbul Technical University, Istanbul,Turkey), Oguzhan Cicekoglu (Bogazici University, Istanbul, Turkey).

Investigation of Self-Linearizing Circuits Involving P-N-Junctions 651Yu Brack, M. Haridim (Center for Technological Education-Holon, Holon, Israel).

XVIII

Improved Biasing Error in Current Mode Absolute Value Circuits 655Velio Mannama (Tallinn Technical University, Tallinn, Estonia), Brett Wilson (UMIST, Manchester, UK).

SESSIONS10 -1: OPPORTUNITIES AND CHALLENGESFOR NANOELECTRONICS -1

Molecular Electronics

Philip J. Kuekes, R. Stanley Williams (Hewlett-Packard Laboratories, PaloAlto, CA, USA). 659

SPICE Simulation of Circuits Containing Resonant Tunneling Diodes 663

Mayukh Bhattacharya, Pinaki Mazumder (The University of Michigan, Ann Arbor, MI, USA).

Circuit Applications of Quantum MOS Logic 667

Shriram Kulkarni, Pinaki Mazumder (The University of Michigan, Ann Arbor, MI, USA).

Nanoscopic Quantum Networks: Collective versus Selective Control 671

Guenter Mahler, A. Otte (University of Stuttgart, Stuttgart, Germany).

SESSIONR21: NONLINEAR CIRCUITSAND SYSTEMS

Nonlinear Stabilization Techniques for Modulators: A Comparison 679

Adrian Leuciuc (State University of New York, Stony Brook, NY, USA).

How to Analyse ifFeedback-Structures Cause Multiple Operating Points 683

Lars Kronenberg (University of Magdeburg, Magdeburg, Germany), LjiljanaTrajkovic (Simon-Fraser

University, Burnaby, Canada), Wolfgang Mathis (University of Magdeburg, Magdeburg, Germany).

Large-Signal Simulation Model for PTC Thermistor 687

Timo Veijola (Helsinki University ofTechnology, Espoo, Finland).

On the Definition of Nonlinear Circuits for Parallel Minimisation of Continuous Functionals 691

Federico Bizzarri, Marco Storace, Mauro Parodi (Universita di Geneva, Genova, Italy).

Wave Propagation Phenomena ofPhase States in Coupled Oscillators 695

Masayuki Yamauchi, Masahiro Wacla, Yoshifumi Nishio, Akio Ushida (Tokushima University,Tokushima, Japan).

Detection of All the Equilibrium Points of Dynamic ID Autonomus Rings 699

Stefano Pastore (Universita di Trieste, Trieste, Italy).

SESSIONR22: DIGITAL FILTERSAND FILTER BANKS - II

Design of Stable, Causal, Perfect Reconstruction, IIR Uniform DFT Filter Banks 703

A. Klouche-Djedid, S. S. Lawson (University ofWarwick, Coventry, UK),

Memoryless Fully Parallel Residue-To-Mixed Radix Converter 707

J. Malhcw, D, Radhakrishnan, T. Srikanthan (Nanyang Technological University, Singapore).

A Scalable Architecture for the Realization of Compact Programmable Rank-Order Filters 711

Using Threshold LogicI. Hatirnaz, F. K. Gurkaynak, Yusuf Leblebici (Worcester Polytechnic Institute, Worchester, MA,

USA),

A Simple Method for Two-Channel QMF Bank Design Based on the Frequency Sampling 715

ApproachRobert Bregovic, Hrvoje Babic (University of Zagreb, Zagreb, Croatia), Rajeev Gandhi, Sanjit K.

Mitra (University of California, Santa Barbara, CA, USA).