Nu Horizons Electronics Portal Europe - February 2010

De

ve

lop

me

nt T

oo

ls

UK EditionFebruary 2010

Featured Products

Speed up development of video algorithms and incorporate the latest video interface standards right out of the box. The Spartan-6 FPGA Consumer Video Kit is a comprehensive design environment for developing and debugging advanced video algorithms... more on page 8.

Spartan-6 FPGA Consumer Video Kit

In This Issue:

Focus on

D E V E L O P M E N T T O O L S

De

ve

lop

me

nt

To

ols

2

Spa

rtan

-6 L

X F

PG

As

Opt

imize

d fo

r Low

est-

Cos

t Log

ic, D

SP, a

nd M

emor

y(1

.2 V

olt,

1.0

Volt)

Spa

rtan

-6 L

XT

FPG

As

Opt

imize

d fo

r Low

est-

Cos

t Log

ic, D

SP, a

nd M

emor

y w

ith H

igh-

Spee

d Se

rial C

onne

ctivi

ty(1

.2 V

olt)

Pa

rt N

umbe

rX

C6S

LX4

XC

6SLX

9X

C6S

LX16

XC

6SLX

25X

C6S

LX4

5X

C6S

LX75

XC

6SLX

100

XC

6SLX

150

XC

6SLX

25T

XC

6SLX

45T

XC

6SLX

75T

XC

6SLX

100T

XC

6SLX

150T

Logi

c R

esou

rces

Slic

es(1

)6

001,

430

2,27

83,

758

6,82

211

,662

15,8

2223

,03

83,

758

6,82

211

,662

15,8

2223

,03

8

Logi

c C

ells

(2)

3,8

40

9,15

214

,579

24,0

5143

,661

74,6

3710

1,26

114

7,4

4324

,051

43,6

6174

,637

101,

261

147,

443

CLB

Flip

-Flo

ps4,

800

11,4

40

18,2

243

0,0

64

54,

576

93,2

96

126,

576

184,

30

43

0,0

64

54,

576

93,2

96

126,

576

184,

30

4

Mem

ory

Res

ourc

es

Max

imum

Dis

tribu

ted

RA

M (K

bits

)75

90

136

229

401

692

976

1,35

522

94

016

9297

61,

355

Blo

ck R

AM

(18K

bits

eac

h)12

3232

5211

617

226

826

852

116

172

268

268

Tota

l Blo

ck R

AM

(Kbi

ts) (3

)21

657

657

693

62,

08

83,

09

64,

824

4,82

493

62,

08

83,

09

64,

824

4,82

4

Clo

ck R

esou

rces

Clo

ck M

anag

er T

iles

(CM

T) (4

)2

22

24

66

62

46

66

I/O

Res

ourc

esM

axim

um S

ingl

e-En

ded

Pins

132

200

232

266

358

400

48

057

625

029

63

48

49

85

40

Max

imum

Diff

eren

tial P

airs

66

100

116

133

179

200

240

288

125

148

174

249

270

Embe

dded

Har

d

IP R

esou

rces

DS

P48A

1 S

lices

(5)

816

323

85

813

218

018

03

85

813

218

018

0

PC

I Exp

ress

® E

ndpo

int B

lock

––

––

––

––

11

11

1

Mem

ory

Con

trolle

r Blo

cks

02

22

44

44

22

44

4

GTP

Low

-Pow

er T

rans

ceive

rs–

––

––

––

–2

48

88

Spe

ed G

rade

sC

omm

erci

al-L

1, -

2, -

3-L

1, -

2, -

3-L

1, -

2, -

3-L

1, -

2, -

3-L

1, -

2, -

3-L

1, -

2, -

3-L

1, -

2, -

3-L

1, -

2, -

3-2

, -3,

-4

-2, -

3, -

4-2

, -3,

-4

-2, -

3, -

4-2

, -3,

-4

Indu

stria

l-L

1, -

2, -

3-L

1, -

2, -

3-L

1, -

2, -

3-L

1, -

2, -

3-L

1, -

2, -

3-L

1, -

2, -

3-L

1, -

2, -

3-L

1, -

2, -

3-2

, -3

-2, -

3-2

, -3

-2, -

3-2

, -3

Con

figur

atio

nC

onfig

urat

ion

Mem

ory

(Mbi

ts)

2.7

2.7

2.7

4.4

7.7

19.6

17.1

28.0

4.4

7.7

19.6

17.1

28.0

Pack

age

Are

aM

axim

um U

ser I

/O: S

elec

tIO™

Inte

rface

Pin

s (G

TP T

rans

ceive

rs)(7

)

Chi

p S

cale

Pac

kage

s (C

PG

): Pb

-free

wire

-bon

d B

GA

(0.5

mm

bal

l spa

cing

)

CP

G19

68

x 8

mm

106

106

106

TQFP

Pac

kage

s (T

QG

): Pb

-free

thin

QFP

(0.5

mm

bal

l spa

cing

)

TQG

144

20 x

20

mm

102

102

Chi

p S

cale

Pac

kage

s (C

SG

): Pb

-free

wire

-bon

d ch

ip s

cale

BG

A (0

.8 m

m b

all s

paci

ng)

CS

G22

513

x 1

3 m

m13

216

016

0

CS

G32

415

x 1

5 m

m20

023

222

621

819

0 (2

)19

0 (4

)

CS

G48

419

x 1

9 m

m32

032

833

833

829

0 (4

)29

2 (4

)29

6 (4

)29

6 (4

)

FGA

Pac

kage

s (F

TG):

Pb a

nd P

b-fre

e w

ire-b

ond

fine-

pitc

h th

in B

GA

(1.0

mm

bal

l spa

cing

)

FT(G

)256

17 x

17

mm

186

186

186

FGA

Pac

kage

s (F

GG

): Pb

and

Pb-

free

wire

-bon

d fin

e-pi

tch

thin

BG

A (1

.0 m

m b

all s

paci

ng)

FG(G

)484

23 x

23

mm

266

316

280

326

338

250

(2)

296

(4)

268

(4)

296

(4)

296

(4)

FG(G

)676

27 x

27

mm

358

40

84

80

49

83

48

(8)

376

(8)

39

6 (8

)

FG(G

)900

31 x

31

mm

576

49

8 (8

)5

40

(8)

Not

es:

1. E

ach

Spa

rtan-

6 FP

GA

CLB

con

tain

s fo

ur L

UTs

and

eig

ht fl

ip-fl

ops.

2.

Spa

rtan-

6 FP

GA

logi

c ce

ll ra

tings

refle

ct th

e in

crea

sed

logi

c ca

paci

ty o

ffere

d by

the

new

6-in

put L

UT

arch

itect

ure.

3.

Blo

ck R

AM

S a

re fu

ndam

enta

lly 1

8Kb

in s

ize. E

ach

bloc

k ca

n al

so b

e us

ed a

s tw

o in

depe

nden

t 9Kb

blo

cks.

4.

Eac

h C

MT

cont

ains

two

DC

Ms

and

one

PLL

.

5. E

ach

DS

P48A

1 sl

ice

cont

ains

an

18x1

8 m

ultip

lier,

an a

dder

and

an

accu

mul

ator

.

6. P

relim

inar

y pr

oduc

t inf

orm

atio

n, s

ubje

ct to

cha

nge.

Ple

ase

cont

act y

our X

ilinx

repr

esen

tativ

e fo

r the

late

st in

form

atio

n.

7. D

ue to

the

trans

ceive

rs in

the

LXT

devic

es, t

he L

X pm

outs

are

not

com

patib

le w

ith th

e LX

dev

ice

pino

uts.

XIL

INX

SPA

RTA

N®�6

FA

MIL

Y F

PG

AS

Impo

rtant

: Ver

ify a

ll da

ta in

this

doc

umen

t with

the

devi

ce d

ata

shee

ts fo

und

at w

ww

.xili

nx.c

om

Spar

tan-

6 Fa

mil

y FP

GAs

Xil

inx

FP

GA

s

De

ve

lop

me

nt T

oo

ls

3

Part

Num

ber

Easy

Path

™ F

PG

A C

ost R

educ

tion

Sol

utio

ns (1

)

Logi

c C

ells

(3)

XC6V

LX75

T

11,6

40

XCE6

VLX7

5T

74,4

96

XC6V

LX13

0T

20,0

00

XCE6

VLX1

30T

128,

000

XC6V

LX19

5T

31,2

00

XCE6

VLX1

95T

199,

680

XC6V

LX24

0T

37,6

80

XCE6

VLX2

40T

241,

152

Slic

es (2

)

Logi

c R

esou

rces

XC6V

LX36

5T

56,8

80

XCE6

VLX3

65T

364,

032

XC6V

LX55

0T

85,9

20

XCE6

VLX5

50T

549,

888

XC6V

LX76

0

118,

560

XCE6

VLX7

60

758,

784

XC6V

SX31

5T

49,2

00

XCE6

VSX3

15T

314,

880

XC6V

SX47

5T

74,4

00

XCE6

VSX4

75T

476,

160

Virt

ex-6

LX

T FP

GA

sO

ptim

ized

for H

igh-

perfo

rman

ce L

ogic

and

DS

P w

ith L

ow-p

ower

Ser

ial C

onne

ctiv

ity

(1.0

Vol

t, 0.

9 Vo

lt)

Virt

ex-6

SX

T FP

GA

sO

ptim

ized

for U

ltra

Hig

h-pe

rform

ance

DS

P w

ith

Low

-pow

er S

eria

l Con

nect

ivity

(1

.0 V

olt,

0.9

Volt)

Virt

ex-6

HX

T FP

GA

sO

ptim

ized

for C

omm

unic

atio

ns S

yste

ms

Req

uirin

g H

ighe

st-b

andw

idth

Ser

ial C

onne

ctivi

ty

(1.0

Vol

t)

CLB

Flip

-Flo

ps

Max

imum

Dis

tribu

ted

RA

M (K

bits

)

Blo

ck R

AM

/FIF

O w

/ EC

C (3

6Kbi

ts e

ach)

Tota

l Blo

ck R

AM

(Kbi

ts)

Mixe

d M

ode

Clo

ck M

anag

ers

(MM

CM

)

DS

P48E

1 S

lices

10/1

00/1

000

Ethe

rnet

MAC

Blo

cks

GTX

Low

-Pow

er T

rans

ceive

rs

93,1

20

1,04

5

156

5,61

6

6 288 4

160,

000

1,74

0

264

9,50

4

10 480 4

249,

600

3,04

0

344

12,3

84

10 640 4

301,

440

3,65

0

416

14,9

76

12 768 4

Mem

ory

Res

ourc

es

Clo

ck R

esou

rces

I/O R

esou

rces

(4, 5

)

Embe

dded

Har

d IP

Res

ourc

es (6

)

PC

I Exp

ress

® In

terfa

ce B

lock

s1

22

2

455,

040

4,13

0

416

14,9

76

12 576 42

687,

360

6,20

0

632

22,7

52

18 864 42

948,

480

8,28

0

720

25,9

20

18 864 – ––

393,

600

5,09

0

704

25,3

44

12

1,34

4

42

595,

200

7,64

0

1,06

4

38,3

04

18

2,01

6

4

24362

29 x

29

mm

FF78

4

Com

mer

cial

360

(12,

0)

-L1,

-1, -

2, -3

400

(12,

0)

-L1,

-1, -

2, -3

400

(12,

0)

400

(12,

0)

-L1,

-1, -

2, -3

Con

figur

atio

n M

emor

y (M

bits

)25

.041

.758

.7

720

(24,

0)

-L1,

-1, -

2, -3

70.4

Spe

ed G

rade

s

Con

figur

atio

n

42.5

x 4

2.5

mm

FF17

60

35 x

35

mm

FF11

54

35 x

35

mm

FF11

55

45 x

45

mm

FF19

23

45 x

45

mm

FF19

24

23 x

23

mm

FF48

424

0 (8

, 0)

240

(8, 0

)

600

(20,

0)

600

(20,

0)

600

(20,

0)

Indu

stria

l-L

1, -1

, -2

-L1,

-1, -

2-L

1, -1

, -2

-L1,

-1, -

2

720

(24,

0)

-L1,

-1, -

2, -3

91.6

600

(20,

0)

-L1,

-1, -

2

840

(36,

0)

-L1,

-1, -

2

137.

4

1,20

0 (0

, 0)

320

(48,

0)

320

(48,

0)

480

(24,

24)

440

(24,

12)

720

(40,

24)

640

(48,

24)

440

(24,

12)

720

(40,

24)

640

(48,

24)

-L1,

-1

-L1,

-1, -

2

176.

3

1,20

0 (0

, 0)

-L1,

-1

720

(24,

0)

-L1,

-1, -

2, -3

99.6

600

(20,

0)

-L1,

-1, -

2

840

(36,

0)

-L1,

-1, -

2

149.

4

600

(20,

0)

-L1,

-1

XC6V

HX2

50T

39,3

60

XC6V

HX2

50T

251,

904

XC6V

HX2

55T

39,6

00

XC6V

HX2

55T

253,

440

XC6V

HX3

80T

59,7

60

XC6V

HX3

80T

382,

464

XC6V

HX5

65T

88,5

60

XC6V

HX5

65T

566,

784

314,

880

3,04

0

504

18,1

44

12 44

316,

800

3,05

0

516

18,5

67

12 22

478,

080

4,57

0

768

27,6

48

18 44

708,

480

6,37

0

912

32,8

32

18

320

480

720

720

160

240

360

360

576

576

864

864 4

4824

48484

-1, -

2, -3

76.2

-1, -

2

-1, -

2, -3

76.2

-1, -

2

-1, -

2, -3

114.

2

-1, -

2

-1, -

2

153.

2

-1

35

x 35

mm

FF11

56

42.5

x 4

2.5

mm

FF17

59

FFA

Pac

kage

s (F

F): fl

ip-c

hip

fine-

pitc

h B

GA

(1.0

mm

bal

l spa

cing

)

Pack

age (7

)A

rea

Max

imum

Sin

gle-

Ende

d I/O

Max

imum

Diff

eren

tial I

/O P

airs

360

180

600

300

600

300

720

360

720

360

1,20

0

600

1,20

0

600

720

360

840

420

1220

2024

2436

GTH

Hig

h-S

peed

Tra

nsce

iver

s–

––

–24

2424

––

––

––

Avai

labl

e U

ser I

/O: S

elec

tIO P

ins

(4, 5

) (G

TX L

ow-p

ower

Tra

nsce

ivers

, GTH

Hig

h-sp

eed

Tran

scei

vers

)

Not

es:

1. E

asyP

ath™

sol

utio

ns p

rovid

e a

conv

ersi

on-fr

ee, l

ow-r

isk

path

for v

olum

e pr

oduc

tion.

2.

A s

ingl

e Vi

rtex-

6 FP

GA

CLB

com

pris

es tw

o sl

ices

, with

eac

h co

ntai

ning

four

6-in

put L

UTs

and

eig

ht F

lip-F

lops

(tw

ice

the

num

ber f

ound

in a

Virt

ex-4

FP

GA

slic

e), f

or a

tota

l of e

ight

6-L

UTs

and

16

Flip

-Flo

ps p

er C

LB.

3. V

irtex

-6 F

PG

A lo

gic

cell

ratin

gs re

flect

the

incr

ease

d lo

gic

capa

city

offe

red

by th

e 6-

inpu

t LU

T ar

chite

ctur

e.

4. D

igita

lly C

ontro

lled

Impe

danc

e (D

CI)

is a

vaila

ble

on I/

Os

of a

ll de

vices

.

5. I

/O s

tand

ards

sup

porte

d: H

T, L

VCM

OS

(2.5

V, 1

.8V,

1.5

V, 1

.2V)

, HS

TL I

(1.2

V,1.

5V,1

.8V)

, HS

TL II

(1.5

V,1.

8V),

HS

TL II

I (1.

5V,1

.8V)

, LVD

S, E

xten

ded

LVD

S, R

SD

S, B

us L

VDS

, LVP

ECL,

SS

TL I

(1.8

V, 2

.5V)

,

S

STL

II (1

.8V,

2.5

V), S

STL

(1.5

V).

6.

One

sys

tem

mon

itor b

lock

incl

uded

in a

ll de

vices

.

7. A

ll pr

oduc

ts a

vaila

ble

Pb-fr

ee a

nd R

oHS

-Com

plia

nt (F

FG).

8.

Pre

limin

ary

prod

uct i

nfor

mat

ion,

sub

ject

to c

hang

e. P

leas

e co

ntac

t you

r Xilin

x re

pres

enta

tive

for t

he la

test

info

rmat

ion.

PN

241

6

Virt

ex-6

Fam

ily F

PGA

s

Impo

rtant

: Ver

ify a

ll da

ta in

this

doc

umen

t with

the

devi

ce d

ata

shee

ts fo

und

at w

ww

.xilin

x.com

/virt

ex6

XIL

INX

VIR

TEX

®-6

FA

MIL

Y F

PG

As

� 2

Q20

09

De

ve

lop

me

nt

To

ols

4

Xili

nx D

esig

n To

ols

- IS

E 11

.4

XIL

INX

DE

SIG

N T

OO

LS�I

SE

11.

4

ISE

Des

ign

Sui

teD

evic

e S

uppo

rtIS

E W

ebPA

CK

ISE

Des

ign

Sui

te

Log

ic E

ditio

n

Em

bedd

ed E

ditio

n

DSP

Edi

tion

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Windows® XP Professional 64-bit (US and Japan)

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Windows® Vista Business 64-bit (US and Japan)

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FreeForm/104 for FPGA and Digital I/O

FreeForm/104 is a PC/104 based card that features a reconfigurable FPGA for digital I/O and control applications.

Based on Xilinx’s Spartan-3E, Connect Tech’s FreeForm/104 provides off-the-shelf flexibility, making it ideal for high speed, compute-intensive, reconfigurable applications. The FPGA configuration is stored in flash memory, allowing users to easily implement design changes duringdevelopment or in the field.

Customized FPGA configurations can be developed easily by the user with Xilinx’s free ISE WebPACK software, or through Connect Tech’s engineering services.

The versatility and high speed processing core of the FreeForm/104 makes it ideal for applications including; DSP, software defined radio, aerospace, defense systems, computer hardware emulation, production or laboratory testing and industrial process monitoring and control.

Part Number FPGA Price

FBG001 Digital I/O $295.00

FBG006 Digital I/O Opto-22 $326.00

Key Features

Customizable PC/104 board based on Xilinx’s Spartan-3E - 500,000 gates

FPGA configurable through JTAG or SPI flash (4Mb)

Reprogrammable in the field for standard and custom designs

External 5V power connection for stand alone usage

Four user configurable LEDS and on-board reset switch

Eight position rotary switch connected to FPGA

Standard FPGA Configurations

Digital I/O:

96 digital I/O (8255 compatible), 6 x 8254 counter/timers

Digital I/O Opto-22:

48 Opto-22 (8255 compatible, 6 x 8254 counter/timers

Custom Configurations

Custom configurations can be easily developed by user or through Connect Tech’s engineering services

Specifications

Programmable FPGA Xilinx Spartan-3E - 500,000 gates, 360K RAM

Input Clock 66 MHz, internally scaleable

FPGA Code Storage

4 Mbit SPI Flash

Connectors

2 x 50 pin header - 48 regrogammable 5V buffered I/O +/- 24mA drive current, each connector has 5V power and a ground pin1 x 26 pin header - 6 bi-directional pins, 12 input pins, 6 ground pins, unbuffered 5V TTLPC/104 header - fully bi-directional, configurable as a master or a slave, 8 bit I/O, 12 address bits, all IRQ’s are connected, DMA’s 0-3

Programmable I/O

96 high current TTL/CMOS (48 per 50 pin connector), 6 TTL (26 pin connnector)

Fixed I/O 12 TTL inputs (26 pin connector)

Interrupts All PC/104 interrupts are connected to the FPGA

EnvironmentalOperating Temperature (standard): 0º C to 70º C (32º F to 158º F)Industrial Temperature: -40º C to 85º C (-40º F to 185º F)Humidity: 95% non-condensing

PowerRequirements

+5 V DC (+/- 5%)

DimensionsLength: 9.5885 cm/3.775”Width: 9.017 cm/3.55”

Bus PC/104 compatible or stand alone

SystemRequirements

Varies by configuration

Warranty Lifetime warranty and free technical support

Nu Horizons offers a wide range of Xilinx development/evaluation boards, tools and kits. For more information, please visit http://uk.nuhorizons.com/development/Xilinx/

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FreeForm/PCI-104 is a flexible reconfigurable board that combines a user

programmable FPGA with a 32-Bit, 33MHz PCI-104 interface. The advantages

of PCI-104’s high bandwidth along with the versatile FPGA architecture

allows users to create a high speed data interface and control solution that is

uniquely suited to each individual application.

Based on Xilinx’s Virtex®-5, Connect Tech’s FreeForm/PCI-104 is highly

versatile and provides a powerful platform for system development. Ideal

for real-time data acquisition, high performance signal processing, avionics,

autonomous vehicles and software defined radio, FreeForm/PCI-104 is

perfect for embedded systems designs when used along with an embedded

host processor.

Use Connect Tech’s engineering services for FPGA design and software/

driver development. FreeForm/PCI-104 Virtex-5 FPGA embedded computing

modules include lifetime warranty and free technical support.

Reconfigurable FPGA - Virtex-5 FPGA based FreeForm/PCI-104


FCG001 LX30T $1499.00

FCG003 FX30T $2112.00

FCG005 LX50T $2234.00

Specifications

Programmable FPGA Xilinx multi-platform Virtex-5 (LXT or FXT)

Input Clock 100 MHz

Memory 8MB Flash, 128MB DDR2-400

User I/O 64 single ended signals or 32 LVDS pairs

Serial 2 x RS-485

Ethernet 2 x 10Base-T, 100Base-TX

Form Factor PCI-104

EnvironmentalIndustrial Temperature: -40º C to 85º C (-40º F to 185º F)Humidity: 95% non-condensing

EmbeddedSoftware Support

QNX

Host System Software Support

QNX, Windows, Linux

Power Requirements

5 V DC (+/- 5%)Note - power requirements may vary by application

DimensionsPCI-104 1.0 compliantL: 3.775” x W: 3.575” x H: 0.535”

Connectors

Two RJ-45 modular jacks (Ethernet)Two 2x5 0.100” headers (serial)One 2x40 0.050 x 0.100” header (general I/O)One 1x6 0.100” header (flash programming)

Warranty Lifetime warranty and free technical support

FPGA & I/O Key Features

Based on the Virtex-5 FPGA - options include LX30T, LX50T and FX30 T

PCI-104 form factor - 32-Bit/33MHz

8MB Flash for embedded code storage

128MB DDR2-400 memory

2 x 10Base-T, 100Base-TX Ethernet

2 x RS-485 serial interface

GPIO - 64 single ended or 32 LVDS pairs

4 x RocketIO™ channels

Industrial temperature range

MicroBlaze™ and PowerPC™ 440 embedded processor options

Access to reference designs and BSPs


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FCG001 LX30T $1499.00

FCG003 FX30T $2112.00

FCG005 LX50T $2234.00

Faster Technology develops high-performance Xilinx

FPGA solutions that maximize processing throughput

while minimizing latency. We are a Xilinx Alliance Program

Partner, an Impulse Platform Partner, and member

of both the Xilinx SignOnce IP License and SignOnce

Services Agreement Programs. Faster Technology is also

the Xilinx ATP for the South Central and Rocky Mountain

territories. Information on Faster Technology products is

available at www.fastertechnology.com.

High-performance Xilinx FPGA solutions

FM-S14 and FM-S18 High Speed serial interface FMC modulesThe FM-S14 and FM-S18 are Xilinx compliant FPGA Mezzanine Card (FMC) modules that provide up to four or eight industry standard Small Form-factor Pluggable (SFP/SFP+) transceiver modules. The FM-S14 and FM-S18 are electrically compliant with the FMC standard but due to the size of the SFP cages, they are classified as a mechanical superset of the FMC.

Features: Interfaces directly into Multi-Gigabit Transceivers (GTHs, GTXs, or GTPs) Utilize 2.5V signaling to ensure interoperability across the Spartan-6, Virtex-6 FPGA families and previous generations of the Virtex family Compliant with both the Xilinx EK-S6-SP605-G and EK-V6- ML605-G development boards FM-S14 $450 (4 SFP/SFP+ transceiver modules) FM-S18 $590 (8 SFP/SFP+ transceiver modules)

FM-S22 10 Gigabit High Speed serial interface FMC moduleThe FM-S22 is a Xilinx compliant FPGA Mezzanine Card (FMC) module that provides dual 10 Gigabit Ethernet and related high speed serial interfaces to the FMC carrier card. The FM-S22 is electrically compliant with the FMC standard but due to the size of the SFP cages, it is classified as a mechanical superset of the FMC mechanical standards.

Features: Utilizes two Small Form-factor Pluggable + (SFP+) transceiver module interfaces and physical layer devices from Marvell Utilize 2.5V signaling to ensure interoperability across the Spartan-6, Virtex-6 FPGA families, and previous generations of the Virtex family Compliant with the Xilinx EK-V6-ML605-G development board FM-S22 $875 Note: SFP/SFP+ modules are sold separately

P-Series – Programmable PCI FPGA Acceleration CardsThe P-Series is a complete line of PCI FPGA cards designed to be generic platforms that can be molded to fit specific FPGA acceleration or low latency needs. They excel at solving a wide range of DSP and algorithm acceleration problems. A suite of IP cores and the innovative FastFlow development environment are included to accelerate deployment of complex algorithm processing systems.

Features: Xilinx Virtex-4 FPGA, Up to 2 GB on-board memory High-bandwidth busses Flexible I/O options Small Form-factor Pluggable (SFP/SFP+) modules that providing interface to: Gigabit Ethernet Fiber channel Infiniband SONET The P-series is available with a choice of the Virtex-4 FX40, FX60, or FX100 FPGA P4 $6,500 (populated with FX40) P6 $7,200 (populated with FX60) P10 $8,200 (populated with FX100)

FPGA & I/O Key Features

Based on the Virtex-5 FPGA - options include LX30T, LX50T and FX30 T

PCI-104 form factor - 32-Bit/33MHz

8MB Flash for embedded code storage

128MB DDR2-400 memory

2 x 10Base-T, 100Base-TX Ethernet

2 x RS-485 serial interface

GPIO - 64 single ended or 32 LVDS pairs

4 x RocketIO™ channels

Industrial temperature range

MicroBlaze™ and PowerPC™ 440 embedded processor options

Access to reference designs and BSPs


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Spartan-6 FPGA Consumer Video Kit

Speed up development of video algorithms and incorporate the

latest video interface standards right out of the box. The Spartan-6

FPGA Consumer Video Kit is a comprehensive design environment

for developing and debugging advanced video algorithms —

featuring FMC option boards* and pre-validated cores for emerging

and de facto high speed display interfaces like DisplayPort™,

V-by-One® HS, HDMI™ 1.3 and 1.05Gbps LVDS. DTV designers

can quickly verify algorithms and test new interfaces, enabling

faster time to market with differentiated video products.

Part Number Price

TB-6S-CVK-FND $1,395.00

Part Number Price

TB-6S-CVK-PRO $2,995.00

Key Hardware Features

Spartan-6 LX150T-3C FPGA

1 x High Pin Count (HPC) FMC connector with up to eight GTP

connections. Note: All HPC pins are not connected to the FPGA.

3 x Low Pin Count (LPC) FMC connectors

2 x DDR2 SDRAM (Chip): (2Gbits x 2) 800Mbps

Multiple clock sources

Xilinx Platform Cable USB-II

Foundation Edition Includes:

RoHS compliant Spartan-6 LX150T video evaluation base board

FMC Option Boards:

LVDS

ISE® Design Suite: Logic Edition (device-locked for the Spartan-6 LX150T FPGA)

PlanAhead™ Design Analysis Tool – Streamlined design process between synthesis and place-androute and intuitive IO planning

Timing Driven Place and Route – Optimal quality of results with advanced implementation algorithms

SmartGuide™ - Industry’s fastest incremental implement runtimes

SmartXplorer Technology – Leverage computing resources for optimal quality of results

ISE Simulator – RTL simulation environment

ChipScope™ Pro and ChipScope Pro Serial IO Toolkit – On-chip design verification for logic and serial connectivity analysis and measurement

Pro Edition Includes:

RoHS compliant Spartan-6 LX150T video evaluation base board

FMC Option Boards: LVDS V-by-One HS DisplayPort HDMI 1.3

ISE Design Suite: Embedded Edition (device-locked for the Spartan-6 LX150T FPGA)

PlanAhead™ Design Analysis Tool – Streamlined design process between synthesis and place-and-route and intuitive IO planning

Timing Driven Place and Route – Optimal quality of results with advanced implementation algorithms

SmartGuide™ - Industry’s fastest incremental implement runtimes

SmartXplorer Technology – Leverage computing resources for optimal quality of results

ISE Simulator – RTL simulation environment

ChipScope™ Pro and ChipScope Pro Serial IO Toolkit – On-chip design verification for logic and serial connectivity analysis and measurement

Evaluation version of DisplayPort LogiCORE IP

Evaluation version of V-by-One HS core

* - see page 10 for Inrevium FMC option boards


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Virtex-6 PCI Express Evaluation Platform

Other Inrevium Products

Key Features

FPGA Options

LX240T

LX365T

LX550T

SX475

Part Numbers TB-6V-LX240T-PCIEXP TB-6V-LX365T-PCIEXP TB-6V-LX550T-PCIEXP TB-6V-SX475T-PCIEXP

3 FMC Connectors

2 High Pin Count

1 Low Pin Count

DDR3 (1066 MHz)

Linear Technology Power Supply

Call Nu Horizons for pricing

Inrevium Virtex-5 DDR SDRAM Evaluation Board Inrevium Virtex-5 DDR SDRAM Evaluation Board

TB-5V-LX110-DDR2 $2680

TB-5V-LX220-DDR2 $4980

TB-5V-LX330-DDR2-1 $9980

TB-5V-LX330-DDR2-2 $9980

Inrevium Virtex-5 LX330 Evaluation Platform for Asic Prototyping TB-5V-LX330-EX-2 $16800

TB-5V-SX95T4-HSC $24900

Virtex-5 PCI Express Evaluation Board TB-5V-LX50T-PCIEXP $2380

TB-5V-LX110T-PCIEXP $3680

TB-5V-SX50T-PCIEXP $2380

TB-5V-FX70T-PCIEXP $3760

TB-5V-LX330T-PCIE-EX $14980


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Inrevium FMC Daughter Cards

LVDS Option Board

FMC Low Pin Count Connector

HRS FX15 series (51pins) connector x2

Data 12 pair, Clock 1 pair per connector

Selectable Power Output to Panel

V-by-One HS Option Board

FMC High Pin Count Connector

HRS FX16 series (31pins) connector x4

Tx: 4ch x2, Rx: 4ch x2

Selectable Power Output to Panel

DisplayPort Option Board

FMC High Pin Count Connector

Receive: 4 ch

Transmit: 4 ch

HDMI Option Board

FMC Low Pin Count

External HDMI 1.3 Tx and Rx LSIs (non-HDCP)

Spartan-3AN for Controller

Selectable Tx or Rx by Dip switch

Part Number Price

TB-FMCH-DP $495.00

Part Number Price

TB-FMCL-HDMI $495.00

Part Number Price

TB-FMCH-VB1 $495.00

Part Number Price

TB-FMCL-LVDS $295.00


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Linear Technologies newest high

speed ADC family achieves one-third

the power consumption of alternate

solutions without compromising AC

performance. Operating from a low

1.8V supply, the 14-bit, 125Msps

LTC®2175 dissipates only 140mW/

channel while maintaining 73.1dB

SNR and 88dB SFDR at baseband.

Digital outputs can be configured

as single lane (<65Msps) or dual

lane serial LVDS to minimize FPGA

pin count.

LTC2175 14-Bit/12-Bit 25Msps to 125Msps Quad/Dual ADC Family

Key Features

Quad/Dual-Channel Simultaneous Sampling ADCs (LTC2175/LTC2268)

73.1dB SNR (14-Bit Resolution)

88dB SFDR

Low Power: 558mW (140mW/Channel) at 125Msps (LTC2175)

Single 1.8V Analog & Digital Supplies

Serial LVDS Outputs

Selectable Input Ranges: 1VP-P to 2VP-P

800MHz Full-Power Bandwidth S/H

Optional Data Output Randomizer

Optional Clock Duty Cycle Stabilizer

1mW Sleep and 50mW Nap Modes

Serial SPI Port for Configuration

Pin-Compatible 14-Bit and 12-Bit Versions

52-Pin (7mm × 8mm) QFN Package (Quad Versions)

40-Pin (6mm × 6mm) QFN Package (Dual Versions)

14-Bit

Quad ADCSerial LVDS Outputs

Dual ADCSerial LVDS Outputs

12-Bit

PowerConsumption

40mW/ch 50mW/ch 80mW/ch 95mW/ch 110mW/ch 140mW/ch

QFN52DS

QFN40

2170-14

2263-14

2171-14

2264-14

2172-14

2265-14

2173-14

2266-14

2174-14

2267-14

2175-14

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2170-12

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2171-12

2264-12

2172-12

2265-12

2173-12

2266-12

2174-12

2267-12

2175-12

2268-12

25Msps 40Msps 65Msps 80Msps 105Msps 125Msps

CH1

1.8V 1.8V

LTC2175-14

OUT1A

OUT1B

OUT2A

OUT2B

OUT3A SERIALIZEDLVDSOUTPUTSOUT3B

OUT4A

OUT4B

DATA CLOCK OUT

FRAME

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CH4

ENCODEINPUT

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14-Bits125Msps

14-Bits125Msps

14-Bits125Msps

PLL

S/H

S/H

S/H

S/H

DATASERIALIZER

140mW/Channel

14-Bit

Quad ADCSerial LVDS Outputs

Dual ADCSerial LVDS Outputs

12-Bit

PowerConsumption

40mW/ch 50mW/ch 80mW/ch 95mW/ch 110mW/ch 140mW/ch

QFN52DS

QFN40

2170-14

2263-14

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2265-12

2173-12

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25Msps 40Msps 65Msps 80Msps 105Msps 125Msps

CH1

1.8V 1.8V

LTC2175-14

OUT1A

OUT1B

OUT2A

OUT2B

OUT3A SERIALIZEDLVDSOUTPUTSOUT3B

OUT4A

OUT4B

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CH4

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14-Bits125Msps

14-Bits125Msps

14-Bits125Msps

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S/H

S/H

S/H

S/H

DATASERIALIZER

140mW/Channel


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PLDA designs and sells a wide range of FPGA interconnect solutions including bus controllers and SoC IP. The company offers complete solutions including

semiconductor IP, hardware, software, and design services. Founded in 1996, PLDA is privately owned.

PLDA: Providing IP and Prototyping boards for PCI Express and USB Solutions

Spartan-3 Spartan-6 Virtex-4 Virtex-5 Virtex-6

DMA Controller for PCIe Integrated Block

PCI, PCI-X

PCIe 1.0 and 2.0

USB 3.0

Key Features

IP is delivered in fully synthesizable Verilog and VHDL RTL

Comprehensive event-based/procedure-based Testbench

Extensive interoperability tests and hardware tests with all the supported FPGA Hard IPs. Guaranties seamless integration

Professional services to customize our IP to fit any specific requirement

Our IP customization GUI (Wizard) allows you to create a custom instance of the IP with only the required feature set

Free evaluation that includes the same deliverables and technical support as the licensed IP

Prototyping boards:

PCI, PCI-X and PCI Express:

XpressGEN2V5-200 for Virtex-5 FX200

XpressGEN2V5-70 for Virtex-5 FX70

XpressLX330T for Virtex-5 LXT

XpressLX110T for Virtex-5 LXT

XpressV5LC for Virtex-5 LXT

XpressFX for Virtex-4 FX

PCI-X SYS V5 for Virtex-5 LX

PCI, PCI-X and PCI Express:

SuperUSBV5-70 based on Xilinx’s Virtex-5 FX70T

SuperUSBV5-200 based on Xilinx’s Virtex-5 FX200T

And a wide range of daughterboards (SFP, Cameralink, PCI Express Cable …)

IP Cores:

PLDA offers comprehensive intellectual property (IP) solutions to a global market:


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Virtex-6 FPGA ML605 Evaluation Kit

The Virtex®-6 FPGA ML605 Evaluation Kit provides a development environment for system designs that demand high-performance, serial connectivity

and advanced memory interfacing. The ML605 is supported by pre-verified reference designs and an industry-standard FPGA Mezzanine Connector

(FMC) which allows scaling and customization with daughter cards. Integrated tools help streamline the creation of elegant solutions to complex design

requirements.

Key Features:

FPGA: XC6VLX240T-1FFG1156 Configuration Onboard configuration circuitry (USB to JTAG) 128MB Platform Flash XL

32MB Parallel (BPI) Flash

System ACE 2G Compact FLASH (CF) Card

Communications and Networking 10/100/1000 Tri-Speed Ethernet (GMII, RGMII, SGMII, MII)

SFP transceiver connector

GTX port (TX, RX) with four SMA connectors

USB To UART Bridge

USB Host Port and USB Peripheral Port

PCI Express x8 Edge Connector Memory DDR3 SO-DIMM (512 MB)

Input/Output and Expansion Ports 16x2 LCD character display

DVI Output

User GPIO with two SMA connectors

Two FMC Expansion Ports

High Pin Count (HPC) Low Pin Count (LPC) One GTX Transceiver

Ordering information

Part number— EK-V6-ML605-G Price -- $1,995

What’s Inside the ML605 Evaluation Kit:

ROHS compliant ML605 Base Board including the

XC6VLX240T-1FFG1156 FPGA

FPGA Design Software – A full-seat of Xilinx ISE Design Suite:

Logic Edition – Device-Locked to Virtex-6 LX240T FPGA.

Targeted Reference Designs

PCI Express Gen2 (x8)

PCI Express Gen 1 (x8)

Base Reference Design

DDR3 Memory Interface

IBERT

Multiboot

Documentation Cables & Power Supply 12V Universal Power Supply

Two USB Cables

One Ethernet Cable

DVI To VGA Adapter


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Virtex-6 FPGA Connectivity Kit

The Virtex®-6 FPGA Connectivity Kit is a comprehensive high performance Connectivity Development, Debug and Demonstration platform for high-

bandwidth and high-performance applications in multiple market segments.

The Virtex-6 FPGA Connectivity Kit delivers a fully validated and supported Targeted Reference Design Framework that integrates built-in blocks for GTX

transceivers and PCI Express, soft IP for XAUI protocol, a high-performance 10G DMA IP core from Northwest Logic and a Virtual FIFO memory controller

interfacing to an external DDR3 memory. The Targeted Reference Design Framework delivers – hardware design / RTL source files, simulation environment,

implementation scripts and design flows. Along with the Linux device drivers, a GUI based software application is also provided.

Each Virtex-6 FPGA Connectivity Kit is a full-seat of Xilinx ISE® Design Suite: Embedded Edition device locked to the Virtex-6 LX240T device.

Key Features:

FPGA: XC6VLX240T-1FFG1156

Serial Connectivity:

PCI Express x8 Edge Connector

SFP transceiver connector (SFP module not included)

On board SMA: 1 SMA port (Tx & Rx) for off-board GTX transceiver connectivity

FMC Daughter Card:

CX4 connectivity

2 SATA connectivity ports

2 SMA ports for off-board GTX transceiver connectivity

Parallel Connectivity:

10/100/1000 Tri-Speed Ethernet (RJ-45)

USB To UART Bridge

USB Host Port and USB Peripheral Port

Memory

DDR3 SO-DIMM (512 MB)

BPI Linear Flash (32 MB) (Also available for configuration)

Additional Connectivity:

FMC Expansion Port: Low Pin Count (LPC)



Part number— DK-V6-CONN-G Price -- $2,995

What’s Inside the Virtex-6 FPGA Connectivity Kit:

ROHS compliant ML605 Base Board including the XC6VLX240T-1FFG1156 FPGA

Vita57.1 FMC daughter card with one CX4, two SATA, and eight SMA connectors

ISE Design Suite 11.4: Embedded Edition; (Device-Locked to Virtex-6 LX240T FPGA)

Documentation

Virtex-6 FPGA Connectivity Kit Getting Started, Hardware Setup Guides, and User Guide.

Example Designs User Guide.

Schematics and PCB files.

Cables & Adapters

Connectivity Targeted Reference Design (TRD) and Demonstration

Design includes support for PCI Express® (x8 Gen1 / x4 Gen2), DMA, Virtual FIFO Memory controller supporting DDR3 interface, and XAUI interface

TRD Design Files including top-level RTL / Source files

TRD ISE Project files, Simulation and Implementation Environment

10G DMA Design – Northwest Logic PCIe Packet DMA (Evaluation hardware timeout version and Simulation Model)

TRD Interface Software – Linux Device Drivers, Application, Demonstration

Examples Designs and Demonstrations

Board Diagnostic Demo

ChipScope Pro Serial IO Toolkit IBERT Transceiver Test Design.


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Virtex-6 FPGA Embedded Kit

Embedded processing using FPGAs have become an integral part of a growing number of applications such as industrial networking and video applications,

as well as closed-loop control systems in the industrial and Aerospace & Defense markets. The combined value of parallel processing performance, design

reuse, the mitigation of design risk and obsolescence, and the lower cost, weight, area and power resulting from the deeper levels of integration (made

even more attractive by the continuing march toward smaller and smaller process nodes) has fueled this trend to a seemingly unavoidable conclusion —

the FPGA is becoming the platform of choice for future embedded design in these markets.

The Virtex®-6 FPGA Embedded Kit is based on the Virtex-6 LX240T FPGA, this kit contains an extensible development board and the key Tools & IP needed

for embedded development. The Reference Designs and software/hardware tutorials provided with this kit will give a jump-start to your development. If you

are a software developer, you can now get started in a familiar Eclipse IDE without running any FPGA hardware design tools.

What’s Inside the Virtex-6 FPGA Embedded Kit:

ROHS compliant ML605 Base Board including the XC6VLX240T-1FFG1156 FPGA

ISE® Design Suite: Embedded Edition (device-locked for the Virtex-6 LX240T FPGA)

Ecosystem OS/RTOS Support

Linux, uC/OS-II, Treck

Documentation

Cables & Power

Targeted Reference Design

MicroBlaze Processor Sub-System design that integrates the following key Embedded processing IP:

32-bit MicroBlaze Soft Processor

Integrated Memory Management Unit (MMU)

16KB Instruction & Data Caches

JTAG Debug interface

100Mhz clock frequency

Memory

Multi-Port Memory Controller (MPMC) connected to 128 MB of 800 Mbps DDR3 memory

Flash memory controllers connected to 32Mbytes of NOR Flash memory

High-Performance I/O Peripherals

Gigabit Ethernet (Tri-Mode Ethernet MAC –TEMAC)

UART 16550

I2C, SPI – Serial Interface IP

General Purpose Parallel I/O

Infrastructure IP

Dual 32-bit Timers

Interrupt Controller

Bus infrastructure, Clock and Reset Management IP


Part number— DK-V6-EMBD-G Price -- $2,495

Features:

Targeted Reference Design – MicroBlaze Processor Sub-System

Includes all the development tools needed to support Embedded Hardware & Software Development

In-depth step-by-step Hardware and Software Tutorials

Strong Ecosystem support


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Spartan-6 FPGA SP605 Evaluation Kit

The Spartan®-6 FPGA SP605 Evaluation Kit delivers all the basic components of the Xilinx Base Targeted Design Platform in one package. It provides a

flexible environment for system design and provides customers reference design and examples on how to leverage features such as high-speed serial

transceivers, PCI Express®, DVI, and/or DDR3. It includes an industry-standard FMC (FPGA Mezzanine Card) connector for future scaling and customization

to specific applications and markets.

Key Features:

FPGA: XC6SLX45T FGG484-3CES Spartan-6

Configuration:

Onboard JTAG configuration circuitry

128MB Platform Flash XL

Quad SPI Flash 64MB

16MB Parallel (BPI) Flash

System ACE 2G Compact FLASH (CF) Card

JTAG

Memory:

DDR3 Component Memory 1Gb

16MB Parallel (BPI) Flash (Also available for configuration)

IIC 8Kb IIC EEPROM

Communications and Networking

10/100/1000 Tri-Speed Ethernet

SFP transceiver connector

GTX port (TX, RX) with four SMA connectors

USB To UART Bridge


Expansion Connectors:

FMC-LPC connector (1 GTP Transceiver, 68 single-ended or 34 differential user defined signals)


4 User I/O (Digilent 2x6 Header)

Clocking:

200 MHz Oscillator (Differential)

Oscillator socket (Single-Ended)

SMA Connectors for external clock (Differential)

GTX Reference Clock port with 2 SMA connectors

Display:

Video - DVI / VGA

16x2 LCD character display

4X LEDs


Part number— EK-S6-SP605-G Price -- $495

What’s Inside the SP605 Evaluation Kit:

SP605 Base Board with the XC6LX45T-FGG484 FPGA

ISE® Design Suite Logic Edition: (device-locked) for Spartan-6 LX45T FPGA

Includes ChipScope™ Pro and the ChipScope Pro Serial I/O Toolkit

Includes PlanAhead™ Design Analysis Tool

Timing Driven Place and Route, SmartGuide™, and SmartXplorer Technology

Documentation

Hardware Setup Guide

Getting Started Guide

Hardware User Guide

Reference Designs User Guide

Schematics and PCB files

Universal 12V power supply

Cables: 2 USB, 1 Ethernet, 1 DVI-VGA adapter

Reference Designs and Demos


Base System Reference Design featuring DSP48, Ethernet, Memory, and Serial Transceiver integration

Multiboot Reference Design, featuring fail-safe configuration

Hardened Memory Controller Reference Design

Reference designs, demos, documentation, and applications delivered on USB FLASH drive to get started quickly

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Spartan-6 FPGA Connectivity Kit

The Spartan®-6 FPGA Connectivity kit is a complete, easy-to-use Connectivity Development and Demonstration platform for designing with standards

based protocols – PCIe®, Ethernet, implementing low-cost protocol bridging, providing higher efficiency alternative to LVDS communication, etc in multiple

market segments.

Provided with each Spartan-6 FPGA Connectivity Kit is a FULL seat of Production Netlist of Northwest Logic Packet DMA IP Core for implementing high

speed and maintaining efficient data transfer on the PCIe link.

The Spartan-6 FPGA Connectivity Kit delivers a fully tested and supported Connectivity Targeted Reference Design that integrates built-in blocks for PCI

Express and Memory Controller, soft IP for Gigabit Ethernet and the DMA IP core from Northwest Logic. The Targeted Reference Design is a framework that

delivers – hardware design / RTL source Files, simulation environment, implementation scripts and design flows, software device drivers, an application

and a GUI.

Key Features:

FPGA: XC6SLX45T FGG484-3CES Spartan-6 Configuration:

Serial Connectivity:


VSFP transceiver connector (SFP module not included)

VSMA: 1 SMA port (Tx & Rx) for off-board GTP transceiver connectivity

Parallel Connectivity

V10/100/1000 Tri-Speed Ethernet

Memory:

VDDR3 Component Memory 1Gb

V16MB Parallel (BPI) Flash (Also available for configuration)

VIIC 8Kb IIC EEPROM

Additional Connectivity:

VFMC-LPC connector (1 GTP Transceiver, 68 single-ended or 34 differential user defined signals)

VUser GPIO with two SMA connectors

V4 User I/O (Digilent 2x6 Header)

Voltage and current measurement capability of 2.5V, 1.5V, and 1.2V, 1.0V supplies


Part number— DK-S6-CONN-G Price -- $2,495

What’s Inside the Spartan-6 FPGA Connectivity Kit:

ROHS compliant SP605 Base Board including the XC6SLX45T-FGG484 -3CES FPGA

ISE Design Suite: Embedded Edition (device-locked for the Spartan-6 LX45T FPGA)

Documentation

Spartan-6 FPGA Connectivity Kit Getting Started, Hardware Setup Guide and User’s Guide.

Example Designs User Guide.

Schematics and PCB files

Cables & Adapter

Connectivity Targeted Reference Design (TRD) and Demonstration

Design includes support for PCI Express (x1 Gen1), DMA, Virtual FIFO Memory controller supporting DDR3 interface, and Gigabit Ethernet (GMII and SFP interfaces)

TRD Design Files including top-level RTL / Source files

TRD ISE Project files, Simulation and Implementation Environment

DMA Design – Northwest Logic PCIe Packet DMA (Full production version and Simulation Model)

TRD Interface Software – Linux Device Drivers, Application, Demonstration

Examples Designs and Demonstrations


ChipScope Pro Serial IO Toolkit IBERT Transceiver Test Design

Fedora 10 Live CD - Linux Operating System

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Embedded processing using FPGAs have become an integral part of a growing number of applications such as industrial networking and video applications,

as well as closed-loop control systems in the industrial and Aerospace & Defense markets. The combined value of parallel processing performance, design

reuse, the mitigation of design risk and obsolescence, and the lower cost, weight, area and power resulting from the deeper levels of integration (made

even more attractive by the continuing march toward smaller and smaller process nodes) has fueled this trend to a seemingly unavoidable conclusion—the

FPGA is becoming the platform of choice for future embedded design in these markets.

The Spartan®-6 FPGA Embedded Kit is based on the Spartan-6 LX45T FPGA, this kit contains an extensible development board and the key Tools &

IP needed for embedded development. The Reference Designs and software/hardware tutorials provided with this kit will give a jump-start to your

development. If you are a software developer, you can now get started in a familiar Eclipse IDE without running any FPGA hardware design tools.

What’s Inside the Spartan-6 FPGA Embedded Kit:

ROHS compliant SP605 Base Board including the XC6SLX45T-FGG484 -3 FPGA

ISE® Design Suite: Embedded Edition (device-locked for the Spartan-6 LX45T FPGA)

Ecosystem OS/RTOS Support

Linux, uC/OS-II, Treck

Documentation

Cables & Power

Targeted Reference Design

MicroBlaze Processor Sub-System design that integrates the following key Embedded processing IP:

32-bit MicroBlaze Soft Processor

Integrated Memory Management Unit (MMU)

16KB Instruction & Data Caches

JTAG Debug interface

100Mhz clock frequency

Memory

Multi-Port Memory Controller (MPMC) connected to 128 MB of 800 Mbps DDR3 memory

Flash memory controllers connected to 32Mbytes of NOR Flash memory

High-Performance I/O Peripherals

Gigabit Ethernet (Tri-Mode Ethernet MAC – TEMAC

UART 16550

I2C, SPI – Serial Interface IP

General Purpose Parallel I/O

Infrastructure IP

Dual 32-bit Timers

Interrupt Controller

Bus infrastructure, Clock and Reset Management IP


Part number— DK-S6-EMBD-G Price -- $995

Features:

Targeted Reference Design – MicroBlaze Processor Sub-System

Includes all the development tools needed to support Embedded Hardware & Software Development

In-depth step-by-step Hardware and Software Tutorials

Strong Ecosystem support

Nu Horizons offers a wide range of Xilinx development/evaluation boards, tools and kits. For more information, please visit http://uk.nuhorizons.com/development/Xilinx/18

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Spartan-6 FPGA SP601 Evaluation Kit

Digilent Spartan 6 Evaluation Kit

The Spartan®-6 FPGA SP601 Evaluation Kit is an ideal entry-level development environment for evaluating the Spartan-6 family. This low-cost kit is the

Xilinx Base Platform for developing consumer, infotainment, video and other cost and power-sensitive applications. As a Base Level Targeted Design

Platform, this kit provides an integration of hardware, software, IP and pre-verified reference designs so development can begin right out of the box.

Key Features:

FPGA: XC6SLX16 CS324-2CES Spartan-6 Configuration: Quad SPI Flash 64MB 16MB Parallel (BPI) Flash Memory: DDR2 Component Memory 128MB IIC 8Kb IIC EEPROM Communication: 10/100/1000 Tri-Speed Ethernet PHY Serial (UART) to USB Bridge Expansion Connectors: FMC-LPC connector (68 single-ended or 34 differential user defined signals) 8 User I/O (Digilent 2x6 Header) Clocking: 200MHz Oscillator (Differential) Socket (Single-Ended) Populated with 27MHz Osc SMA Connectors (Differential) Display: 4X LEDs Control: 4X Push Buttons 4X DIP Switches

Key Features:

XC6SL45-3CSG325 Xilinx Spartan 6 FPGA

Micrel KSZ9021 10/100/1000 Ethernet Phy

8 MB FLASH

2 GB DDR2

Linear Technology Power Supply

One input and one output buffered HDMI port

AC97 Codec

Expansion Connectors


Part number— EK-S6-SP601-G Price -- $295


Call your local Nu Horizons sales office

Nu Horizons offers a wide range of Xilinx development/evaluation boards, tools and kits. For more information, please visit http://uk.nuhorizons.com/development/Xilinx/ 19

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FMC XM105 Debug Card

FMC XM104 Connectivity CardThe FMC XM104 Connectivity Card is designed to provide access to eight serial transceivers on the FMC HPC connector found on Xilinx FMC-supported

boards including Virtex®-6 ML605. These eight serial transceivers can be accessed through one CX4 (x4 transceivers), two SATA (x2 transceivers), and

eight SMA (x2 transceivers) connectors.

The FMC XM105 Debug Card provides a number of multi-position headers and connectors which break out FPGA interface signals to and from the board

interface. A serial IIC bus re-programmable LVDS clock source and a pair of SMA connectors provide differential clock sources to the FMC-supported board

FGPA. A 2 Kb serial IIC EEPROM provides non-volatile storage. The FMC XM105 Debug Card contains a FMC HPC connector which mates with LPC or HPC

FMC-supported board connectors.

Key Features:

VITA 57.1 FMC High Pin Count (HPC) connector.

One CX4 connector

Two SATA connectors

Eight SMA connectors

What’s Included:

FMC XM104 Connectivity Card

Four SMA to SMA cables

One SATA cable

Welcome letter

Four (2) mounting screws

Two (2) standoffs

Module user manual, schematics, and PCB design files


Part number— HW-FMC-XM104-G Price -- $595

Key Features:

VITA 57.1 FMC HPC connector Single-ended signals from the carrier board, clocks, JTAG, power

40 Single Ended I/O (20 Pairs) on the LPC Pins 80 Single Ended I/O (40 Pairs) on the HPC Pins Mictor connector 38 pin female Mictor connector Shared I/O with LPC Pins

Mictor JTAG pins broken out

16 and 12 additional LPC Single Ended I/O 8 LPC I/O on 6 pin x 2 row male header (2x6 Pmod Header)

4 LPC I/O on 6 pin x 1 row male header (1x6 Pmod Header)

Four User LEDS Shared with I/O

12 additional HPC Single Ended I/O


Part number— HW-FMC-DBG-G Price -- $159

Nu Horizons offers a wide range of Xilinx development/evaluation boards, tools and kits. For more information, please visit http://uk.nuhorizons.com/development/Xilinx/20

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Enhance Your Design...With Nu Horizons Education and Development Solutions

LabCam delivers online training opportunities in a way that recognizes the value of engineers’ time. As easily as You Tube® videos, engineers can quickly load and watch videos from industry leaders consisting of insights on products, evaluation kit overviews, end-user applications and more. Each tutorial is up to ten minutes in length and features technology experts, CEOs and/or peers introducing new solutions or explaining integral aspects of an important product, solution or application. This free value-added program is packaged for short, informative and high quality distance learning.

Nu Horizons is proud to present our education and training program, which offers engineers the opportunity to participate in technical seminars conducted by experts focused on the latest technologies from our leading suppliers. This program provides higher velocity learning to help minimize start-up time to quickly begin your design process utilizing the latest development tools, software and products. Check online for the latest seminar schedule.

In order to simplify the design process, Nu Horizons has created a series of application notes designed to guide engineers through the process of interfacing different devices together. Using a detailed step-by-step approach, these design guides identify key elements in the design process. Topics in the application notes are organized by design task and each topic is a stand-alone section, with a short introduction or overview, followed by the step-by-step design guidelines. All steps include a sufficient level of detail to provide the designer with relevant information to proceed quickly and easily from start to finish.

Nu Horizons offers a wide range of development / evaluation boards, tools and kits featuring the latest technology from the most trusted suppliers in the industry. Visit the development tool section of our website for a variety of solutions all aimed at providing a low-cost solution for designers to accelerate a product’s time-to-market.

Application Notes

Online Learning Center

DevelopmentTools

Portal is a monthly publication containing new products, technologies and development tools available from Nu Horizons leading suppliers. Portal is availabe both in print and on the web. Sign up online to receive your copy, be notified of upcoming issues or to request samples of the products found inside.

Nu Horizons Online Learning Center is designed to provide a complete training experience for engineers — without having to leave the office. New supplier trainings are posted twice a month and range from new product overviews to in-depth technical training and potential design implementations. These live trainings are recorded and archived for your viewing convenience.

www.nuhorizons.com/olc

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Nu Horizons Electronics Portal Europe - February 2010

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Transcript of Nu Horizons Electronics Portal Europe - February 2010