MOSFET Review and Wrap-Up - nanoHUB/uploads/30... · inversion capacitance in a diode? 3) What is...

Bermel ECE 305 F15

ECE 305: Fall 2015

MOSFET Review and Wrap-Up

Professor Peter BermelElectrical and Computer Engineering

Purdue University, West Lafayette, IN [email protected]

Pierret, Semiconductor Device Fundamentals (SDF)

Chapter 18 (pp. 645-658)

111/20/2015

Outline

Bermel ECE 305 F152

1. Review of Key Principles

2. Major Failure Modes

3. Short Channel Effects

4. Device Variability

5. Improved Mobility

6. Conclusion

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Key Principles in MOSFETs

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• MOSFET basic geometry

• MOS band bending

• MOS junction capacitance

• MOSFET transfer and output characteristics

• MOSFET square law

• MOSFET velocity saturation

MOSFET Geometry

4

gate oxidemetal

p-Si

n+-Si

sourcen+-Si

drain

MOS capacitor

VG

VD > 0VS = 0

ID

“channel”

L

equilibrium e-band diagram

5

EC

EV

Ei

EF

metal

∆VS

∆Vox

Vbi = −φmsφ x( ) = 0 in the bulk

φ x = 0( ) = φS surface potential

V metal( ) = ∆Vox + φS

φS

V metal( ) = Vbi

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dE

dx=

ρ x( )ε

band bending in p-type MOS

6Fig. 16.6, Semiconductor Device Fundamentals, R.F. Pierret

Flat band Accumulation Depletion Inversion

′VG = 0 ′VG < 0 0 < ′VG < VT ′VG > ′VT

φS = 0 φS < 0 0 < φS < 2φF φS > 2φF

7

s.s. gate capacitance vs. d.c. gate bias

C

VG′

C =Cox

1+KOW φS( )

KS xo

depletion

VT′

flat band

Cox

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inversion

accumulation

VG

Cox

CS

φS

Example: 32 nm N-MOS technology

Bermel ECE 305 F1511/20/201510

MOSFET device metrics

VGS

↑

log10 ID

mA µm( )

VDD

transfer characteristics:

ION

VDS = 0.05 V

VDS = VDD

subthreshold swing:

mV decade( )

DIBL (drain-induced barrier lowering)

mV V( )off-current

VT

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threshold voltagesupply voltage

on-current (mA/µm)

ID VGS = VDS = VDD( )

Bermel ECE 305 F15

MOSFET device metrics

VDS

↑

ID

mA µm( )

VDD

on-current (mA/µm)

ID VGS = VDS = VDD( )

transconductance

gm ≡∆ID

∆VGS VDS

µS µm( )

on-resistance

RON Ω − µm( )output resistance:

rd Ω − µm( )

VGS

Bermel ECE 305 F1511/20/2015 12

Why does the curve roll over?

Bermel ECE 305 F1513

( )2

2

µ= −o

D G T

W CI V V

mL

ID

VDS

VGS

VDSAT = VGS − VT( )/ m

( )≈ − − −i o G TQ C V V mV

VG VD>00

Q

loss of inversion

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ID and (VGS - VT): In practice

…..


ID

VDS

VGS

( )( ) ~α

= −D D DD G TI V V V V

1 < α < 2

Long channelComplete

velocity

saturation

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2D energy band diagram on n-MOSFET

Bermel ECE 305 F15S.M. Sze, Physics of Semiconductor Devices, 1981 and Pao and Sah.

a) device

b) equilibrium (flat band)

c) equilibrium (φS > 0)

d) non-equilibrium with VG and VD > 0 applied

FN15

Review Questions

Bermel ECE 305 F15 16

1) Why is the small signal conductance and diffusion capacitance

absent for MOS capacitors?

2) What is the expression for inversion capacitance? Why isn’t there

inversion capacitance in a diode?

3) What is the difference between flatband voltage vs. threshold

voltage?

4) When would you use deep depletion formula vs. small signal

formula?

5) Explain why there is a difference between low frequency response

vs. high-frequency response for a MOS-C, but there is no such

distinction for MOSFET.

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Outline







6. Conclusion

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Warranty, product recall and other facts of life


In this course, you are learning to analyze/design MOSFETs that go in an IC …

… because the ICs operate in incredibly harsh conditions, turning on and off trillions of timeduring its lifetime ….

… therefore the properties of the MOSFET keep changing. Eventually, S/D can be shorted, the gate oxide can break, etc ….

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How to Calculate Built-in or Flat-band Voltage


χs

Φm

Vacuum level

EV

EF

EC

( )= + − ∆ −

=

Φ

≡

bi g p

FB MS

s MqV E

qV φ

χ

qVbi

( )= −i o G TQ C V V

Therefore,

2φ

= − −

BT F

o

FB

QV

CV

( )

( ( ) )

φ

χ

= ≡ Φ − Φ

= − Φ − − −bi MS M s

M s c F bulk

qV q q

E E

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Interpretation for Bulk Charge


0

1,

0 0

1,

0

1

( ) ( )1

( )

ρ δ= −

= −

−∫x

T T ideal

o

T i e l

o

a

o

x

Md

V V xC x

x

x x x dx

Q xV

x C

C/Cox

VG

Ideal VT

New VT

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Acceptor and Donor Traps Combined

Bermel ECE 305 F15

C/Cox

VG

21

Donor-related stretchout

Acceptor-related stretchout

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SiO and SiH Bonds

22

Broken Si-H bonds

Negative Bias Temperature Instability (NBTI)

Hot carrier degradation (HCI)

Broken Si-O bonds

Gate dielectric Breakdown (TDDB)

Electrostatic Discharge (ESD)

Radiation induced Gate Rupture (RBD)

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Negative Bias Temperature Instability

23VD (volts)

I D(m

A)

before stress

after stress

0 1 2 3 4 0

4

3

2

1

Stress Time (sec)

% d

eg

rad

ati

on

101 103 105 107 109

5

10

15

Spec.

Warr

anty

Dielectric Breakdown


ln (time)

Gate

Curr

ent

Breakdown

ln(-

ln(1

-F))

VG1>VG2>VG3VDD6420-2-4-6-8

-10

-2 0 2 4 6 8 10log(TBD)

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Time-dependent Bulk Trap


C/Cox

VG

Ideal VT

Actual VT* 1 1

0

( , )oxth th

ox

x Q xV V

t

x C= −

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Radiation Induced Charge Buildup


C/Cox

VG

Ideal VT

Actual VT* 1 1

0

( , )oxth th

ox

x Q xV V

t

x C= −

50 Mrad(Si) 8MeV elec

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Outline







6. Conclusion

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Short Channel Effect: Vth Roll-off


Vth

Lch

2 2B A Tth F F

ox ox

Q qN WV

C Cφ φ= − = +

Lch∆Vth ?!

Lmin

0α

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How to reduce Vth roll-off …


min

0

21 1

α

= + −

A T

o J

TJ WqNL

r

rW

C

Reduced substrate doping NA

consider WT and junction breakdown

Shallow junction/geometry of transistorslaser annealing of junctions, FINFETs

Thinner gate oxides Consider tunneling currentHigher gate dielectricConsider bulk trapsHigh-k/metal gate MOSFET

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Advantages of High-k Dielectric

…

30

0

0

21 1

ox

A T J Tc

J

qN W r WL

r

x

ε ακ

= + −

High-k/metal gate MOSFET

2

,( )2

µ= −D G T idea

olVI V

L

CZ

Thicker oxide (x0) for same capacitance …

… ensures the drive-current is not reduced

, but tunneling current is suppressed.

Solution: Ultra-thin Body SOI


EF

VG

VG

tox

tSi

N A

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Example: FINFET, OmegaFET, X-FET


Gate

Source Drain

Cross-section

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Outline







6. Conclusion

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Variability in Vth at Low Doping

34

2 2B Tth F F

ox ox

AQ qN W

VC C

φ φ= − = +

IBM Journal of Res. And Tech. 2003.

Variability in Threshold Voltage


2 2B Tth F F

ox ox

AQ qN W

VC C

φ φ= − = +

If every transistor has different Vth and therefore different current, circuit design becomes difficult

2

,( )2

µ= −o

D G T idealI V

LV

Z C

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Vth control by Metal Work-function

36

χs

Φm

Vacuum level

EV

EF

EC

qVbi

( )= −i o G T

Q C V V

φ

= − + −

BT s

o

FBV

QV

C

High-k/metal gate MOSFET

( )bi g p M

FB

qV E

qV

χ= + − ∆ − Φ

=11/20/2015

Tunneling Current


2

( ) ( )GqViT i G th

A

nJ Q V e T E

N

β υ− = −

EC

EV

EF

EG

T

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Ge for PMOS, Si for NMOS


Gatep-MOS

Active Area

n-MOS

[1’10]

[001]

90°

(110)-Plane

Gate

135°A

B

p-MOS

[1’10]

[100]

n-MOS

(001)-Plane

B

’

Strained-Si

Pillar

Takagi, TED 52, p.367, 2005

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Outline







6. Conclusion

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Basics of Strain ..


Compressive

biaxial strain

Enhances mobility in the channel …

Larger lattice

Smaller lattice

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Uniaxial Compressive Strain to Enhance Mobility

Bermel ECE 305 F15 4211/20/2015

Biaxial Strain to Enhance Mobility


Adapted from Chang et. al, IEDM 2005.

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New Channel Materials for improved mobility

Bermel ECE 305 F15 4411/20/2015

Conclusion


1) The basic behavior of MOSFETs can be captured by

band diagrams, transfer & output characteristics

2) There are a variety of failure modes that can degrade

performance over time

3) Short channel effects + variability are a serious concern

for MOSFET scaling, but many novel approaches have

been proposed to solve them, resulting in effective

MOSFET channel lengths < 15 nm

11/20/2015

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