Microelectronics Circuits 1 Reviewocw.snu.ac.kr/sites/default/files/NOTE/927.pdf• Chap 13 : Signal...

Y. Kwon Review : Chap.6 Microelectronic Circuit Course Note, SoEE, SNU1

Microelectronics Circuits 1 Review

Prof. Y.Kwon


Electronic Circuits

• Static phenomenon only• Simplified transistor model : MOSFET and BJT• Interested in “voltage” gain rather than “power” gain• Consists of “analog” integrated circuit and “digital” integrated circuit

회로이론

전자장반도체소자


Contents to Cover in this Course and Evaluation

• Chap 8 : Feedback Amplifier• Chap 9 : Operational Amplifier• Chap 12 : Filters and Tuned Amplifier (12.1 ~ 12.7)• Chap 13 : Signal Generators and Waveform-Shaping Circuits

(13.1~13.5)• Chap 14 : Output Stage and Power Amplifiers (14.1 ~ 14.5)• Chap 10 & 11 : Basics of Digital Circuits

• Evaluation– Two mid terms and One final exam– Attendance– Homework


Physical understanding of STC

requires large I to reduce trequires small R

Time Constant = RC takes more charge to raise voltage level

sso

o

o

VCtQVtVtVtQ

CQV

*)()(0)0(0)0(=∞=→=∞==

==→==

=

−−

RVVI

dItQ

s

t

I −=

= ∫0 )()( ττ

sV


Comparison of the MOSFET & the BJTTABLE 6.3 Comparison of the MOSFET and the BJT

Circuit Symbol

NMOS npn

To Operate in the Active Mode, Two Conditions Have To Be Satisfied

( )

( )

1 Induce a channel; (1)Forward-bias EBJ; 0 5 0 7 V 0 5Let2 Pinch-off channel at drain;

GS t t BE BEon BEon

GS t ov

V V ,V . . v V , V . V V V v

≥ = − ≥ ≅= +

(2)Reverse-bias CBJ; 0 4Vor equivalently, or equ

GD t BC BCon BConV V v V ,V .< < ≅ivalently

0.2-0.3V 0.3V DS OV ov CEv V ,V v≥ = ≥


Comparison of the MOSFET & the BJTCurrent-Voltage Characteristics in the Active Region ( )2

2

1 1 12

1 1 2

0

BE T

A

v /VDS CED n ox GS t C S

A

DSn ox ov

A

G

v vWi C v V i I eL V V

vWC vL V

i

⎛ ⎞ ⎛ ⎞= μ − + = +⎜ ⎟ ⎜ ⎟⎜ ⎟ ⎝ ⎠⎝ ⎠

⎛ ⎞= μ +⎜ ⎟

⎝ ⎠= CB i i /β=

Low-Frequency Hybrid-πModel


Comparison of the MOSFET & the BJTTransconductancegm

Output resistancer0 0 0

0 is inversely proportional to the bias current.

AA D A C

D

V' Lr V /I r V /I

Ir

= = =

⇒

Doxnm

ovoxnm

TCmovDm

IL

WCg

VL

WCg

VIgVIg

⎟⎠⎞

⎜⎝⎛=

⎟⎠⎞

⎜⎝⎛=

==

)(2

)(

/)2//(

μ

μ

Input Resistance with Source (Emitter)Grounded mπ β/gr =∞


Comparison of the MOSFET & the BJTIntrinsic GainA0 =gmro

D

oxnA

OV

A

TAC

A

T

ComOVA

IWLCV

A

VLVA

VVIV

VIrgAVVA

μ2

2

/)2//(

'

0

'

0

00

=

=

=⋅===

VVA /5000~10000 =


( )

1

21

1

Transistor : Drain is shorted to its gate. Saturation mode12

Since the gate currents are zero,

D n ox GS tn

QWi C V VL

⇒

⎛ ⎞= μ −⎜ ⎟⎝ ⎠

1

2

: In most cases, outside the IC chip Assuming in the satuaration mode,

DD GSD REF

V -VI I

RR

Q

= =

( )

( )( )

22

2

2

1

1 =2

=

/ is sole

O D n GS tn

O

REF

O REF

WI I k ' V VL

WI L

WIL

I I

⎛ ⎞= −⎜ ⎟⎝ ⎠

⇒

y determined by the geometries of the transistors.

Current Mirror Circuit


2

02 2

To ensure that is saturated, or equivalentely

At , .

As increases above , will increase according to

the incremental output resistance of .

O GS t O OV

O GS O REF

O GS

O

QV V V V V .

V V I I

V VI

r Q

≥ − ≥

= =



( )( )

02 2

22

2

21

As is increases above , will increase according to the incremental output resistance of .

1

O GS O

O Ao o

O O

O GSO REF

A

V V Ir Q

ΔV VR r

ΔI IW/L V V

I IW/L V

≡ = =

⎛ ⎞−= +⎜ ⎟

⎝ ⎠



Once a constant current is generated, it can be replicated to provide dc bias currents for various amplifier stages in an IC.

Current Steering Circuit


FH Estimation : Open-circuit time constant Method

• High Frequency Gain Function :

• Practical Bandwidth is determined by 3dB roll-off point ( )

• When dominant pole exists, &

• Gray and Searle • IF there is dominant pole,

• This result are very good even if no dominant pole exists.

PnPP

nn

nn

PnPP

ZnZZH

b

sbsbsbsasasa

sssssssF

ωωω

ωωωωωω

11111

)/1()/1)(/1()/1()/1)(/1()(

211

221

221

21

21

+⋅⋅⋅++=

+⋅⋅⋅++++⋅⋅⋅+++

=+⋅⋅⋅+++⋅⋅⋅++

=

Hω

1/11)(

PH s

sFω+

≅ 1PH ωω ≅

∑=i

ioi RCb1

∑=≈≈→≅

iioi

PHP RCb

b 111

11

11 ωω

ω

)()( sFAsA HM= MidbandAM : Gain


Miller’s Theorem

• When the circuit conditions remain to make

• Proof : derive the same I/V relationship at both ports• Miller multiplication (“Miller Effect”) for conductance or

susceptance

)1( K−

21 KVV =

)1( K−


The MOSFET internal capacitances and high-frequency model

gs gd gb sb db

Five capacitanceC , C , C , C and C


• The gate capacitive effect– Triode region

• Cgs = Cgd = 1/2WLCox

– Saturation region• Cgs = 2/3WLCox

• Cgd = 0

– Cutoff• Cgs = Cgd = 0• Cgb = WLCox

• The junction capacitances

, 11

sbo dbosb db

SB DB

oo

C CC CV V

VV

= =++



• The high-frequency MOSFET model

(a) High-frequency equivalent circuit model for the MOSFET.

(b) The equivalent circuit for the case in which the source is connected to the substrate (body).

(c) The equivalent circuit model of (b) with Cdb neglected (to simplify analysis).



• The MOSFET unity-gain frequency (fT)

Determining the short-circuit current gain Io /Ii.

The frequency at which the short-circuit curent-gain of the common-source configuration becomes unity.

/ ( )

o m gs gd gs

o m gs

gs i gs gd

I g V sC V

I g V

V I s C C

= −

≅

= +

( )

For physical frequencies /( )

2 ( )

o m

i gs gd

T m gs gd

mT

gs gd

I gI s C C

s jg C C

gfC C

ωω

π

=+

== +

=+

Typically, fT ranges from about 100MHz for the older technologies (e.g., a 5-um CMOS process) to many GHz for newer high-speed technologies (e.g., a 0.13-um CMOS process).



(1) The current source can be implemented using a PMOS transistor.

Active load

(2) Obviously, Q1 is biased at ID=I. But what are VDS and VGS?

We just assume that the MOSFET is biased to operate in the saturation region throughout this chapter.

CS Amplifier


00

: Intrinsic gain of MOSFET

ii

i RL

ovo m o

i RL

xo o m o

x vi

vR

i

vA g r

v

vR r A g r

i

=∞

=∞

=

= = ∞

= = −

= = =

CS Amplifier


( )3

2

2 2

The value of is set by passing the reference bias current through

When exceeds operates in satuaration.

When operates in satuaration, behaves as a current source.

Wh

SG R EF

SD SG tp

V I Q .

v v V - V , Q

Q Q

=

22 2en is in satuaration, it exhibits a finite incremental resistance : A

oREF

VQ r

I=

CS Amplifier


1

2

2

When the amplifier is biased at a point in region III, small signal voltage gain can be determined by replacing with its small signal modeland with its output resistance .o

Q

Qr

CS Amplifier


0

vo m o

xo o

x vi

A g r

vR r

i=

= −

= =

CS Amplifier


( )

( ) ( )

( )( )

1 1 1 2

21 1 1 1 2

2 1

1 1 2

, and in this case , , and

Or from the other circuit,

VO VO

o Lv m o O o L o

i L O

ov m o m o o

o o

o m i o o

v RA A A g r R r R r .

v R Rr

A g r g r rr r

v g v r r

≡ = = − = =+

= − = −+

= −

CS Amplifier


( )( )( )

( )

CMOS common-source amplifier1 Voltage gain of 15 to 100

2 Very high input resistance

3 Output resistance is also high.

Two final comments1 The circuit is not affected by the body effect since the source

( )1 2

terminals of both and are at signal ground. 2 The circuit operates in region III, which is ensured by the negative

feedback: the circuit is usually part of a larger amplifier (Chapters 7 and 9)

Q Q

.

CS Amplifier


Common-Gate Amplifier

• Vb is different from Vs. • Circuits to calculate Rin


Common-Gate Amplifier

• Impedance transformation• Circuits to calculate Rout


Source Follower

• No voltage gain (~1). • Circuits to calculate Rout

Microelectronics Circuits 1 Reviewocw.snu.ac.kr/sites/default/files/NOTE/927.pdf• Chap 13 : Signal...

Documents

Transcript of Microelectronics Circuits 1 Reviewocw.snu.ac.kr/sites/default/files/NOTE/927.pdf• Chap 13 : Signal...