Microelectric Circuit by Meiling CHEN 1 Lecture 11 Operational Amplifiers.

Microelectric Circuit by Meiling CHEN

1

Lecture 11Lecture 11Operational AmplifiersOperational Amplifiers


2

Topics Topics • Ideal op Amplifiers• Ideal OPA circuits analysis• Non-ideal op amplifiers• Non-ideal OPA circuit analysis


3

Ideal operational amplifier

1. Infinite input impedance2. Zero output impedance3. Infinite bandwidth4. Infinite open-loop gain5. Zero common-mode gain (infinite CMRR)

Ideal OPA characters


4

)( VVRuGV mo


5


6

VCC

VEE

2

1

X1UA741

VCC

VEE4

3

X2UA741

R1

R2

stableVVV

VVAVVV

VVAV

VIRV

oo

oo

o

o

)(

)(

Negative feedback

Positive feedback

unstableVVVV

VVVV

VVAV

VIRV

satoo

satoo

o

o

)(


7

CMRR

BW

A

R

R

o

in

0

Non-ideal cases

CMRR

BW

VVA

R

iiR

o

in

)(

0

)0(



8

Consider finite open-loop gain

A

)2()(

)1(0

0

21

21

AvvvAv

R

vv

R

vv

vv

A

oi

1

2

12

12

/)/1(1

/

R

R

v

v

Aif

ARR

RR

v

v

i

o

i

o

A


9

Input and output resistance

I

Oain v

vG

1

2

21

000

R

R

v

vG

R

v

R

v

I

Oain

OI

Example 2.11Ri

vR

i

iin

MR

MRif

100

1

2

1

An impractically large valueSo we may have the problem of input resistance.


10

0I

VRout

V

I

)( VVAV

Viv

0oR

2R

1R

0

Output resistance


11

Example 2.2

)1(

)2(000

)1(00

3

4

2

4

1

2

21

432

R

R

R

R

R

R

v

v

R

v

R

v

R

vv

R

v

R

v

i

o

XI

oXXX

Comparing with Example 2.1Design a amplifier with a gain –100 and an input resistance of 1M.

MRkR

MRMR

R

R

R

R

R

R

v

v

i

o

1,2.10

1,1

)1(

43

21

3

4

2

4

1

2

Example 2.2:

MR

MR

100

1

2

1

Example 2.1:


12

Exercise 2.6

Vk

kv

k

v

k

vk

vv

k

v

oo

o

101

100

101

1

)2(0

)1(0101

1

mAii

mAi

mAk

i

mAk

i

Find

L

1

11

110

)10(0

101

10

21

0

2


13

Weighted summer

nn

fffo

f

o

n

n

f

o

n

n

vR

Rv

R

Rv

R

Rv

R

v

R

v

R

v

R

v

R

v

R

v

R

v

R

v

22

11

2

2

1

1

2

2

1

1 )1(00000


14

Exercise D2.8

xv

)()(

)(

)(

22

11

44

33

44

33

22

11

vR

Rv

R

R

R

Rv

R

Rv

R

Rv

vR

Rv

R

Rv

R

Rv

vR

Rv

R

Rv

aa

b

ccco

xb

ccco

aax


15

Non-inverting amplifier

Io

oII

vR

Rv

R

vv

R

v

)1(

00

1

2

21

Ideal case:

Non-ideal case: A

)()1(

)2.().........(

)1....(00

21

21

2

21

RR

RR

R

vv

vvAv

R

vv

R

v

o

io

oii

A

v

v

RR

RR

i

o

1

2

1

2

11

1


16

Voltage follower


17

Exercise D2.9 Exercise D2.13

)32

)(32

32)(

9

1

1

1(9

)9

1

1

1(9)1(

)32

()3

1

2

1()2(

)2(032

)1(091

0

21

21

21

k

v

k

v

kk

kk

kkk

vkk

kv

k

v

k

v

kkv

k

vv

k

vvk

vv

k

v

vv

o

o

Vkkk

v

k

v

k

Vvv

o

o

109)9

1

1

1(

)1(09

1

1

01

1


18

CMRR ( Common-Mode Rejection ratio )

cm

d

A

ACMRR log20

icmcmiddo vAvAv

Common-mode inputDifferent-mode input

Why use difference amplifier ?

)(21

vvv

vvv

icm

id

DC

DC

DC

DC

DCV

V

V V

V Vicmv

2idv

2idv


19

Difference Amplifier

2343

11

2

212

21

12

43

2

21

1

1)

11()2(

)11

()()1(

)2(0

)1(0

i

ii

o

i

oi

vRRR

v

vR

Rv

RRR

R

v

R

vvRv

R

v

R

vv

R

vv

R

vv

vv

Method I:


20

)()(

),()1(

12121

221

241321

22

1

2

43

42

11

21

iidiiooo

iio

io

vvAvvR

Rvvv

RRRRletvR

Rv

R

R

RR

Rv

vR

Rv

Different-mode inputMethod I: superposition


21

Common-mode input

0,

]1[

][

1][

1

2413

1

2

4

3

43

4

1

2

43

3

43

421

2243

4

143

3

43

4

11

cm

cm

icmo

icmo

icmicmicm

ARRRR

R

R

R

R

RR

RA

vR

R

RR

R

RR

Rvii

RivRR

Rv

vRRR

Rv

RR

Rv

Ri

CMRR=infinite

0, 2413 cmARRRRif

CMRR=infinite


22

1)(

111111

2

2

RR

iRRiRiv

diffin

id

Consider the problem of input resistance

Differential mode input resistance

ido vR

Rv

1

2 oin vRRif 1


23

Instrumentation Amplifier

Not is differential mode, common mode input can be pass.

idv

idv

))(1(

))(1(

121

2

3

4

121

2

3

4

iio

iiid

ido

vvR

R

R

Rv

vvR

Rv

vR

Rv

)1(.2

.1

1

2

3

4

R

R

R

RA

R

d

in

Big differential gain

Defects:1. Common mode gain=differential mo

de gain.2. Resistance have to match.

sato vv

))(1( 121

2iiid vv

R

Rv

21 RandR

Advantages:


24

Remove the point x


25

DC non-ideal characters

1. Finite open loop gain ( finite CMRR)2. Finite BW3. Offset voltage4. Input bias and offset current


26

Frequency response (open-loop)

bot

ob

t

b

o

A

AdBsA

sA

:01

)(


27

Frequency response (closed loop)

ARRR

R

v

v

i

o

/)1(11

2

1

2

b

o

sA

sA

1)(

)1/(1

)1/()1(

11

1

2

1

2

1

21

2

0

1

2

RRsR

R

RRs

RR

A

RR

v

v

tt

i

o

1

23

1 RRt

dB


28

Output voltage saturation

mAi

Vv

o

o

20

13

max

max


29

Slew rate

)/(max sVdt

dvSR o

)1()()(

)(

),0(1

1

/1

11

1

12

1

2

1

2

to

tt

to

i

t

i

o

b

o

i

o

teVtvs

V

s

V

s

V

ssV

stepunitVvlet

RRsv

v

s

AA

AR

RR

R

v

v

bot A


30

Offset voltage

Output = + saturation or - saturation

mVvos 5~1

From the component mismatches in the input differential stage

May be positive or negative


31

1. Reduce the allowable signal swing2. When input is dc we would not know th

e output is due to vos or signals


32

Solution 1: Offset-nulling terminals

Solution 2: Capacitive coupling (only ac signal be amplified)

)1(1

2

R

Rvv oso


33

Offset current

Input bias currents21

21

2

BBos

BBB

III

III

Input offset currentnAInAI osB 10,100

221 RRIV Bo

Upper limit R2


34

Solution : introducing R3

0

//)1(

)]1([

)(

21

1

2

23

1

232

21

1

321232

o

Bo

BBB

BBBo

V

RR

RR

RRchoose

R

RRRIV

IIIif

R

RIIRRIV


35

Inverse amplifier

Non-inverse amplifier

Reduce the effect of Vos

Reduce the effect of Ios

Reduce the effect of Vos

Reduce the effect of Ios


36

1

2

21

000

Z

Z

v

vG

Z

v

Z

v

I

O

OI

Integrator & Differentiator


37

1202

122

221

)()()(

0)](0[)(0)(0

R

v

R

vvsC

R

tv

R

tv

dt

tdvC

dt

tvdC

R

tv

R

tv

io

ioo

ooi

220

22

1

2

122

11

2

1

1

1

RC

RsC

RR

v

v

RsCRRZ

Z

v

v

I

O

I

O


38

Miller Integrator


39

Consider Vos offset voltage

Consider Ios offset current

satV

satV


40

Solution :

osV

tos

oso

osCR

RCosos

R

Ro

R

R

R

RR

os

o

f

oosoosos

CfR

ff

ff

f

eRC

VVtv

Vs

VVsC

v

sCsC

sC

V

v

R

vV

sC

vV

R

V

1

)(

]1[

]1[

01

1

1

1

1

1

1

1

11

tRC

VVtv os

oso )(

osCR

RC

osf

f

ossCf

o

Vs

VCsRR

R

VR

Rsv

f

)1(

)1

11(

)//

1()(

1

1

1


41

fR

tCR

BBo

f

BB

f

BB

f

fB

o

fBo

f

f

oBoBB

feCIRItv

CRs

CIRI

RsC

IRI

RsC

RsC

RRI

v

RsC

RRIv

RsC

R

vRI

sC

vRI

R

RI

1

22

22

22

2

2

222

)()(

)1

()1

()1

(

]11

[

]11

[)1

(

0/1

tC

IRIv os

Bo 2


42

Example 2.7 sketch output response

VV

MRR

nFC

kR

sat

FF

13

1,

10

10

Case I: FR

Case II: MRF 1

dttvRC

tvt

io )(1

)(0

F

F

I

O

RsC

RR

v

v

2

1

1


43

Differentiator


44

Problem *2.31


45

Problem *2.43

]1248[16

]1248[80

5

]80402010

[5

00

80

50

40

50

20

50

10

50

080402010

0123

01230

01230

00123

00123

SSSSk

R

SSSSk

RV

k

S

k

S

k

S

k

SRV

R

V

k

S

k

S

k

S

k

S

R

VV

k

SV

k

SV

k

SV

k

SV

f

f

f

f

f


46

Problem **2.69


47

Problem *2.77


48

Problem *2.78


49

Problem C*2.126

))((

)(

0

21

1

2

12

21

12

11

2

112

122

11

1

0

2

0

1

0

2

0

11

sCsCi

o

sC

io

sC

sC

i

sC

sCsC

i

RR

R

v

v

R

vv

R

RR

R

vv

R

v

v

R

v

R

v


50

Non-ideal OP amplifiers1. Type A: Finite open-loop gain (unknown)2. Type B: Finite open-loop gain = K3. Type C:

1. Infinite input impedance2. Zero output impedance3. Zero common-mode gain4. Infinite open-loop gain5. Infinite bandwidth


iovo RRA ,0,


51

Type A: Finite open-loop gain (unknown)

vv


52

Type B: Finite open-loop gain =K

)( vvKvo


53

Type C: iov RRA ,0,

oRiR

ovivvA

v

v

v

i

oRiR

ovivvA

2R

1R

v

vIv

0)(

0

2

21

o

voo

o

i

I

R

vvAv

R

vv

R

vv

R

vv

R

vv

Microelectric Circuit by Meiling CHEN 1 Lecture 11 Operational Amplifiers.

Documents

Transcript of Microelectric Circuit by Meiling CHEN 1 Lecture 11 Operational Amplifiers.