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High-speed logic: Measurement(v.9a)

1

CENG3480_B2

Measurement Techniques

Reference: Chapter 3 Measurement Techniques of High speed digital design , by Johnson and Graham


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High-speed logic: Measurement (v.9a) 2

Revision: frequency domain processingand filtering

(1) Low-pass filter(2) High-pass filter(3) Band pass filter

(4) Tuned filter (narrow band pass filter)See http://www.ee.duke.edu/~cec/final/node1.html


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Revision: Filtering is in Frequency domain nottime domain

Filtering is in Frequency domain, dont mix up with high/lowamplitude levels

Higher amplitudelower freq.

Lower amplitudeHigher freq.

timeamplitude


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Examples of filters

R C

R L

R

C

L R

Freq.

gain0dB

0dB

Freq.


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Analogies of Low-pass and High pass filters

High passLow pass


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7/40High-speed logic: Measurement (v.9a) 7

(1) Low pass filter (Frequency low than F -3dB can pass, or has power gain more than 0.5)

(1) Low pass (e.g. op.amp)At low freq, Gain=1=0dBAt -3dB cut off, gain = 0.5, = -3dB

analogsystem

Vin Vout

Frequency

Gain in dB = 20 log 10(Vout/Vin)

0

-3dB

F lowpass(-3dB) =1/2 RC

3dB cut off point

B=Bandwidth

Vc R C

Ic(t) E.g.


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(2) High pass filtering, (Frequency higher than F -3dB can pass, orhas power gain more than 0.5)

High passAt low freq, Gain=0= - dBAt -3dB cut off, gain =0.5, = -3dB

0

F-highpass(-3dB) = 1/2 (L/R)

3dB cut off point

R L analog

system

Vin Vout

Frequency

Gain in dB = 20 log 10(Vout/Vin)

-3dB


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(3) Band - Pass Filters (Frequency within a range can pass)

0dB 3dB

gain

Band width

E.g. A band-pass filter by combining alow pass F low-pass(-3dB) filter ,an ideal amplifier anda high pass F high-pass(-3dB) filter.

Ideal amplifierR L


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(4) Tuned filter: special case of a band-pass filter -- only anarrow band can pass

When the low pass F low-pass(-3dB) , and the a high passF high-pass(-3dB) filter are close.

Fc=center frequency, F=bandwidth (narrow)

0dB3dB

gain

Band width F

Fc =1/[2 (LC) 1/2 ]Frequency

R

LC


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Rise time and bandwidth of CRO probesAll scientific instruments have limitations

Limitations of oscilloscope systemsinadequate sensitivity

Usually no problem because except most sensitive digital network, we arewell above the minimum sensitivity (analogue system is more sensitive)

insufficient range of input voltage?

No problem. Usually within rangelimited bandwidth?

some problems because all veridical amplifier and probe have a limited bandwidth

Two probes having different bandwidth will show differentresponse. Using faster probe

Using slower probe (6 MHz)


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Oscilloscope probesComponents of oscilloscope systems

Input signalProbeVertical amplifier

We assume a razor thin rising edge. Both probe and vertical

amplifier degrade the rise time of the input signals.


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Example:

Given: Bandwidth of probe and scope = 300 MHz

Tr signal = 2.0ns

Tr scope = 0.338/300 MHz = 1.1 nsTr probe = 0.338/300 MHz = 1.1 ns

Tdisplayed = (1.12 + 1.1

2+2.0

2)

1/2

= 2.5 ns

For the same system, if T displayed = 2.2 ns, what is the actual rise time?

Tactual = (2.2 2 - 1.1 2 1.1 2)1/2

= 1.6 ns


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Self-inductance of a probe ground loopA Primary factor degrading the performanceCurrent into the probe must traverse the ground loop on the way back to sourceThe equivalent circuit of the probe is a RC circuitThe self-inductance of the ground loop, represented on our schematic by seriesinductance L1, impedes these current.


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Typically, 3 inches (of 0.02 Gauge wire loop) wire onground plane equals to (approx) 200 nHInput C = 10pfTLC = (LC) 1/2 = 1.4nsT10-90 = 3.4 T LC = 4.8nsThis will slow down the response a lot.


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Estimation of circuit QOutput resistance of source combine with the loop inductance & input

capacitance is a ringing circuit.Where

Q is the ratio of energy stored in the loop to energy lost per radian duringresonant decay.Fast digital signals will exhibit overshoots. We need the right R s to dampthe circuit. On the other hand, it slows down the response.

s RC L

Q2/1)/(


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Impact: probe having ground wires, when using to view very fast signalsfrom low-impedance source, will display artificial ringing and overshoot.A 3 ground wire used with a 10 pf probe induces a 2.8 ns 10 -90% rise

time. In addition, the response will ring when driven from a low-impedance source.


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Remedy

Try to minimize the earth loop wire

Grounding the probe close to the signal source

Back to page 29


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Spurious signal pickup from probe ground loops

32108.5

r A A

L M

mV sV nhdt dI

LV M noise 12)/100.7)(17.0( 7

Mutual inductance between Signal

loop A and Loop B

whereA1 (A2) = areas of loops

r = separation of loopsRefer to figure for values.In this example, L M = 0.17nH

Typically IC outputsmax dl/dt = 7.0 * 10 7 A/s

12mV is not a lot until you have a 32-bit bus; must try to minimize loop area


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A Magnetic field detector

Make a magnetic field detector to test for noise


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How probes load down a circuit

Common experience

Circuit works when probe is inserted. It fails when probe is removed.Effect is due to loading effect, impendence of the circuit haschanged. The frequency response of the circuit will change asa result.

To minimize the effect, the probe should have no more than10% effect on the circuit under test.

E.g. the probe impedance must be 10 times higher than the sourceimpedance of the circuit under test.


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Special probing fixtures

Typical probes with 10 pf inputs and one 3 to 6 ground

wire are not good enough for anything with faster than 2nsrising edgesThree possible techniques to attack this problem

Shop built 21:1 probe

Fixtures for a low-inductance ground loopEmbedded Fixtures for probing


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Shop-built 21:1 probe

Make from ordinary 50 ohm coaxial cable

Soldered to both the signal (source) and local groundTerminates at the scope into a 50-ohm BNC connector

Total impedance = 1K + 50 ohms;if the scope is set to 50 mv/divison,

the measured value is = 50 * (1050/50) = 1.05 V/division


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Advantages of the 21:1 probe

High input impedance = 1050 ohm

Shunt capacitance of a 0.25 W 1K resistor is around 0.5 pf,that is small enough.

But when the frequency is really high, this shunt capacitance maycreate extra loading to the signal source.

Very fast rise time, the signal source is equivalent toconnecting to a 1K load, the L/R rise time degradation ismuch smaller than connecting the signal to a standard 10 pf

probe.


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Fixtures for a low-inductance ground loop

Refer to figure on page 19

Tektronix manufactures a probe fixture specially designed toconnect a probe tip to a circuit under test.


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Embedded Fixture for Probing

Removable probes disturb a

circuit under test. Why nothaving a permanent probefixture?The example is a very

similar to the 21:1 probe. Ithas a very low parasiticcapacitance of the order 1

pf, much better than the 10 pf probe.

Use the jumper to selectexternal probe or internalterminator.


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Avoiding pickup from probe shield currents

Shield is also part of a current path.Voltage difference exists between logic ground and scopechassis; current will flow.This shield current * shield resistance R shield will producenoise V shield


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VShield is proportional to shield resistance, not to shield

inductance because the shield and the centre conductor aremagnetically coupled. Inductive voltage appear on bothsignal and shield wires.To observe V Shield

Connect your scope tip and ground togetherMove the probe near a working circuit without touching anything. Atthis point you see only the magnetic pickup from your probe senseloopCover the end of the probe with Al foil, shorting the tip directly to the

probes metallic ground shield. This reduces the magnetic pickup tonear zero. Now touch the shorted probe to the logic ground. You should see onlythe V Shield


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Solving V Shield problemLower shield resistance (not possible with standard probes)

Add a shunt impedance between the scope and logic ground. Not always possible because of difficulties in finding a goodgrounding point

Turn off unused part during observation to reduce voltagedifference

Not easyUse a big inductance (magnetic core) in series with the shield

Good for high frequency noise.But your inductor may deteriorate at very high frequency.

Redesign board to reduced radiated field.Use more layersDisconnect the scope safety ground

Not safe


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Use a 1:1 probe to avoid the 10 time magnification when

using 10X probeUse a differential probe arrangement


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Viewing a serial data transmission system

Jitter observed due to intersymbol interference and additive

noise.To study signal, probe point D and use this as trigger as well.


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No jitter at trigger point due to repeated syn with positive-going edge.

This could be misleading

For proper measurement, trigger with the source clockThe jitter is around half of the previous one.If source clock is not available, trigger on the source data signal pointA or B (where is minimal jitter)


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Slowing Down the System clock

Not easy to observe high speed digital signals which include

ringing, crosstalk and other noises.Trigger on a slower clock (divide the system clock) allows

better observations because it allows all signals to decay before starting the next cycle.

It will help debugging timing problems.


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Observing crosstalk

Crosstalk will

Reduce logic margins due to ringingAffect marginal compliance with setup and hold requirementsReduce the number of lines that can be packed together

Use a 21:1 probe to check crosstalk

Connect probe and turn off machine; measure and make sure there isminimal environment noise.Select external trigger using the suspected noise sourceThen turn on machine to observe the signal which is a combination of

primary signal, ringing due to primary signal, crosstalk and the noise

present in our measurement system


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Measuring Operating MarginsIn digital system measurements, we are interested to stress the system toensure the system is within operation margin specified.Make sure the arrangement is automatic and self recoverySome of the common tests

Additive noise Add random noise to every node

Sine waves, square waves or random pattern Difficult to administer Suitable for data receivers and transmitters

Adjusting the timing of a large bus (clock skew margin test) Test the combine effects of system setup time, hold time and operating margin etc. Connect the devices clock signals using the following methods.

Clock adjustment by coax delay (vary the length) Clock adjustment by pulse generator (variable delays) Simple circuits for clock phase adjustment Clock adjustment by a phase-locked loop Clock adjustment by voltage variation


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Power Supply Power supply variation can change response characteristics Vary the supply over a + 10% range

Temperature Temperature will vary the delay characteristics Can use cooling spray, blow dryer etc. Some companies use temperature

control ovens

Make sure the temperature probe is attached to the right place

Data Throughput Compose a suite of operations that exercise each individual connections Not easy to compose test pattern that represents the real situations. Often

system passes tests but fails at real operations. Good data pattern will uncover unexpected avenues of noise coupling

which causes failures Complex tests are expensive

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