Manual Ee Vi

EXPEREMENT LIST

POWER ELECTRONICS LABORATORY

TEE-651

1. To Study V-I characteristics of SCR and measure latching and holding currents.

2. To study UJT trigger circuit for half wave and full wave control.

3. To study single-phase half wave controlled rectified with (i) resistive load (ii) inductive

load with without free wheeling diode.

4. To study single phase (1) fully controlled (2) half controlled bridge rectifiers with

resistive & inductive loads.

5. To study 3-Phase fully/ half controlled bridge rectifier with resistive & inductive loads.

6. To study single phase ac voltage regulator with resistive & inductive loads.

7. To study single phase cyclo-converter.

8. To study triggering of (1) IGBT (2) MOSFET (3) Power transistor

9. To study operation of IGBT/MOSFET chopper ckt.

10. To study MOSFET/IGBT based single phase series – resonant inverter.

11. To study MOSFET/IGBT based single phase bridge inverter.

12. To Obtain PSPICE simulation of SCR and GTO thyristor.

13. To Obtain PSPICE simulation of POWER TRANSISTOR and IGBT.

14. To Obtain PSPICE simulation of single phase fully controlled bridge rectifier and draw

load voltage and load current waveform for inductive load.

15. To Obtain PSPICE simulation of single phase full wave ac voltage controller and draw

load voltage and load current waveform for inductive load.

16. TO Obtain PSPICE simulation of step down DC chopper with LC output filter for

inductive load and determine steady state values of output voltage ripplesin output

voltage and load current

1

EXPERIMENT NO. 1

OBJECT : To study V-I characteristics of SCR and measure latching and holding currents.

INTRODUCTION

SCR (Silicon Controlled Rectifier) since the semiconductor used is SILICON. Hence this name SCR

is the oldest member of thyristor family which one most widely used for power switching device.

Since this device exhibits SWITCHING property and having large power handling capacity makes it

useful in power modulation large power handling capacity makes it useful in power modulation and

control. Due to such feature this device is used for power control in following applications :-

(i) Speed controllers for AC & DC Motors.

(ii) Temperature and Illumination Controllers.

(iii) AC & DC Circuit Breakers.

(iv) Variable frequency DC-AC Inverters.

(v) Variable voltage DC-DC Converter.

(vi) Variable voltage AC-DC Converter.

To study Forward Characteristics 0-230 V isolated anode supply is given and 2 sets of 0-12 V

regulated and variable is given for gate supply. To study reverse characteristics isolated 0-600 V DC

variable supply is given.

THEORY

SCR is a four-layer device with three terminals namely the ANODE (A), CATHODE (K), GATE (G),

as shown in fig - 1(a). When the Anode (A) is made positive with respect to Cathode (K) refer fig –

1(b) junction I2 is reverse biased and only the leakage current will flow through device. At this stage

SCR is said to be in OFF STATE or FROWARD BLOCKING STATE. When the Cathode is made

position with respect to Anode junction I1 & I3 are reverse biased and a small reverse leakage current

will flow through the SCR. This is the REVERSE BLOCKING STATE of the device.

2

PRINCIPLE OF OPERATION

The SCR is a four-layer device with three terminals, namely, the anode, the cathode, and the

gate. When the anode is made positive with respect tot the cathode refer Fig. 1(b) junction J 2 is

reverse-biased and only the leakage current will flow through the device. The SCR is then said to be in

the forward blocking state or off-state. When the cathode is made positive with respect to the anode,

junctions J1 and J3 are reverse-biased and a small reverse leakage current will flow through the SCR.

This is the reverse blocking state of the device. When the anode-to-cathode voltage is increased, the

reverse-biased junction J2 will break down due to the large voltage gradient across the depletion layers.

This is the avalanche breakdown. Since the other junctions J1 and J3 are forward-biased, there will be

free carrier movement across all three junctions, resulting in a large anode-to-cathode forward current

IT. The voltage drop VT across the device will be the ohmic drop in the four layers, and the device is

then said to be in the conducting state or on-state. Fig - 2 shows the characteristics of an SCR. In the

on-state, the current is limited by the external impedance. If the anode-to-cathode voltage is now

reduced, since the original depletion layer and the reverse-biased junction J2 no longer exist due to the

free movement of carriers, the device will continue to stay on. When the forward current falls below

the level of the holding current Ih, the depletion region will begin to develop around J2 due to the

reduced number of carriers, and the device will go to the blocking state. Similarly, when the SCR is

switched on, the resulting forward current has to be more than the latching current I 1. This is necessary

for maintaining the required amount of carrier flow across the junctions; otherwise, the device will

return to the blocking state as soon as the anode-to-cathode voltage is reduced.

3

Fig – 2 : VI Characteristics of SCR

Latching Current

In forward bias just before the firing, the anode current flows known as latching current.

Holding Current

Once the SCR got fired and its gate current is zero than the minimum current. The SCR can

stand fire form. If the anode current goes to that minimum value, the SCR turn off that minimum

current is called holding current.

Break Over Voltage

The voltage across the anode & cathode at which the SCR got fire is called break over voltage

and this voltage will vary by varying of gate current.

EXPERIMENTAL PROCEDURE

These experiments will perform to study of SCR :-

1. Conducting of SCR with flying gate pulses.

2. Forward characteristics at different gate current.

3. Reverse characteristics.

4

Experiment No 1

Forward Blocking Characteristics

1. Make connections as per diagram ‘A’ with patch cords.

2. This characteristics of SCR is drawn at Ig = 0 i.e. gate signal is not applied.

3. For this setup the multimeter range is chosen as indicated.

4. Switch on the supply and gradually vary the supply through variac starting from 10V

to maximum of 220V.

5. Meaning the corresponding IAK for variacs setting of VAK.

6. Plot the graph between IAK & VAK for forward directions.

Observation Table

At IG = 0

S No. VAK IAK

(i) 10(ii) 20(iii) 40(iv) 60(v) 100(vi) 120(vii) 140(viii) 180(ix) 200(x) 220

Experiment No 2

Forward characteristics with gate signal

1. Make connections as per diagram ‘B’.

2. The characteristics of SCR (Forward) is drawn at various gate currents.

3. For this setup the multimeter range is chosen as indicated.

4. Switch on the supply and keep variacs in minimum position and DC supply to gate

also in minimum position.

5. Gradually increase the gate current by variable DC supply of 12V and Start taking

readings from gate current of 1.5 mA.

6. Increase the anode to catjode voltage and observe whether SCR starts conducting

which is indicating by sudden drops of voltage across SCR.

7. Increase the gate current to another higher value sat 2 mA.

8. Repeat step No 6 again.

9. Between gate current setting 3mA to 4mA reading should be taken in steps of 0.1 mA

and corresponding breaking voltage of SCR may be noted.

5

Observation Table

S No. IG (mA) VBO

(i)(ii)(iii)(iv)(v)(vi)(vii)(viii)

Experiment No 3

(A) Forward Conduction State (Latching/Holding Current)

(i) Make connection as per diagram ‘C’.

(ii) Keep the variac supply of 250V and 12V supply in minimum position. For this setup

the multimeter range is changed as indicated.

(iii) Increase gate current to 4.25mA by variable DC supply of 12V.

(iv) Increase voltage from variac in steps and note down in corresponding current in

Anode to Cathode.

Table ‘2’ : At IG = 4.25 mA

S No. VAK IAK 12345678910

(B) For Latching Current

(i) Keep the voltage of both the source at minimum value.

(ii) Change the voltage range of multimeter atNos & Anode to Cathode to 750V DC

range and variable Resistance in load circuit to same value.

(iii) Increase the voltage of variacs to 200V.

(iv) Increase the gate current to 4.5 mA i.e. that value of gate current around which the

voltage across VAK will came down to Zero.

(v) Note down the IAK and remove supply from gate terminal and absence that whether

IAK and drop down to almost zero if yes increase IAK by varying resistance in anode

circuit from variable resistance pot and absence whether IAK drops to zero with

removing of gate supply.

6

(vi) Repeat for higher values of IAK locate the minimum value of IAK for which IAK dies not

drops down to zero. On removal of gate signal. This anode current is recorded as

Latching current.

(C) For Holding Current

(i) Increase the IAK to value of around 4 mA.

(ii) Keep the system running at this setting for 2 minutes

(iii) Remove the gate supply.

(iv) Reduce the value of IAK by increasing variable resistance pot

(v) Observe the value of current at which IAK suddenly drops to zero.

(vi) This value of IAK should be recorded as Holding Current.

Experiment No 4

Reverse Blocking Characteristics

1. Make connections as per diagram ‘D’ with patch cords.

2. in this case the cathode (K) is made +Ve and Anode is made –Ve while the gate

supply is Zero.

3. For this setup the multimeter range is set as indicated.

4. Switch ON the supply and gradually vary the variacs supply standing from 10V to

230V (Maximum) with reverse biasing.

5. Measure the corresponding VAK (Negative) and IAK (Negative).

6. Plot the graph between VAK & IAK for reverse direction.

Table ‘2’ : At IG = _______ AmpS No. VAK (Negative) IAK (Negative)

12345678910

PRECAUTIONS

1. The SCR always use with load lamp.

2. The load lamp should not be more than 15 watt 250 Volts.

3. In reverse characteristics the lamp load should the series connection of two 15 watts

lamp.

4. In reverse characteristics observations the SCR should not in break over form more than

five seconds.

Q. Explain the difference in latching current and holding current?

7

EXPERIMENT NO.2

OBJECT: To study UJT trigger circuit for half wave and full wave control

APPARATUS USED :

INTRODUCTION

Triggering means to give a pulse to SCR for turning ON or to bring the device in conduction state.

The pulse should be of variable nature in order to fire the SCR thus by controlling the firing of SCR

power control of AC circuit can also be obtained because for power control in AC circuits, the instant

of firing the device has to be controlled.

THEORY

There are two type of UJT triggering circuits as given below :-

1. UJT Triggering circuits without pulse transformer

2. UJT Triggering circuits with pulse transformer.

The above type of triggering comes under GATE-CONTROL method i.e. in this method a forward

voltage VF less than VBO (Forward Break Over Voltage) is applied across the device so that it can be

TURNED ON by applying a position voltage between gate and cathode.

PRINCIPAL OF OPERATION

For triggering circuit we use the principle characteristics of UJT as relaxation oscillator. Fig–‘A’ since

we know that the UJT exhibits a NEGATIVE RESISTANCE CHARACTERISTICS i.e. where in the

increase in current IE (Emitter Current) will be complained by decrease in VE (Emitter Voltage) as

shown in graph curve directed by AB.

Fig ‘A’ : Characteristics of Uni Junction Transistor

8

Q

Fig ‘B’

Refer Fig ‘A’ & ‘B’ :-

(i) VC > VE - Emitter base diode-1 will be reverse biased and IE will be negative and

equal in magnitude to reverse leakage current (Between point P & A).

(ii) VC = VE - Emitter base diode-1 junction will conduct IE will be positive (At point A).

(iii) VC < VE - Due to conduction more holes are injected by emitter to base-1 due to drift

as such resistance R1 will decrease thus Emitter base diode-1 will be more forward biased and

hence IE will increase hence device will indicate negative resistance region between A & B.

(iv) At point B – Emitter base diode-1 region will be saturated, resistance R 1 will not

decrease further and any further increase in IE will be followed by increase in Emitter voltage

(Between point B & Q).

CIRCUIT DISCRIPTION

(i) UJT TRIGGERING CIRCUIT WITHOUT PULSE TRANSFORMER

Consider Fig ‘1’, 24 volts AC input will be applied to operate the triggering circuits. 230 V will be

applied to the load circuit. 24 V AC will be rectified by diode D1, D2, D3 & D4. Resistance R1 is

current limiting resistance. Zener DZ1 will trapezoid the pulsuated DC voltage. R2 is minimum

charging current limiting Resistance. C1 capacitor will be charged through the resistance R1, R2 &

VR1, the capacitor C will be charged upto the required UJT peak Emitter Voltage. At this point

regeneration will start and capacitor will discharge the UJT and will pass the pulsuated DC to diode

D5 and D6, UJT comes to OFF state discharging of capacitor C1 and the pulsuated DC at D5 and D6

9

will disappear. Pulse at D5 and D6 will be fed to the SCR for firing. In bridge rectifier two pulse are

required, one for positive half cycle control and other for negative half cycle control.

Fig – ‘1’ : UJT Triggering Circuit without Pulse Transformer

(ii) UJT TRIGGERING CIRCUIT WITH PULSE TRANSFORMER

Consider Fig ‘2’, 24 volts AC input will be applied to operate the triggering circuits. 230 V will be

applied to the load circuit. The theory of UJT operating is same as discussed above. The pulsuating

DC will be fed to the primary of pulse transformer and secondary of pulse transformer will give

output pulse for triggering. The advantage of pulse transformer is that the Thyristor will trigger at

only pulse, there is no chance to operate the Thyristor at UJT reverse leakage DC pulsuated voltage

because transformer is isolated for DC blocking (for points between P & A) from fig ‘A’.

Fig – ‘2’ : UJT Triggering Circuit using Pulse Transformer


Here two experiment provision is made as given below :-

1. To study UJT Triggering circuit without pulse transformer.

2. To study UJT Triggering circuit with pulse transformer.

10

Experiment No. 1

To study UJT Triggering circuit without pulse transformer.

1. Consider Fig No. 3(a).

2. Connect the 12 V AC Input to trigger Circuit.

3. Connect the 230 V AC Input to Load circuit.

4. Connect the firing pulse patch chords.

5. Connect the lamp load in circuit.

6. Connect 10:1 resistive attenuator across the lamp load.

7. Switch ON the demonstration board.

8. Observe that the changing in fire angle performance at 25 Watt lamp load from OFF to

full ON by changing the variable resistance VR1.

9. Switch OFF the demonstration board for connecting CRO.

10. Connect the CRO as given in Fig 3(a) by doted lines.


12. Observe the waves by varying the pot VR1. It gives the wave as given in figure No 3(b).

Experiment No. 2

To study UJT Triggering circuit with pulse transformer.1. Consider Fig No. 4(a).

2. Connect the 12 V AC Input to trigger Circuit.

3. Connect the 230 V AC Input to Load circuit.

4. Connect the firing pulse patch chords.

5. Connect the lamp load in circuit.

6. Connect 10:1 resistive attenuator across the lamp load.


8. Observe that the changing in fire angle performance at 25 Watt lamp load from OFF to

full ON by changing the variable resistance VR1.

9. Switch OFF the demonstration board for connecting CRO.

10. Connect the CRO as given in Fig 4(a) by doted lines.


12. Observe the waves by varying the pot VR1. It gives the wave as given in figure No 4(b).

RESULT:

PRECAUTIONS

1. Ensure that load should always be connected in circuit before performing the experiment.

2. Lamp load should not be more than 100 watt.

3. The operating voltage should be in permissible limit i.e. 200 to 250 Volts.

Q. Discuss UJT Oscillator triggering?

11

EXPERIMENT NO. 3

OBJECT: To study Single Phase Half Wave Controlled Rectifier with (i) Resistive load (ii) inductive load with and without free wheeling diode.

APPARATUS USED:

THEORY:

(A)WITH RESISTIVE LOAD

Fig.(a) shows the circuit diagram of single phase half wave converter with resistive load Triggering circuit is not shown in the figure . The circuit is energized by the line voltage or transformer secondary voltage .,e= Em sinwt. It is assumed that the peak supply voltage never exceeds the forward and reverse blocking ratings of the thyristor . The various voltage and current waveshapes for this cktare shown in figure .

During the positive half cycle of the supply vol;tage , the thyristor anode is positive with resprct to its cathode & until the thyristor is triggered by a prtoper gate pulse , it blocks the flow of load current in the forward direction . When the thyristor is fired at an angle α, full supply voltage is applied to the load .Hence the load is directly connected to the ac supply .With a zero reactance source and a purely resistive load , the current waveform after the thyristor is triggered will be identical to the applied voltage wave , and of a magnitude dependent on the amplitude of the voltage and the value of load resistance R. as shown in fig(b)

Fig (a) : HALF WAVE CONTROLLED RECTIFIER WITH RESISTIVE LOAD

FIG(B) : WAVEFORM FOR A HALF WAVE CIRCUIT

(B) WITH INDUCTIVE LOAD

13

FIG(A) CIRCUIT DIAGRAM OF HALF WAVE CONTROLLED RECTIFIER WITH RL LOAD

The operation of the circuit on inductive loads changes slightly . Now at instant to1 , when 5the thyristor is triggered , the load current will increase in a finite time through thre inductive load . the supply voltage from this instant appears acrros the load . Due to inductive load the increase in current is gradual . Energy is stored in inductor during time t01 to t1. At t1 , the supply voltage reverses , but the thyristor is kept conducting .This is due to the fact that current through the inductance can not be reduced to zero . During negative voltage half cycle , current continues to flow till the energy stored in the inductance is dissipated in the load resistor and a part of energy is fed back to the source . Hence , due to energy stored in inductor , current continues to flow to instant t11. At instant t11, theload current is zero and due to negative supply voltage , thyristor turns off.

FIG(B) WAVE FORM FOR A HALF WAVE CONTROLLED RECTIFIER WITH RL LOAD

At instant t02, when again pulse is applied, the above cycle repeates hence the eefect of the inductive load is increase in the conduction period of the SCR.

EFFECT OF FREEWHEELING DIODE

Many circuits , particularly those which are half or uncontrolled, include a diode across the load as shown in figure (a) Theis diode is variously described as a commutating diode , flywheel diode or by pass diode. This diode is commonly descrtibed as a commutating diode as its function is to commutate or transfer load current away from the rectifier whenever the load voltage goes into reverse stateThis diode serves two main functions

(i) It prevents reversal of load voltage except for small diode voltage drop (ii) It transfers the load current awqay from the main rectifier , therby allowing all of its

thyristors to regain their blocking states

FIG(A) HALF WAVE RECTIFIER WITH A FREEWHEELING DIODE

Fig (a) shows ahalf wave controlled rectifier with afree wheeling diode Df connected across RL load .The load voltage and current waveforms are also shown in fig(b)

FIG(B) WAVEFORM FOR HALF WAVE RECTIFIER WITH INDUCTIVE LOAD AND A FREEWHEELING DIODE

Hence it is clear that the freewheeling diode helps in improvement of power factor of the system .

PROCEDURE

RESULT

PRECAUTIONS:Q. Justify the statement “FREEWHEELING DIODE IMPROVES POWER FACTOR OF THE SYSTEM”

14

EXPERIMENT NO 4

OBJECT: To study single phase (i) fully controlled (ii) half controlled bridge rectifier with resistive and inductive loads.

APPARATUS USED:

THEORY:

HALF CONTROLLED:

Half controlled converters are also known as semi converters.

FIG(A) : SYMMETRICAL CONFIGURATION OF HALF CONTROLLED BRIDGE RECTIFIER CIRCUIT

(I)WITH R LOAD

In symmetrical configuration, the cathodes of two SCRs are at same potential so their gates can be connected and a single gate pulse can be used for triggering either SCR .

During positive half cycle of ac supply , thyristor T1 and diode D1 are forward biased and are in the forward blocking mode . When the SCR T1 is triggered , at firing angle α, the current flow through the path,L-T1 – R – D1 –N. as shown in figure , the load current will flow until it is commutated by reversal of supply voltage at wt= ∏ .

During negative half cycle of the ac supply , thyristor T2 and diode D2 are forward biased. When SCR T2 is triggered at an angle ( ∏ + α), the current would flow through the path N-T2-A-R-B-D2-L. This current is continuous till angle 2∏, When SCR T2 is turned off Fig (b) shows waveform for symmetrical configuration with resistive load .

FIG(B) : Waveform for symmetrical configuration with resistive load

(B) WITH RL LOAD:

As shown in fig(a) thyristor T1 is turned on at a firing anle α in each positive half cycle. From this instant α , supply voltage appears across output terminal AB though thyristor T1 and diode D1.

15

Current flows through the path L-T1-A-L-R-B-D1-N.here the filter inductance L is assumed to be sufficiently large as to produce continuous load current .This current Id is taken to be constant . Hence during positive half cycle , thyristor T1 and diode D1 conducts Now when the supply voltage reverses at wt = ∏ , the diode D2 is forward biased since diode D1 is already conducting .The diode D2 then turns on, and the load current passes through D2 and T1 . The supply voltage reverse biases D1 and turns it off . Thus the load current freewheels through the path R-B-D2-T1-A-L.During the interval from ∏ to (∏+α) in each supply cycle . during the negative half cycle at the instant (∏+α) , a triggering pulse is applied to the forward biased thyristor T2. Thyristor T2 is turned on . As thyristor T2 is turned on , the supply voltage reverse biases T1 and then turns it off by the line commutation .therefore the load current flows through T2 and D2, the above cycle repeates and the waveform are obtained are shown in fig(b).Here , we have seen that the conduction period of thyristor & diodes are equal theefore this ckt. is called as the symmetrical configuration.

Fig(a):CIRCUIT DIAGRAM OF SYMMETRICAL CONFIGURATION

FIG(B) WAVEFORM S OF SYMMETRICAL CONFIGURATION

(B) FULLY CONTROLLED BRIDGE RECTIFIER

16

FIG(A)FULLY CONTROLLED SINGLE PHASE WITH RL LOAD

According to the circuit diagram fig (a) conduction does not takes place until the thyristor are fired and , in order for current to flow , thyristor T1 and T2 must be fired together , as must thyristor T3 and T4 in the next half cycle. To ensuring simultaneous firing , both thyristor T1 and T2 are fired from the same circuit . Inductance Lis used in the circuit to reduce the ripple .A large value of L with result in a continuous load current for large firing angles . The waveforms with two different firing angles are shownin fig (b)

FIG (b): Waveform for α= 60 degree

As shown in fig(b) at firing angle α= 60 degree , thyristor T1 and T2 are triggered . current flows through the path L-T1-A-L-R-B-T2-N.Supply voltage from this instant appears across output terminal and forces the current through load .This load current Id is assumed tobe constant .This current also flows through the supply and the direction is from line to neutral which is taken positive as in fig (b) along with the applied voltage .Now at the instant ∏ voltage reverses . However because of very large inductance L , the current is maintained in the same direction at constant magnitude Id which keeps the thyristor T1 and T2 in conducting state and hence , the negative supply voltage appears across output terminals.

PROCEDURE:

RESULT:

PRECAUTIONS:

Q. Explain the half waving effect in single phase symmetrical half controlled converter ?

17

EXPERIMENT NO. 5

OBJECT: To study three phase fully controlled / half controlled bridge rectifier with resistive and inductive load

THEORY

Fig ‘1’ shows the power circuit of three phases fully controlled converter. The load is fed via a three-

phase half-wave connection, the return current path being via another half-wave connection to one of

the three supply lines, no neutral being required. Hence transformer connection is optional. However,

for isolation of output from the supply source, or for higher output requirements, the transformer is to

be connected.

If transformer is used, then one winding is connected in delta because the delta connection gives the

circulating path for third harmonic current. Therefore, third harmonic current does not appear in line

which is an advantage. This circuit consists of two groups of SCRs, positive group, and negative

group. Here, SCRs T1, T2, T3 forms a positive group, whereas SCRs T4, T5, T6 forms a negative

group. The positive group SCRs are turned-on when the supply voltages are positive and negative

group SCRs are turned-on when the supply voltages are negative.

Fig ‘1’ : 3-Phase Fully Controlled Bridge Rectifier with Resistive Load

When connected to the a.c. supply, firing gate pulses will be delivered to the thyristors in the

correct sequence but, if only a single firing gate pulse is used, no current will flow, as the other

thyristor in the current path will be in the off-state: Hence, in order to start the circuit functioning,

two thyristors must be fired at the same time in order to commence current-flow, one of the upper-

arm and one of the lower-arm.

18

The operation of this circuit can be explained with the help of vector diagram shown in Fig. ‘2’. At

the instant shown, voltages of phase R and phase B are equally positive with respect to neutral, that is

voltage (B-R) or (R-B) is zero. After this instant phase voltage R assumes the highest value. If SCR

T1 is triggered at this instant, it can conduct provided there is a return path for the current.

Since phase Y is the maximum negative, or vector (R-Y) is the largest, the return path should be to

phase Y. That means SCR T5 must be triggered simultaneously with SCR T1. Similarly, when phase

Y has the highest value, SCR T2 and T6 and when phase B has the highest-value, SCR T3 and SCR

T4 must be triggered simultaneously.

Fig ‘2’ : Vector Diagram

For six pulse operation, each thyristor has to be fired twice in its conduction cycle, that is firing

intervals should be 60°. As shown in Fig. ‘2’, there are six line to line phasors, each having a

maximum conduction angle of 60°.

(i) Continuous conduction mode (0 /3)

The firing angle of each phasor is varied through a range of 60° to 180°. The minimum firing angle is

60°and is taken as = 0, at 60°. When the phasor (R-Y) is allowed to conduct at between zero to

/3, it continues to conduct by 60° when the phasor (R-B) is fired. The conduction is shifted from

SCR T5 to SCR T6. T5 is commutated off by the reverse-voltage of phase Y and Y across it. The

phasor (R-B) conducts after another 60° after which it is replaced by phasor (Y-B) when phase Y

voltage assumes greater value than B or R. Hence load current is continuous for a between 0 to /3.

The waveforms are shown in Fig. ‘3’.

19

Fig ‘3’ : Voltage waveforms for various firing angles

(ii) Discontinuous conduction mode (/3 2/3)

When /3 2/3, the phasor (R-Y) conducts up to angle n after which both the thyristors T1

and T5 are commutated off because phase Y becomes positive with respect to phase B and after 60O,

when T6 and T1 are fires, phase (R-B) conducts also up to angle , hence load current remains zero

from angle to the next firing-pulse and becomes discontinuous. Therefore, the fully-controlled

bridge-circuit produces a ripple-frequency of six-times the supply frequency at all trigger angles.

The voltage and current relations for both the modes can be derived as follows :

(i) Continuous conduction mode. The average load voltage Edc is given by :

Average load current

(ii) Discontinuous conduction mode. The average load voltage Edc is given by :

20

Average load current

WITH INDUCTIVE LOAD

The power, diagram of the three-phase fully-controlled converter with R-L load is shown in Fig. ‘4’.

The related waveforms for this power diagram are shown in Fig. ‘5’. The firing angle for the thyristor

T. is measured from 300 with reference to the positive half-cycle of the phase voltage EA. In a similar

manner, the thyristors T2 and T3 are turned on taking the respective phase-voltages EB and EC into

account. The negative group thyristors T4, T5 and T6 are turned on 1800 after the positive group

thyristors T1, T2, T3 are turned on, respectively. .

For describing the operation of the circuit, we make the following assumptions:

(i) It is assumed that converter is in working state and the load current Id has been already

established to its constant level.

(ii) The load inductance is assumed to be very large so as to produce a constant load current.

(iii) Effect of source inductance is neglected.

(iv) Thyristor T3 and T5 are already conducting before the instant K from which we start our

discussion.

Fig ‘4’ : 3-Phase Fully Controlled Bridge with R-L Load

21

Fig ‘5’ : Voltage and Current Wave forms

At instant K, thyristor T1 is triggered with firing angle . When T1 is conducting, the voltage

between lines R and B reverse-biases thyristor T3 as voltage of phase R is more than voltage of phase

B. Therefore, thyristor T3 becomes off. Now, the voltage between lines R and Y appears across

output terminals o and P through thyristors T1 and T5 and forces the current I d through the path R -

TI - O - L - R - p – T5 - Y. This continues till instant L, where a firing-pulse is applied to thyristor

T6.

With T6 turning on, voltage between lines Y and B reverse-biases thyristor T5. Therefore, T5

becomes off and now the voltage between lines R and B appears across output terminals through

thyristors T1 and T6.

22

This way in the sequence, 1 - 6 - 2 - 4 - 3 - 5 - 1, thyristors are triggered at proper firing angle and

measured from the respective reference point from each thyristor, which gives the output voltage E d.

Table given below shows the six modes of firing sequences of SCRs.

Table : Firing-sequence of SCRs

Mode of operation Conducting SCRs

SCRs to be fired

Outgoing SCR

Mode 0

Mode 1

Mode 2

Mode 3

Mode 4

Mode 5

5, 3

1, 5

6, 1

2, 6

4, 2

3, 4

1

6

2

4

3

5

3

5

1

6

2

4

GROUPING

120O 120O 120O

3 1 1 2 2 35 5 6 6 4 4

From the waveforms, it is very clear that average output voltage envelop is divided into two portions,

upper and lower. Therefore, the output average voltage can be taken as two-times the average of

upper or lower part of the curve.

Therefore, considering the upper part only, we can write,

where Em is the peak value of the line-to-neutral voltage.

As the firing angle changes from 0 to 90°, the voltage also changes from maximum to zero, and the

converter is said to be in rectification mode. For the angles in the range 90° to 180°, the voltage varies

from 0 to negative maximum and the converter is in the inversion mode. It can transfer power from

d.c. side to a.c. if there is a negative d.c. source available at the d.c. terminals. The mean value of the

23

d.c. voltage is superimposed by ripple content. The minimum ripple frequency is six-times the supply

frequency.

PROCEDURE

(i) Connect the circuit as shown in Fig ‘6’.

(ii) Connect the load as resistive load (Lamp Load consisting of two lamps connected in series).

(iii) Switch on supply to power circuit and control circuit.

(iv) Starting from 180O as firing angle decrease to 0O in steps. Observe the output voltage wave

form and record the readings of voltmeter and ammeter for different values of firing angle.

(v) Repeat step 4 R-L load by connecting inductor in series with lamp load.

(vi) Repeat step 4 again for RLE load by connecting DC Motor as load.

VOLTAGE APPLIED ACROSS DC MOTOR SHOULD NOT INCREASE BEYOND 220V.

ONE BULBS OF 200 WATTS CAN BE CONNECTED IN SERIES WITH MOTOR.

Test points are provided on the panel for all the three phases alongwith ground. Input signal for all

the three phase can be observed directly on CRO by connecting CRO load on the respective phase and

ground of the CRO load to point marked as GRD.

System level details for Firing Circuit

Firing Circuit for 3-phase fully controlled rectifier can be classified broadly into following three

modules :-

(i) Microcontroller based firing unit.

(ii) Pulse Transformer Driver Unit

(iii) Power Circuit

Microcontroller based firing units :

(a) Zero crossing firing units

(b) DC Power supply for system

(c) Micro controller MCS 51 series

(d) Digital Switch input

(e) LCD Display unit

(f) Digital output for SCR firing.

24

Zero Crossing Detector

25

+ve Group -ve Group

RY T1, T5 T4, T2

YB T2, T6 T5, T3

BR T3, T4 T1, T6

RESULT:

PRECAUTIONS:

Q. Discuss the working of single phase full converter in rectifier mode with RLE load?

26

EXPERIMENT NO. 6

OBJECT : To study the single phase ac voltage regulator with resistive and inductive load

APPARATUS USED:

THEORY:Single phase half wave ac voltage regulator use one thyristor in anti parallel with one diode

FIG(A) Single phase half wave ac voltage regulator

Full wave ac voltage controller uses two thyristors connected in anti parallel

FIG(B) : Full wave ac voltage controller

(i) SINGLE PHASE AC VOLTAGE CONTROLLER WITH RESISTIVE LOAD R

Thistor T1 and T2 are forward biased during positive and negative half cycle respectively . During positive half cycle thyristor T1 is triggered at a firing angleα T1 starts conducting and source voltage is applted to load from α to ∏ . At ∏, both e0, i0 fall to zero just after ∏ , T1 is subjected to reverse biase and it is , therefore , turned off . During negative half cycle T2 is triggered at (∏ + α) .T2 conducts from (∏ + α)to 2∏. Soon after 2∏.,T2 is subjected to reverse biase and it is therefore , commutated. Load and source currents have the same waveform

(II) SINGLE PHASE AC VOLTAGE CONTROLLER WITH INDUCTIVE LOAD :

The waveforms for source voltage Es, gate current I g1& Ig2, load and source currents I0&Is , load voltage E0 & thyristor voltages are shown in figure .

27

FIG(A) CIRCUIT DIAG OF SINGLE PHASE AC REGULATOR WITH RL LOAD

PROCEDURE :

RESULT:

PRECAUTIONS:

Q. Explain why the single phase ac regulator using two SCRs must have its trigger sources isolated from each other ?

28

EXPERIMENT NO. 7

OBJECT: To study Single phase Cyclo- converter

APPARATUS USED :

THEORY :

THE BASIC PRINCIPAL OF CYCLOCONVERTER

The basic principle of operation of a cycloconverter can be explained with reference to an equivalent

circuit shown in Fig-‘1’. Each two-quadrant converter is now represented as an alternating voltage

source, which corresponds to the fundamental or wanted voltage component generated at its output

terminals. The diodes connected in series with each voltage source show the unidirectional con-

duction of each two quadrant converter. If the ripple in the output voltage of each converter is

neglected, then it becomes ideal and represents the desired output voltage.

Fig – ‘1’ : Equivalent circuit of Cycloconverter

The basic control principle of an ideal cycloconverter is to continuously modulate the tiring angles of

the individual converters, so that each produces the same sinusoidal a.c. voltage at its output

terminals. Thus, the voltages of the two generators in Fig-‘1’ have the same amplitude, frequency and

phase, and the voltage at the output terminals of the cycloconverter is equal to the voltage of either of

these generators. It is possible for the mean power to flow either "to" or "from" the output terminals,

and the cycloconverter is inherently capable of operation with loads of any phase angle, within a

complete spectrum of 360°.

Because of the unidirectional current carrying property of the individual converters, it is inherent that

the positive half-cycle of load current must always be carried by the positive converter and the

negative half-cycle by the negative converter, regardless of the phase of the current with respect to

the voltage. This means, each two-quadrant converter operates both in its rectifying and in its in -

29

verting region during the period of its associated half-cycle of current. The output voltage and current

waveforms illustrating the operation of the idealized, cycloconverter circuit with loads of various

displacement angles. In Figure displacement angle of the load is 0°.

In this case, each converter carries the load current only when it operates in its rectifying region and

it remain idle throughout the whole period in which its terminal voltage is in the inverting region of

operation. The displacement angle of the load is 60° lagging. During the first 120° period of each

half-cycle of load current, the associated converter operates in its rectifying region, and delivers

power to the load. During the latter 60° period of each half-cycle of load current, on the other hand,

the associated converter operates in its inverting region, and under this condition the load is

regenerating power back into the cycloconverter output terminals, and hence into the a.c. system at

the input side. In Fig the displacement angle of the load is 60° leading. In this case, during the first

60° period of the load current half-cycle, the associated converter operates in its inverting region; and

during the latter 120° period, in its rectifying region.

The displacement angle of the load is 180°. In this case, the load is fully regenerative and it

continuously delivers power into the output terminals of the cycloconverter over the whole period of

each output cycle. Thus, during each half-cycle of current, the associated converter operates

permanently in its inverting region.

Single Phase to Single Phase Cycloconverter

It is a single-phase cycloconverter whose input and output are single phase A.C. The input A.C.

voltage of supply frequency 50 Hz is converted into lower frequency A.C. output. There are mainly

two configurations for this type of cycloconverter, viz. centre-tapped transformer configuration and

bridge configuration.

Fig – ‘2’ (a) & (b)

30

Centre- Tapped Transformer Configuration

Fig-‘3’ shows the power circuit of a single-phase to single-phase cycloconverter employing a centre-

tapped transformer. There are four thyristors, namely, P1, N1, P2, and N2. Out of the four SCRs,

SCRs P1 and P2 are responsible for generating the positive halves forming the positive group. The

other two SCRs, N1 and N2, are responsible for producing the negative halves forming the negative

group.

This configuration is meant for generating 1/3 of the input frequency, i.e. this circuit generates a

frequency of 16 ⅔ Hz at its output. Depending upon the polarities of the points P and Q of the

transformer, SCRs are gated. Natural commutation process is used for turning off the SCRs. This

circuit configuration can be analysed for purely resistive load and R-L load.

Fig – ‘2’ (c) & (d) Waveforms illustrating the operation of idealized cycloconverter circuit with loads of various displacement angles.

31

Fig – ‘3’ Single phase to single phase cycloconverter circuit

(1) With purely resistive load Let us analyse the configuration of Fig-‘3’ for a purely

resistive load. During the first positive half-cycle, when point P is positive and point Q is negative,

SCR P1 being in conducting mode is gated. The current flows through positive point P, SCR P1, load

and the negative point O. In the negative half-cycle, when point Q is positive and point P is negative,

SCR P1 is automatically turned-off and SCR P2 is triggered simultaneously. Path for the current flow

in this condition will be from positive point Q, SCR P2, load and the negative point O. Direction of

flow of current through the load remains the same as in the positive half-cycle. Next moment, again

point P becomes positive and point Q becomes negative, thus, SCR P2 is automatically line

commutated. SCR PI is gated simultaneously. The current path again becomes as in the previous case

when SCR PI was conducting. Thus, it is seen that the direction of flow of current through the load

remains same in all the three half-cycle, or, in other words, the three positive half-cycles are being

obtained across the load to produce one combined positive half-cycle as output.

Similarly, in the next negative half-cycle of the A.C. input, when point Q is again positive and point P

negative, SCR PI is automatically switched off. Now, instead of SCR P2, SCR N1 (which is also in

conducting mode) is gated.

The path for the current flow will be from point Q, load, SCR N1 and back to negative point P. Thus,

the direction of flow of current through the load is reversed. In the next positive half-cycle, point P is

positive and point Q is negative. SCR N1 is automatically turned off. SCR N2 which is in the

conducting mode is simultaneously turned on. The path for the current flow becomes from positive

point P, load, SCR N2 to the negative point Q. Thus, the direction of flow of current through the load

remains the same. For the next negative half-cycle of the A.C. input when point Q is positive and

point P negative, SCR N2 is automatically switched off and SCR N1 is gated. The current flow

through the load again remains in the same direction.

We can thus analyse it as producing one negative half-cycle at the output by combining three negative

halves of the input. In other words, it can be said that, three cycles of the input A.C. have been

32

combined to produce one cycle at the output, i.e. three positive half cycles at the output by the SCRs

PI and P2 whereas, three negative half-cycle of the input A.C. are combined to produce one negative

half cycle at the output by SCRs N1 and N2. This clearly indicates that the input frequency 50 Hz is

reduced to 1/3rd (16 ⅔ Hz) at the output across the load. The input and output waves are shown in

Fig-‘4’. The output voltage magnitude can be changed by varying the firing angle of the SCRs.

Fig – ‘4’ : Input and output waveforms of a 16 ⅔ Hz cycloconverter (pure resistance load)

PROCEDURE

OBSERVATION TABLE

S No. Firing Angle

Voltage at Line

Frequency

Voltage at 1/2 of Line Frequency




RESULT:

PRECAUTION:

Q. Explain the principle of operation of cycloconverter with neat and clean equivalent circuit diagram?

33

EXPERIMENT NO. 8

OBJECT: To study triggering of IGBT, MOSFET & POWER TRANSISTOR

INTRODUCTION

The meaning of triggering of IGBT, Mosfet & Power Transistor is to switch ON the concerning

components. Switch ON means in the case of IGBT collector to emitter should fully internally shorted

i.e. voltage between emitter and collector should be almost zero or few milli volts and in the case of

non triggering conditions emitter to collector voltage fully equal to supply voltage i.e. emitter to

collector internally totally open circuit. In the field the requirement is to operate many or at least two

IGBTs at a time. To make proper electrically isolation in between triggering pulses is required here

we will be discussed the same. Such type of triggering circuit is use for Mosfet and for power

transistor more current is required so driver amplifier is used to drive the power transistor.

THEORY

TRIGGERING OF IGBT

To triggering of IGBT, it is required emitter to gate voltage approximate 10 V DC. To operate at a

time many IGBTs, electrically isolation is required. So it is necessary to use opto coupler for

triggering of IGBTs at a time with perfect electrically isolation. IGBT is voltage operated device so

voltage with current is not required the gate current almost negligible. The output voltage from opto

coupler is sufficient to trigger IGBT.

The gate of IGBT should never hang in air. Because due to available voltage in air the IGBT may

partially ON and may heat & damage so its gate to emitter a high ohmic resistance approximate 10K

is hard coupled. The IGBTs is the combination of Mosfet & power transistor to use at high voltage

switching.

TRIGGERING OF MOSFET

All the features to trigger the Mosfet is same as IGBT, only difference is Mosfet is used for low

voltage switching. Safety measures 10K resistance is also required. Source to gate voltage

approximate 10 V DC is required. Same electrically isolation is required which is operate by opto

coupler.

TRIGGERING OF POWER TRANSISTOR

Transistor is a current operated device to switching it the requirement is low voltage but few milli

amp current also. The output of opto coupler is fed to a driver transistor and transistor will provide

sufficient power to drive a power transistor. Power transistor mostly used for high voltage and high

frequency switching.

34

EXPERIMENTAL PROCEDUREExperiment No. 1Study of Triggering Generator


2. Observe the wave form at different TPs as given in Fig ‘2’.

3. Observe the wave form at TP1 at mono trace mode.

4. Observe the wave form at TP2 & TP3 at dual trace mode.



Experiment No. 2Triggering of IGBT

1. Connect the patch cords as given in Fig ‘3’.

2. Keep frequency minimum.

3. Connect the CRO with 10:1 attenuator.

4. Observe the Wave Forms as given in Fig-‘4’.

Experiment No. 3Triggering of Mosfet





Experiment No. 4Triggering of Power Transistor





RESULT

PRECAUTIONS

(a) Do not switch the any component without load.

(b) 10K resistance between gate and emitter/source should not open.

Q. Explain the operation of transistor as switch?

35

EXPERIMENT NO. 9

OBJECT: To study operation of IGBT / MOSFET chopper circuit

INTRODUCTION

There are several ways to the speed control of the DC Motor using DC source. The chopper based DC

motor speed control is one of them. In this method we makes ON and OFF the DC supply to the

motor with frequency as required. If the higher speed of motor required, the ON portion of wave will

increase accordingly. At full speed the ON portion is 100% and at zero speed the OFF portion is

100%.

THEORY

Consider the circuit diagram as given in Fig-‘1’. Here an triangular pulse generator is used by IC-1,

IC-2 and associate components R1, R2, R3, R4, R5, VR1, C1, etc. IC-1 is and integrator and IC-2 is a

comparator. The output of comparator is fed to the input of integrator through resistance R5, VR1 and

R1. The output of integrator is fed to the comparator through resistance R2. In this way by making the

feedback an oscillation forms, a triangular and square waves generates at TP1 and TP2.

The triangular wave is our requirement and fed to another comparator using IC-3 through capacitor

C2. The reference voltage is variable i.e. -12V to +12V. As the triangular wave voltage increases the

reference voltage, the output appears at pin No 6 and as the triangular wave voltage decreases the

reference voltage, the output at pin No 6 disappear.

If the total triangular wave is more than the reference voltage, the output voltage at pin No 6 become

continues. If the total triangular wave is less than the reference voltage the output at pin No 6 will

permanently disappear.

The output of pin No 6 is fed to and amplifier using transistor T1 and the output of T1 is fed to the

gate of IGBT which is in series of the load and DC supply.


Experiment No. 1

Study of Triangular Wave Generator

1. Keep the Freq adj at minimum.

2. Connect the CRO ground point.

3. Switch ON the MCB.

4. Observe the wave shape at TP1 as given in fig-‘2’.


6. Move the Freq adj at center.

7. Observe the wave shape at TP1 freq is increasing.

38

Experiment No. 2Study of ON-OFF Circuit


2. Keep the Speed adj at minimum.

3. Connect the CRO ground point.



6. Move the Speed adj at center.


8. Move the Speed adj at maximum.


Experiment No. 3Observation of Load Supply Chopping



3. Connect the CRO to load using attenuator.

4. Connect the lead as give in Fig –‘4’.


6. Observe the wave shape across the load.

7. Move the Speed adj and observe the wave shape across the load.

8. Move the freq adj and observe the wave shape across the load.

Experiment No. 4Observation of Motor Speed control using Chopping the DC supply



3. Connect the lead as give in fig –‘5’.

4. Connect the motor as given in fig-‘5’.


6. Increase the speed adj and motor speed increasing accordingly.

7. Observe that the voltage across the motor is also increasing accordingly.

RESULT:

PRECAUTIONS

1. Use 1:10 Attenuator observing the wave at CRO.

2. Move the freq adj and speed adj knob gently.

Q. Draw and explain the working of any chopper firing circuit ?

39

EXPERIMENT NO. 10

OBJECT: To study MOSFET/IGBT based single phase series resonant inverter

APPARATUS USED:

INTRODUCTION

Inverter is a unit to change DC supply to AC. There are several methods to achieve the same.

Selection of method is depending upon our required AC data and DC availability. One question

arrives that Oscillator is also used for the same purpose. What is the difference between Oscillator and

Inverter? The oscillator is used to generate few milli watts and KHz AC. The circuit efficiency is

inconsiderable factor and frequency accuracy is most important. But by inverter AC generated in

several Watts or KWs at 50 Hz or nearby frequency. Here efficiency is most considerable factor. The

Series inverter has higher efficiency to generate AC wave. Generating frequency can vary by the

potentiometer. Generated wave can be observed at CRO. The circuit is operated at 110 V DC. At

short circuit condition, a protective resistance 200 W Lamp is given. The circuit alongwith power

supply is capable to tolerate the short circuiting by the Mosfet upto one or two minutes alongwith

protective resistance.

THEORY

Explanation of Series Inverter Diagram using Mosfet

Consider the fig ‘2’, the first gate wave will appear at Mosfet-1. So this Mosfet will fire and a current

will flow from 110V DC to Mosfet-1, Inductor, load & Capacitor C2. At the time of appearing the

gate wave at Mosfet-1, the gate wave at Mosfet-2 will remain zero. The current will flow upto the

charging of C2 only.

Now after disappearing/zeroing the gate wave at Mosfet-1, the gate wave at Mosfet-2 will appear and

the current will flow through C2, load, Inductor and Mosfet-2 in opposite direction with respect to

previous case. Alongwith discharging the C2 the C1 charging current will also flow. This path will be

110V DC, C1, load, Inductor and Mosfet-2. This process will repeat.

ASSOCIATE CIRCUIT

Here are two circuits associating the operation of Series Inverter study using Mosfet.

1. Isolated 110V DC Power Supply Circuit.

2. Gate Frequency Generator.

45

EXPERIMENTAL PROCEDUREExperiment No. 1

Observation of Gate Waves


2. Keep maximum frequency.

3. Keep the CRO at dual trace mode.

4. Connect the CRO channel first at gate wave 1 and lock it.

5. Connect the CRO channel second at gate wave 2.

6. Observe the Gate Wave as given in Fig-‘3’.

Experiment No. 2To Study Series Inverter using Mosfet

1. Connect the main lead.

2. Consider the Fig-‘4’.

3. Connect the 110V DC.

4. Connect the load.

5. Connect the Gate Waves G1, S1 with Mosfet-1.

6. Connect the Gate Waves G2, S2 with Mosfet-2.

7. Keep minimum frequency.

8. Switch On the demostration board.

9. Now connect the CRO with load through 10:1 Resistive Attenuator.

10. Now increase the frequency of gate waves.

11. The wave will be near about as given in Fig-‘5’.

RESULT:

PRECAUTIONS

Respective gate wave should be connected respective Mosfets.

Q. Explain simple SCR series inverter circuit employing Class A type commutation

46

EXPERIMENT NO. 11

OBJECT :To study MOSFET/IGBT based single phase bridge inverter

INTRODUCTIONInverter is a unit to change DC supply to AC. There are several methods to achieve the same.

Selection of method is depending upon our required AC data and DC availability. One question

arrives that Oscillator is also used for the same purpose. What is the difference between Oscillator and

Inverter? The oscillator is used to generate few milli watts and KHz AC. The circuit efficiency is

inconsiderable factor and frequency accuracy is most important. But by inverter AC generated in

several Watts or KWs at 50 Hz or nearby frequency. Here efficiency is most considerable factor. The

bridge inverter has higher efficiency to generate AC wave. Generating frequency can vary by the

potentiometer. Generated wave can be observed at CRO. The circuit is operated at 110 V DC. At

short circuit condition, a a protective resistance 200 W Lamp is given. The circuit alongwith power

supply is capable to tolerate the short circuiting by the IGBT upto one or two minutes alongwith

protective resistance.

THEORY

Explanation of Bridge Inverter Diagram

Consider the fig ‘2’, the first gate wave will appear at IGBT-1 & 2. So these IGBT will fire and a

current will flow from 110V DC to IGBT-1, load & IGBT-2. At the time of appearing gate wave at

IGBT-1 & 2, the gate wave at 3 & 4 will remain zero.

Now after disappearing/zeroing the gate wave No 1 & 2, the gate wave of 3 & 4 will appear and the

current will flow through load in opposite direction with respect to previous case. The current will

flow from 110V DC to IGBT-3, load and IGBT-4. This process will repeat.

ASSOCIATE CIRCUIT

Here are two circuits associating the operation of Bridge Inverter study using IGBT.

1. Isolated 110V DC Power Supply Circuit.

2. Gate Frequency Generator.


Experiment No. 1Observation of Gate Waves


2. Keep maximum frequency.

3. Keep the CRO at dual trace mode.

4. Connect the CRO channel first at gate wave 1 and lock it.

5. Connect the CRO channel second at gate wave 2, 3 and 4 one by one.

6. Observe the Gate Wave as given in Fig-‘3’.

49

Experiment No. 2To Study Bridge Inverter

1. Connect the main lead.

2. Consider the Fig-‘4’.

3. Connect the 110V DC.

4. Connect the load.

5. Connect the Gate Waves 1a, 4a, 1, 4, 3, 2, 3a and 2a with bridge inverter circuit.

6. Keep all the pots in most anti clockwise position.

7. Switch On the demostration board.

8. Now connect the CRO with load.

9. Now increase the frequency of gate waves, positive width control and negative width

control slowly.

10. The wave will be near about as given in Fig-‘5’.

RESULT

PRECAUTIONS

Respective gate wave should be connected respective IGBTs.

Q. What is Pulse Width Modulation?

50

EXPERIMENT NO.12

PROBLEM: Obtain PSPICE simulation of SCR and GTO thyristor.

EXPERIMENT NO.13

PROBLEM : Obtain PSPICE simulation of POWER TRANSISTOR and IGBT.

EXPERIMENT NO. 14

PROBLEM : Obtain PSPICE simulation of single phase fully controlled bridge rectifier and draw load voltage and load current waveform for inductive load

EXPERIMENT NO. 15

PROBLEM: Obtain PSPICE simulation of single phase full wave ac voltage controller and draw load voltage and load current waveform for inductive load

EXPERIMENT NO.16

PROBLEM: Obtain PSPICE simulation of step down DC chopper with LC output filter for inductive load and determine steady state values of output voltage ripplesin output voltage and load current

54

ANALOG & DIGITAL COMMUNICATION LAB TEC-656

EXPERIMENT LIST

1. To Study Amplitude Modulation using transistor and determine depth of modulation.

2. To Study generation of DSB-SC signal using balance modulator.

3. To study generation of SSB-SC signal.

4. Realization of data in different forms, such as NRZ-L, NRZ-

5. To study PSK-Modulation system.

6. To study FSK-Modulation system.

7. To study of sampling through a Sample-Hold circuit and reconstruction of sampled signal

8. Frequency modulation using voltage controlled oscillator

9. Study of phase Lock Loop and detection of FM signal using PLL

10. Measurement of noise figure using a noise generator.

11. Study of Super heterodyne AM Receiver and measurement of sensitivity, selectivity &

fidelity.

12. Study the Envelop Detector for demodulation of AM Signal and Observe diagonal peak

clipping effect.

55

EXPERIMENT NO. 1

OBJECT:- To Study Amplitude Modulation using a transistor and determine depth of modulation.

EQUIPMENTS: - Modules ACT-01, ACT-02, Power Supply +/- 12V D.C, CRO, Connecting Links.

THEORY: - In amplitude modulation, the amplitude of the high frequency carrier signal changes in accordance with the instantaneous amplitude of the low frequency modulating signal. The frequency and phase of the carrier signal remains constant.

PROCEDURE:-

1. Refer the figure and make the following connections.

2. Connect output of generator (ACT-02) OUT POST (6) to the input of balance modulator1 (ACT-02) SIGNAL POST (2).

3. Connect output of VCO 2. (ACT-01) RF/FMOUTPUT POST (12) to the input of balance modulator1 (ACT-01) CARRIER POST (1).

4. Connect power supply with proper polarity to the kit.

5. Carry out the following presetting:

6. Function generator: level output about 0.5VPP , frequency about 1KHz .

7. VCO2: level about 1 VPP , frequency about 450 KHz.

8. Balance modulator 1: Carrier Null completely rotated clockwise or counter clockwise, so as “unbalance” the modulator and obtains an AM signal with not suppressed carrier across the output, OUT LEVEL in fully clockwise.

9. Connect the CRO to the input of the modulator1 (POST2&1) and detect the modulating signal and the carrier signal.

10. Move the probe from OST1 to POST3 (output of the modulator), and detect the amplitude-modulated signal.

11. Note that the modulating signal envelope corresponds to the waveform of the modulating signal.

OBSERVATIONS:-

Vary the amplitude of the modulating signal and check the 3 following conditions: -Modulation percentage lower than 100%, equal to 100% and more than 100%.

RESULT:- The operation of AM modulator has been studied.

PRECAUTIONS:-

1) Don’t make loose connection.2) Check the connections before switch ON the power supply.

56

EXPERIMENT NO. 2

OBJECT: - To study the generation of DSB-SC signal using balance modulator.

EQUIPMENTS: - Modules ACT-01, ACT-02, Power Supply +/- 12V D.C, CRO, Connecting Links.

THEORY: - In amplitude modulation, the amplitude of the high frequency carrier signal changes in accordance with the instantaneous amplitude of the low frequency modulating signal.

The frequency and phase of the carrier signal remains constant.

PROCEDURE:-1. Refer the figure and make the following connections.2. Connect output of generator (ACT-01) OUT POST (6) to the input of balance modulator1

(ACT-02) SIGNAL POST (2).3. Connect output of VCO 2. (ACT-01) RF/FM OUTPUT POST (12) to the input of balance

modulator1 (ACT-01) CARRIER POST (1).4. Connect power supply with proper polarity to the kit.5. Carry out the following presetting:6. Function generator: level output about 0.5VPP , frequency about 1KHz .7. VCO2: level about 1 VPP , frequency about 450 KHz.8. Balance modulator 1: Carrier Null completely rotated clockwise or counter clockwise, so as

“unbalance” the modulator and obtains an AM signal with not suppressed carrier across the output, OUT LEVEL in fully clockwise.

9. Connect the CRO to the input of the modulator1 (POST2&1) and detect the modulating signal and the carrier signal.

10. Move the probe from OST1 to POST3 (output of the modulator), and detect the amplitude-modulated signal. Note that the modulating signal does not correspond to the envelope of the modulating signal.

OBSERVATIONS:-

RESULT: - The generation of DSB-SC signal using balance modulator has been studied.

PRECAUTIONS:-

1) Don’t make loose connection.2) Check the connections before switch ON the power supply

57

EXPERIMENT NO. 3

OBJECT:- To study the generation of single side band.

EQUIPMENT: Module ACT-01, ACT-02,ACT-03,+\-12Vd.c.Power Supply, CRO, Connecting links.

THEORY:-

The AM wave consists of the three sine components: carrier, lower side band and upper side band. The carrier takes no information, as it keeps constant in amplitude as well as in frequency independently from the modulating signal. The two side bands are exactly one ofthe images of the other. So all the information an be transmitted using one single side band.In respect to the amplitude modulation single side band represent the following advantages:

1. The band of modulated signal is reduced to to half. This means that in the same range of frequencies, there can be a double numbers of common channels.

2. All power is carried by the transmitter is associated to the information to be transmitted differently from the AM in which most power is associated to carrier.The purpose of method is used for generation of a SSB signal; to suppress the carrier and one side band. The balance modulator generates DSB-SC and by using a ceramic filter at the output of balance modulator the SSB signal can be generated.

PROCEDURE:-1. Make the connection as shown in block diagram and switch ON the power supply.

2. Carry out following presetting: 3. Function generator: level output about 0.5VPP, frequency about 10 KHz. 4. VCO1: level about 2 VPP, shifter on 1500 KHz frequency about 900 KHz.5. VCO2: level about 1 VPP, frequency about 450 KHz. 6. Sweep: depth almost completely counters clockwise.7. RF Detector Level completely clockwise.8. Balance modulator 1: Carrier null in central position, so that AM signal with suppressed

carrier is obtained across the o/p level in max. Position.9. Balance modulator 2: Carrier null in central position, so that the circuit operates as frequency

converter (Balance modulator with suppressed carrier); OUT LEVEL in max. Position.10. Vary the frequency of VCO2. To obtain the best waveform adjust: the deviation of SWEEP

generator (depth) fully clockwise. Vary VCO1 carrier to obtain at centre, the band pass of ceramic filter.

11. Vary the frequency, amplitude and wave form of modulating signal and examine the o/p spectrum.

RESULT: - The single side band has been studied. PRECAUTIONS:-


58

EXPERIMENT NO. 4

OBJECT: - Realization of data in different forms, such as NRZ-L, NRZ-M & RZ.

EQUIPMENT:-1. Pulse code modulation Trainer-ST-21032. Data formatting and carrier modulation Transmitter Trainer ST-21063. CRO4. Connecting links

THEORY:- The symbol 0&1 in digital system can be represented in various format with deferent levels and wave forms, the selection of particular format for communication depends on the system band width system ability to pass DC level information, error checking facility, clock generation & synchronization at receiver, complexity & cost etc.NON RETURN TO ZERO LEVEL (NRZ) L:-It is the simplest form of data representation .The NRZL wave form simply goes low for one bit time represents a data 0& high for one bit tome to represent a data 1. Thus the signal alternates only when there is a data change.NON RETURN TO ZERO (MARK) NRZ (M):-The NRZ (M) code is very similar to the NRZ (L) code. Here if logic 1 is to be transmitted. The new level is inverse of the previous level i.e. change in level occurs. If a data 0 is to be transmitted the level remains unchanged. Thus in the case of NRZ (M) wave form the present level is related to the previous level.

A change means logic ‘1’No change means logic ‘0’

PROCEDURE:-

1. Set ST-2103 Trainer mode switch in fast position.2. Set ST-2103 Trainer PSEUDO-RANDOM SYNC CODE GENERATOR switched ‘OFF’3. Set ST-2103 Trainer ERROR CHECK CODE SELECTOR switched A and B in A=0 and

B=0 position 4. All switched faults OFF.5. Set ST-2106 Trainer mode switch in position ‘1’6. Connect TX-CLOCK OUTPUT (t.p.3) of ST2103TO TX>CLOCK INPUTOF ST2106.7. Connect PCM OUTPUT (t.p.44) of ST2103TOTX>DATA INPUT OF ST-2106.8. Connect TX.. OUTPUT (t.p.4) on ST2103 Trainer to external trigger in put of the

oscilloscope to adjust the trigger level manually to obtain stable waveform.9. Connect function generator out put CH0 INPUT on 2103 Trainer.10. Connect CH0 INPUT to CH.1 INPUT on 2103trainer.11. Make rest of the connections to as shown in figure.12. Trace the wave form of data in different formats such as NRZ-L,NRZ-M& NRZ-S

RESULT: - Wave form of different formats has been observed on CRO.

PRECAUTIONS: -

1) Don’t make a loose connection.2) Check the connections before switch on the power supply.3) Check all switches carefully.

59

EXPERIMENT NO. 5

OBJECT: - Study of frequency shift keying (FSK) Modulation & demodulation.

EQUIPMENTS: -

1. Data formatting Trainer (2106)2. Data formatting Trainer (2107)3. PCM Trainer (2103)4. PCM Trainer (2103)5. CRO6. CROP robes7. Connecting links

THEORY:-Simplest method of modulating a carrier with a data stream is to change the amplitude of the carrier wave every time the data changes. The modulating technique is known as amplitude shift keying.The simplest way of achieving ASK is by switching ON the carrier whenever the data bit is 1 and switching OFF when the data bit is a 0 i.e. the transmitter outputs the carrier for a 1 and totally suppresses the carrier for a 0. This technique is known as ON- OFF keying.Thus

DATA = 1 CARRIER TRANSMITTED DATA = 0 CARRIER SUPPRESSED

PROCEDURE: -

1. Set ST2103 trainer mode switch in FAST position.2. Set ST2103 trainer PSEUDO-RANDOM SYNC CODE GENERATOR switched OFF.,3. Set ST2103 trainer ERROR CHECK CODE SELECTOR switches A and B in A = 0 and B =

0 position.4. All switches faults OFF.5. Set ST2106 trainer mode switch in position 16. Set ST2104 trainer mode switch in FAST position 7. Set ST2104 trainer PSEUDO-RANDOM SYNC CODE DETECTOR ON.8. Set ST2104 trainer ERROR CHECK CODE SELECTOR switches A and B in A =0 and B =

0 position.9. All switches faults OFF.10. Connect TX CLOCK OUTPUT (tp3) of ST2103 TO TX CLOCK INPUT of ST2106.11. Connect PCM OUTPUT (t.p.44) of ST2103 TO TX. DATA INPUT of ST2106.12. Connect TX OUTPUT (t.p.4) on ST2103 trainer to external trigger input of the oscilloscope

to adjust the trigger level manually to obtain a stable waveform.13. Connect function generator output CH0 INPUT on ST2103 trainer.14. Connect the CH0 INPUT TO CH1 INPUT on ST2103 trainer.15. Make rest of the connection to as shown in fig16. Trace the waveform of modulating signal, modulated signal and demodulated signal.

RESULT: - The operation of Frequency Shift keying (FSK) modulator and de modulator has been studied.PRECAUTIONS: -

1. Don’t make loose connection.2. Check the connection before switch ON the power supply.3. Check the all switch faults carefully.

60

EXPERIMENT NO. 6

OBJECT: - Study of the phase shift keying.EQUIPMENT: -

1. Data formatting Trainer (2106)2. Data formatting Trainer (2107)3. PCM Trainer (2103)4. PCM Trainer (2104)5. Function generator6. CRO7. CROP robes8. Connecting links

THEORY: -Phase shift keying involves the phase change of the carrier sine wave between 0&180 in accordance with the data stream to be transmitted. Phase Shift Keying is also known as phase reversal Keying (PSK).The PSK modulator is very similar to ASK modulator .both uses balanced modulator to multiply the carrier with the modulating signal. But in contrast , to ASK technique ,the digital signal applied to the modulation input for PSK generation is bipolar i.e. have equal positive and negative voltage level .When the modulating input is positive , the output of the modulator is a sine wave 9iin phase with the carrier input .Where as for the negative voltage level’s ,the out put of modulator is a sine wave ,which is shifted out of phase by 180 from the carrier input .This happens because the negative constant level now multiples the carrier input.

DATA = 1 CARRIER IN PHASE DATA = 0 CARRIER OUT OF PHASE

PROCEDURE: -

1. Set ST2103 trainer mode switch in FAST position.2. Set ST2103 trainer PSEUDO-RANDOM SYNC CODE GENERATOR switched OFF.,3. Set ST2103 trainer ERROR CHECK CODE SELECTOR switches A and B in A = 0 and B =

0 position.4. All switches faults OFF.5. Set ST2106 trainer mode switch in position 16. Set ST2104 trainer mode switch in FAST position 7. Set ST2104 trainer PSEUDO-RANDOM SYNC CODE DETECTOR ON.8. Set ST2104 trainer ERROR CHECK CODE SELECTOR switches A and B in A =0 and B =

0 position.9. All switches faults OFF.10. Connect TX CLOCK OUTPUT (tp3) of ST2103 TO TX CLOCK INPUT of ST2106.11. Connect PCM OUTPUT (t.p.44) of ST2103 TO TX. DATA INPUT of ST2106.12. Connect TX OUTPUT (t.p.4) on ST2103 trainer to external trigger input of the oscilloscope

to adjust the trigger level manually to obtain a stable waveform.13. Make the rest connection as shown in fig .114. To observe the PSK modulated and demodulated wave form the CRO.

RESULT: -The modulating signal, modulated signal and demodulated signal traced out from CRO are

similar to theatrical signal.

PRECAUTIONS: -

1. Don’t make loose connection.2. Check the connection before switch ON the power supply.3. Check the all switch faults carefully.

61

EXPERIMENT NO. 7

OBJECT-: To study sampling through a Sample-Hold circuit and reconstruction of the sampled signal

EQUIPMENTS: 1. Sampling and reconstruction kit ST-21012. CRO3. Connecting links

THEORY:- Sampling can be defined as measuring the value of an information signal at predetermined time intervals. The rate of which the signal is sampled is known as the sampling rate or sampling frequency.It is the major parameter, which decided the quality of, reproduce signal. If signal is sampled quit frequency (Whose limit is specified by nyquist criteria), then it can be reproduce exactly at the receiver with no distortion.S sampling is a process of taking the instantaneous value of the analog information at predetermined time interval. The analog signal is first sampled according to the nyquist criteria. Nyquist criteria states that for faithful reproduction of the limited signal are sampling rate must be at least twice the highest frequency component present in the signal.Sampling frequency>2fmThe sampled value is the allocated binary codes, which define a narrow range of amplitude value. Each binary word define particular amplitude level .The sampled value is then approximated to the nearest amplitude level.

PROCEDURE:-1. Connect the signal of 1 KHz frequency to the input of sample & hold circuit.2. Keep the switch on internal condition to connect the duty cycle.3. To reconstruct the signal pass it trough second & fourth order Butterworth filter.

OBSERVATION:-

1. Change the frequency of sampling frequency generator and observe the effect on sampled and hold o/p on CRO.

2. Changes the duty cycle from duty cycle selector switch observe the effect on sampled and hold o/p on CRO.

3. The o/p of fourth order butter worth filter is smoother than second order butter worth filter.

RESULT:-The effect of sampling rate &width of the sampling pulse has been studied.

PRECAUTIONS:-

1. Don’t make a loose connection.2. Check the connections before switch on the power supply.3. Check the all switch faults carefully

62

EXPERIMENT NO. 8

OBJECT: - Study of frequency modulation using voltage controlled oscillator.

EQUIPMENT:- FM Trainer Kit, CRO , Connecting Links.THEORY:-

FREQUENCY MODULATION: It is the type of modulation in which the frequency of carrier signal varies in accordance with the instantaneous value of modulating signal. The amplitude of modulated carrier wave remains constant.The modulation index for FM is defined as the ratio of maximum frequency deviation to modulating frequency. In mathematical form, mf =_δ/ fm

mf = Modulation Indexδ = Max frequency Deviationfm = Modulating Frequency

PROCEDURE:-1) Make the connection as shown in block diagram and switch ON the power supply. 2) Observe the carrier signal and AF signal on a dual trace CRO.3) Connect AF signal to the modulators input and observe the modulating signal and

FM output on a dual trace CRO.4) Calculate max. Frequency and the min. frequency from the FM output and calculate

modulation index.

OBSERVATION TABLE:-

SL. NO. FREQUENCYDEVIATION

MODULATINGFREQUENCY

MODULATIONINDEX ( mf )

1.

2. 3. 4.

PRECAUTIONS: 1) Don’t make loose connection.2) Check the connections before switch ON the Power supply.

63

EXPERIMENT NO. 9

OBJECT: - Study of phase lock loop & detection of FM signal using PLL.

EQUIPMENT:- Trainer Kit, CRO , Connecting links.

THEORY:- The process of recovering original modulating signal from frequency modulated wave is known as frequency demodulation.During the demodulation Fm output is given to a phase lock loop ( IC-565 ).During lock state the average d.c level of the phase comparator output is directly proportional to the frequency of the input signal. As the frequency shifts it is output which causes the VCO to shift and keep tracking .In other words the phase comparator output is an exact replica of the original modulating audio signal.

PROCEDURE:-

1) Connect FM signal to PIN NO. 2 of an IC-565 of FM Demodulator Kit.2) Observe the output waveform on CRO.

RESULT:- The operation of FM demodulation has been studied. PRECAUTIONS:-

1. Don’t make loose connection.2. Check the connections before switch ON the power supply.

Block diagram of phase lock loop ( IC -565 )

64

EXPERIMENT NO. 10

OBJECT: - Measurement of noise figure using a noise generator.

EQUIPMENT: - Module ACT–01, ACT–05, Power Supply+/-12V, CRO, Connecting Links.THEORY:- NOISE: - Electrical disturbance interface with signals, producing noise. Noise may be defined in electrical terms as any unwanted introduction of energy tending to interface with the proper reception & reproduction of transmitted signals.FLICKER: - At low audio frequency, a properly understood form of noise called flicker or modulation noise is found in transistors. It is proportional to emitter current & junction temperature, but since it is inversely proportional to frequency, it may be completely ignored above 500 Hz.NOISE FIGURE: -Noise figure F is defined as the ratio of the signal-to-noise power supplied to the input terminals of a receiver or Amplifier to the signal-to–noise power supplied to the o/p or load resistor.

F =

Si/Ni

F = ------------- SO /NO

Where signal-to-noise ratio S/N is defined as the ratio of signal power to noise power at the same point.

S = Signal N = Noise power

= =

S Vs 2 --------- = --------- N Vn

2

The noise figure may be expressed as an actual ratio or in decibels. PROCEDURE:-

1. Connect the sinusoidal input from function generator to ACT-05.2. Connect the oscilloscope to the channel output of ACT-05 (between output and ground port

of the channel and noise section).3. Increase the noise level and check that maximum amplitude of about 500 mVpp is obtained.

OBSERVATIONS:-1. Reset the noise level and examine the output. 2. Vary the attenuation check that the output varies from a minimum of is about the input

amplitude.3. Vary the input signal frequency and check that the channel presents an almost flat response.

RESULT: - As we increase the noise level the frequency response has been distorted.

PRECAUTIONS:-

65


EXPERIMENT NO. 11

OBJECT: - To study of super heterodyne AM receiver & measurement of sensitivity, selectivity & fidelity.

EQUIPMENT: - Modules ACT-01, ACT-02, ACT-03, +\-12 Vd.c. Power Supply, connecting links. THEORY:-The heterodyning gives a far better performance than the TRF receiver. Significient feature of the heterodyne receiver is that incoming radio frequencies are converted into a single intermediate frequency fi by the heterodyning mixing process. The incoming carrier frequency fc & a locally generated signal fi are mixed in mixer, also referred to as first detector. The mixer generates the sum and difference frequencies at the output. The difference frequency (fi- fc) is commercial radio receiver is fixed to 455 KHz.

FIDELITY: -The ability of receiver to reproduce faithfully all the frequency components present in the base band signal is called fidelity.

SELECTIVITY: - In properly tuned circuit, the local oscillator frequency is higher than the carrier i.e. f i > fc that is why the receiver is called super heterodyne receiver.The selectivity of super heterodyne receiver is also decided mainly by IF amplifier operates at fixed center frequency of 455 KHz. The Q-factor required by a tuned circuit is given by the - Q = f r / B.W f r = Resonance frequency of tuned circuit / B.W –Bandwidth

SENSTIVITY: - The sensitivity of super heterodyne receiver is primarily decided by the I.F. Amplifier stage. A high gain I.F. Amplifier provides a better sensitivity than TRF Receiver.

PROCEDURE: - 1) Make connections according to the figure.2) Connect the power supply with proper polarity to the kit.3) Carry out the following presetting:-

a. Connect the jumpers J4, J9, J10, J12 to ACT-03 (To obtain IF Amplifier/Detector)b. Function Generator: Sine wave (J1); Frequency about 1KHz; Amplitude about 200mVpp.c. VCO2: LEVEL about 200mVpp; Frequency 900 KHz.d. BALANCE MODULATOR 1: CARRIER NULL completely clockwise or counter

clockwise so to “unbalance” the modulator and to obtain an AM signal with not suppressed carrier; adjust the OUT LEVEL to obtain an AM signal across the output with amplitude of about 10mVpp.

e. VCO1: LEVEL about 0.5Vpp, Frequency about 1355KHz.f. Set the amplitude of modulating signal to zero. Connect the CRO to the output of the mixer

(Post 3 of ACT-03).g. Connect the CRO to the output of the IF Amplifier (POST 15 of ACT-03).h. Connect the CRO to POST 1 and 15 of ACT-03).i. Vary the amplitude of the RF Receiver (POST of act-03)

66

OBSERVATIONS:-

1. Introduce a modulation in the RF carrier (increase the LEVEL of the function generator of ACT-01).

2. Examine the Am signal before and after the mixer (POST1&3 of ACT-03). Check that carrier frequencies are different.

3. Connect the CRO before and after the detector diode (POST15 and 17 of ACT-O3) and measure the AM signal and detected the signal.

RESULT: -The operation of AM Super heterodyne Receiver has been studied.

PRECAUTIONS: -1) Don’t make loose connection.2) Check the connections before switch ON the power supply. 3) Check the jumper setting carefully.4) Set the frequency of signal carefully.

67

EXPERIMENT NO. 12

OBJECT: - To Study the Envelop Detector for demodulation of AM Signal and Observe diagonal peak clipping effect.

.EQUIPMENTS: - Modules ACT-01, ACT-02, ACT-03, Power Supply +/- 12VD.C, CRO,

Connecting Links.

THEORY: - In case of AM wave in which the carrier frequency is much larger than the message bandwidth and the percentage modulation is less than 100%. It can be easily seen that the envelope of AM wave looks like the modulating signal. Thus, the desired demodulation can be accomplished by extracting envelope of the of the resultant AM wave. The extraction of modulating signal from an AM signal can be carried out using an envelope detector. An envelope detector produces an output signal that follows the envelope of the input signal waveform exactly. The detector consists of a diode and a resistor capacitor filter.

PROCEDURE:-1) Refer the figure and make the following connections.2) Connect output of generator (ACT-02) OUT POST(6) to the input of balance modulator1

(ACT-02) CARRIER POST (1).3) Connect output of VCO 2. (ACT-01) RF/FM OUTPUT POST(12) to the input of balance

modulator1 (ACT-02) CARRIER POST (1).4) Connect power supply with proper polarity to the kit.5) Carry out the following presetting:

a. Function generator: level output about 0.5VPP , frequency about 1KHz .b.VCO2: level about 200m VPP , frequency about 450 KHz.c. Balance modulator 1: Carrier Null completely rotated clockwise or counter clockwise, so as

“unbalance” the modulator and obtains an AM signal with not suppressed carrier across the output, OUT LEVEL in fully clockwise.

6) Observe the modulated signal envelope which corresponds to the wave form of the modulating signal at OUT POST (3) of ACT (02).

7) connect only the following jumpers -: ACT (03): J3, J5, J6, J8, J10 & J12.

8) Connect the o/p of balance modulator1 (ACT-02) OUT POST (3) to the i/p of IF Amplifier (ACT-03) POST (12).

9) Connect the CRO before and after the detector diode POST15&17 of ACT-03) and detect the AM signal.

10) Move the jumper from J8 to J9 and check that the negative envelope is detected.

OBSERVATIONS: - Vary the amplitude of the modulating signal and check the positive and negative envelope of AM signal.

RESULT: - The operation of envelope detector has been studied.

PRECAUTIONS:-


68

Manual Ee Vi

Documents

Transcript of Manual Ee Vi