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PLASMA TVSERVICE MANUALCAUTIONBEFORE SERVICING THE CHASSIS,READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
CHASSIS : PD81A
MODEL : 32PG6000 32PG6000-ZA
website:http://biz.LGservice.com
Internal Use Only
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- 2 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
CONTENTS
CONTENTS .............................................................................................. 2
SAFETY PRECAUTIONS ..........................................................................3
SPECIFICATION ........................................................................................4
ADJUSTMENT INSTRUCTION .................................................................7
TROUBLE SHOOTING ............................................................................12
BLOCK DIAGRAM...................................................................................21
EXPLODED VIEW .................................................................................. 30
SVC. SHEET ...............................................................................................
PRINTED CIRCUIT DIAGRAM ....................................................................
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- 3 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
SAFETY PRECAUTIONS
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in theSchematic Diagram and Replacement Parts List. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to preventX-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during theservicing of a receiver whose chassis is not isolated from the ACpower line. Use a transformer of adequate power rating as thisprotects the technician from accidents resulting in personal injuryfrom electrical shocks.
It will also protect the receiver and it's components from beingdamaged by accidental shorts of the circuitry that may beinadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this monitor is blown, replace itwith the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,over 1W), keep the resistor 10mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Due to high vacuum and large surface area of picture tube,extreme care should be used in handling the Picture Tube.Do not lift the Picture tube by it's Neck.
Leakage Current Cold Check(Antenna Cold Check)With the instrument AC plug removed from AC source, connect anelectrical jumper across the two AC plug prongs. Place the ACswitch in the on position, connect one lead of ohm-meter to the ACplug prongs tied together and touch other ohm-meter lead in turn toeach exposed metallic parts such as antenna terminals, phonejacks, etc. If the exposed metallic part has a return path to the chassis, themeasured resistance should be between 1M and 5.2M. When the exposed metal has no return path to the chassis thereading must be infinite.An other abnormality exists that must be corrected before thereceiver is returned to the customer.
Leakage Current Hot Check (See below Figure) Plug the AC cord directly into the AC outlet.Do not use a line Isolation Transformer during this check. Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitorbetween a known good earth ground (Water Pipe, Conduit, etc.)and the exposed metallic parts.Measure the AC voltage across the resistor using AC voltmeterwith 1000 ohms/volt or more sensitivity.Reverse plug the AC cord into the AC outlet and repeat AC voltagemeasurements for each exposed metallic part. Any voltagemeasured must not exceed 0.75 volt RMS which is corresponds to0.5mA.In case any measurement is out of the limits specified, there ispossibility of shock hazard and the set must be checked andrepaired before it is returned to the customer.
Leakage Current Hot Check circuit
1.5 Kohm/10W
To Instrumentsexposed METALLIC PARTS
Good Earth Groundsuch as WATER PIPE,CONDUIT etc.
AC Volt-meter
IMPORTANT SAFETY NOTICE
0.15uF
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- 4 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
SPECIFICATIONSNOTE : Specifications and others are subject to change without notice for improvement.
V Application RangeThis spec is applied to the PD81A Chassis.
V SpecificationEach part is tested as below without special appointment.1) Temperature : 255C (779F), CST : 4052) Relative Humidity: 6510%3) Power Voltage: Standard Input voltage (100-240V~, 50/60Hz)
* Standard Voltage of each product is marked by models.4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with SBOM.5) The receiver must be operated for about 20 minutes prior to the adjustment.
V Test Method1) Performance : LGE TV test method followed.2) Demanded other specification
Safety : CE, IEC specificationEMC : CE, IEC specification
V Module General Specification(1) 50 WXGA Module
Display Screen Device
Aspect Ratio
PDP Module
Operating Environment
Storage Environment
Input Voltage
1
2
3
4
5
6
No Item Specification Remark
50 inch Wide Color Display Module
16:9
PDP50G1####,
RGB Closed(Well) Type, Glass Filter(38%)Pixel Format : 1365 horiz. By 768 ver.
1) Temp. : 0 ~ 40 deg2) Humidity : 20 ~ 80 %3) Temp. : -20 ~ 60 deg4) Humidity : 10 ~ 90 %100-240V~, 50/60Hz
PDP
LGE SPEC.
Maker LG
ChassisPD81A 50PG6000/42PG6000/
32PG6000/50PG7000/60PG7000/50PG4000
Austria,Belgium,Bulgaria,Coratia,Czech,Denmark,Finland,France,Germany,Greece,Hungary,Italy,Luxembourg,
Netherlands,Norway,Poland,Portugal,Rumania,Russia,Serbia,Slovenia,Spain,Sweden,Switzerland,UK,Morocco,Turkey
LGModel Name Market Brand
50PG6000/42PG6000/32PG6000/50PG7000/60PG7000/50PG4000
Safety : IEC/EN60065EMI : EN55013EMS : EN55020
Austria,Belgium,Bulgaria,Coratia,Czech,Denmark,Finland,France,Germany,Greece,Hungary,Italy,Luxembourg,
Netherlands,Norway,Poland,Portugal,Rumania,Russia,Serbia,Slovenia,Spain,Sweden,Switzerland,UK,Morocco,Turkey
Model ApplianceMarket
-
(2) 42 XGA Module
(3) 50 FHD Module
(4) 60 FHD Module
- 5 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Display Screen Device
Aspect Ratio
PDP Module
Operating Environment
Storage Environment
Input Voltage
1
2
3
4
5
6
No Item Specification Remark
42 inch Wide Color Display Module
16:9
PDP42G1####,
RGB Closed(Well) Type, Glass Filter(38%)Pixel Format : 1024 horiz. By 768 ver.
1) Temp. : 0 ~ 40 deg2) Humidity : 20 ~ 80 %3) Temp. : -20 ~ 60 deg4) Humidity : 10 ~ 90 %100-240V~, 50/60Hz
PDP
LGE SPEC.
Maker LG
Display Screen Device
Aspect Ratio
PDP Module
Operating Environment
Storage Environment
Input Voltage
1
2
3
4
5
6
No Item Specification Remark
50 inch Wide Color Display Module
16:9
PDP50H2####,
RGB Closed(Well) Type, Glass Filter(38%)Pixel Format : 1920 horiz. By 1080 ver.
1) Temp. : 0 ~ 40 deg2) Humidity : 20 ~ 80 %3) Temp. : -20 ~ 60 deg4) Humidity : 10 ~ 90 %100-240V~, 50/60Hz
PDP
LGE SPEC.
Maker LG
Display Screen Device
Aspect Ratio
PDP Module
Operating Environment
Storage Environment
Input Voltage
1
2
3
4
5
6
No Item Specification Remark
60 inch Wide Color Display Module
16:9
PDP60H2####,
RGB Closed(Well) Type, Glass Filter(38%)Pixel Format : 1920 horiz. By 1080 ver.
1) Temp. : 0 ~ 40 deg2) Humidity : 20 ~ 80 %3) Temp. : -20 ~ 60 deg4) Humidity : 10 ~ 90 %100-240V~, 50/60Hz
PDP
LGE SPEC.
Maker LG
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- 6 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
V Model General Specification
Market
Broadcasting system
Receiving system
Scart Jack(2EA)
Video Input (1EA)S-Video Input (1EA)Component Input (1EA)RGB Input
HDMI Input(4EA)
Audio Input (3EA)SPDIF Out(1EA)USB
1
2
3
4
5
6
7
8
9
10
11
12
No Item Specification Remark
Austria,Belgium,Bulgaria,Coratia,Czech,Denmark,Finland
,France,Germany,Greece,Hungary,Italy,Luxembourg,
Netherlands,Norway,Poland,Portugal,Rumania,Russia,
Serbia,Slovenia,Spain,Sweden,Switzerland,UK,Morocco,
Turkey
1) PAL/SECAM BG2) PAL/SECAM DK3) PAL I / II4) SECAM L/L5) DVB TAnalog : Upper Heterodyne
Digital : COFDM
PAL, SECAM
PAL, SECAM, NTSC
PAL, SECAM, NTSC
Y/Cb/Cr, Y/Pb/Pr
RGB-PC
HDMI-PC
HDMI-DTV
RGB/DVI Audio, Component, AV
SPDIF OUT
For SVC, S/W Download, X-Studio
27 Country
EU(PAL Market)
Scart1 Jack is Full scart and support
RF-OUT(Analoge)Scart2 Jack is Half scart and
support MNT-OUT
Side AV
Side AV
Analog(D-Sub 15Pin)HDMI1/DVI,HDMI2,HDMI3,HDMI4
L/R Input
Side(X-Studio Only PG60 Series)
(5) 32 XGA Module
Display Screen Device
Aspect Ratio
PDP Module
Operating Environment
Storage Environment
Input Voltage
1
2
3
4
5
6
No Item Specification Remark
32 inch Wide Color Display Module
16:9
PDP32G1####,
RGB Closed(Well) Type, Glass Filter(38%)Pixel Format : 1024 horiz. By 720 ver.
1) Temp. : 0 ~ 40 deg2) Humidity : 20 ~ 80 %3) Temp. : -20 ~ 60 deg4) Humidity : 10 ~ 90 %100-240V~, 50/60Hz
PDP
LGE SPEC.
Maker LG
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- 7 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application RangeThis spec. sheet is applied to all of the PD81A chassismanufactured at LG TV Plant all over the world.Ex.) PD81A: 50PG6000-ZA, 42PG6000-ZA, 50PG7000-ZB,
60PG7000-ZB, 32PG6000-ZA ...
2. Specification.[ Caution: The module keeping condition
1. The module keeping condition: The normal temperaturecondition(more than 15C)--> Immediately the line supply.
2. The module keeping condition: 0C--> The module must be kept for more than 2 hours at the
normal temperature.3. The module keeping condition: -20C
--> The module must be kept for more than 3 hours at thenormal temperature.
4. The case of Gu-mi factory at the winter season.--> The module must be kept for more than 5 minutes at
the heating zone(40C~45C).
(1) Because this is not a hot chassis, it is not necessary to usean isolation transformer. However, the use of isolationtransformer will help protect test instrument.
(2) Adjustment must be done in the correct order.(3) The adjustment must be performed in the circumstance of
255C of temperature and 6510% of relative humidity ifthere is no specific designation.
(4) The input voltage of the receiver must keep 100~240V,50/60Hz.
(5) The receiver must be operated for about 5 minutes prior tothe adjustment.
O After RGB Full White in HEAT-RUN Mode, the receivermust be operated prior to the adjustment.
O Enter into HEAT-RUN MODE 1) Press the POWER ON KEY on R/C for adjustment.2) Press the ADJ KEY on R/C and enter EZ ADJUST
Select 3. Test Pattern by using D/E(CH +/-) and pressENTER(V)Select White by using F /G (VOL +/-) and pressENTER(V)
- Set is activated HEAT run without signal generator in thismode.
- Single color pattern (RED / BLUE / GREEN) of HEAT RUNMODE uses to check panel.
- Caution: If you turn on a still screen more than 20 minutes(Especially digital pattern, cross hatch pattern), an afterimage may be occur in the black level part of the screen.
[ Caution- Using power on button of the control R/C, power on TV.- All adjustment process is executed through RS-232C.- Do not connect external input cable.
3. S/W Auto Download Using theUSB Memory Stick
[ Caution- Using power on button of the control R/C, power on TV.- USB file (EPK) version must be bigger than downloaded
version of main B/D.
(1) Insert the USB memory stick to the SET.(2) Using power on button of the control R/C, power on TV.(3) S/W download process is executed automatically.
4. Auto-control Adjustment is Process(1) All adjustment process is executed through RS-232C.(2) Command send --> ADC Calibration --> Model name
download --> EDID download.
(3) Auto-control adjustment protocol(RS-232C)
(4) Defined model name protocol (RS-232C)
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- 8 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
5. Manual Model Name Download(1) Press ADJ key on R/C for model name D/L(2) Select . Model Option and press ENTER(V)(3) Insert Option value by a number key(4) Press the ENTER(V)
6. Manual ADC Adjustment[ Caution
- Do not connect external input cable- Adjustment result is applied to SET On/Off later.
[ Adjustment is done using internal ADC, so input signal isnot necessary.
(1) Press ADJ key on R/C for adjustment.(2) Select 2. ADC calibration by using D/E(CH +/-) and
press ENTER(V).(3) Select Start by using F /G (VOL +/-) and press
ENTER(V).(4) ADC adjustment is executed automatically.
7. Manual EDID Download(1) Press the ADJ KEY on R/C and enter EZ ADJUST.(2) Select 5. EDID D/L by using D/E(CH +/-) and press
ENTER(V).(3) Select Start and press ENTER(V).(4) EDID download is executed automatically.(5) Press EXIT key on R/C.
8. EDID Data(1) HDMI 1 (256 bytes)
(2) RGB (128 bytes)
=> Detail EDID Options are below( , , , )
1. -> Product ID
2. -> Serial No : Controlled on production line3. -> Month, Year : Controlled on production line
NO SIGNAL or White noise NO SIGNAL
RF Input AV / Component / RGB input
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- 9 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4. -> Model Name
5. -> Checksum : Changeable by total EDID data.
9. PCMCIA CARD Checking MethodYou must adjust DTV 29 Channel and insert PCMCIA CARDto socket.
(1) If PCMCIA CARD works normally, normal signals displayon screen.But it works abnormally, No CA module words display onscreen.
[ Caution: Set up RF mode before launching products.
Caution: Set up RF mode(noise) before voltage adjustment.- Test equipment: D.M.M 1EA- Connection Diagram for Measuring: refer to fig.1, fig 2, fig 3. fig 4
10. 50 POWER PCB Assy VoltageAdjustment (Va, Vs voltage Adjustment)
10-1. Model name: 50PG6000, 50PG601010-2. Adjustment Method
(1) 50 Va Aadjustment (refer fig. 1)1) After receiving 100% Full White Pattern, HEAT RUN.2) Connect + terminal of D. M.M. to Va pin of P811,
connect -terminal to GND pin of P811.3) After turning VR901,voltage of D.M.M adjustment as
same as Va voltage which on label of panel right/top(deviation; 0.5V)
(2) 50 Vs Adjustment (refer fig. 1)1) Connect + terminal of D. M..M. to Vs pin of P811,
connect -terminal to GND pin of P811.2) After turning VR951, voltage of D.M.M adjustment as
same as Vs voltage which on label of panel right/top(deviation ; 0.5V)
11. 42 POWER PCB Assy Voltage Adjustment (Va, Vs voltage Adjustment)
11-1. Model name: 42PG6000, 42PG601011-2. Adjustment Method
(1) 42 Va Adjustment (refer fig. 2)1) After receiving 100% Full White Pattern, HEAT RUN.2) Connect + terminal of D. M..M. to Va pin of P811,
connect -terminal to GND pin of P811.3) After turning VR901,voltage of D.M.M adjustment as
same as Va voltage which on label of panel right/top(deviation; 0.5V)
(2) 42 Vs Adjustment (refer fig. 2)1) Connect + terminal of D. M..M. to Vs pin of P811,
connect -terminal to GND pin of P811.2) After turning VR951, voltage of D.M.M adjustment as
same as Vs voltage which on label of panel right/top(deviation ; 0.5V)
Caution: Each PCB assembly must be checked by check JIGset. (Because power PCB Assembly damages to PDP Module,especially be careful)
P812P811
P813
Vs adj
Va adjVR951
SC101
VR901
VaGND
5V
Vs
(Fig. 1) 50inch Power PCB Assy Voltage Adjustment
P812P811
P813
Vs adj
Va adjVR951
SC101
VR901
VaGND
5V
Vs
(Fig. 2) 42inch Power PCB Assy Voltage Adjustment
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- 10 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
12. 60(FHD), 50(FHD) POWER PCBAssy Voltage Adjustment (Va, Vs voltage Adjustment)
12-1. Model name: 50PG7000, 60PG7000, 50PG400012-2. Adjustment Method
(1) 60 FHD Va Adjustment (refer fig. 3)1) After receiving 100% Full White Pattern, HEAT RUN.2) Connect + terminal of D. M..M. to Va pin of P11, connect
-terminal to GND pin of P11.3) After turning VR901,voltage of D.M.M adjustment as
same as Va voltage which on label of panel right/top(deviation; 0.5V)
(2) 60 FHD Vs Adjustment (refer fig. 3)1) Connect + terminal of D. M..M. to Vs pin of P11, connect
-terminal to GND pin of P11.2) After turning VR951, voltage of D.M.M adjustment as
same as Vs voltage which on label of panel right/top(deviation ; 0.5V)
13. 32(XGA) POWER PCB Assy Voltage Adjustment(Va, Vs voltage Adjustment)
13-1. Model name: 32PG6000, 32PG601013-2. Adjustment Method
(1) 32 Va Adjustment (refer fig. 4)1) After receiving 100% Full White Pattern, HEAT RUN.2) Connect + terminal of D. M.M. to Va pin of P811,
connect -terminal to GND pin of P811.3) After turning VR901,voltage of D.M.M adjustment as
same as Va voltage which on label of panel right/top(deviation; 0.5V)
(2) 32 Vs Adjustment (refer fig. 4)1) Connect + terminal of D. M..M. to Vs pin of P811,
connect -terminal to GND pin of P811.2) After turning VR951, voltage of D.M.M adjustment as
same as Vs voltage which on label of panel right/top(deviation ; 0.5V)
- Before adjusting White-balance , the AV ADC should be done.- If ADC status were NG, Need to ADC adjustment.
14. Adjustment of White BalanceCaution: Press the POWER ON KEY on R/C before W/B
adjustment.
14-1. Test Equipment- Color Analyzer (CS-1000, CA-100+(CH.10), CA-210(CH.10))
[ Please adjust CA-100+ / CA-210 by CS-1000 beforemeasuring
--> You should use Channel 10 which is Matrixcompensated (White, Red, Green, Blue revised) by CS-1000 and adjust in accordance with White balanceadjustment coordinate.
O Color temperature standards according to CSM and Module
O Change target luminance and range of the Auto adjustmentW/B equipment.
(Fig. 3) 60inch FHD Power PCB Assy Voltage Adjustment
(Fig. 4) 32inch Power PCB Assy Voltage Adjustment
-
O White balance adjustment coordinate and color temperature
PC (for communication through RS-232C) ==> UART Baudrate : 115200 bps
14-2. Connecting Picture of the Measuring Instrument (On Automatic control )
Inside PATTERN is used when W/B is controlled. Connect toauto controller or push control R/C INSTART > Enter themode of White-Balance, the pattern will come out.
14-3. Auto-control Interface and Directions(1) Adjust in the place where the influx of light like floodlight
around is blocked. (illumination is less than 10ux).(2) In case of PDP: Measure and adjust after sticking the
Color Analyzer (CA-100+, CA210) to the side of themodule.
In case of LCD: Adhere closely the Color Analyzer (CA210 ) to the module less than 10cm distance, keep itwith the surface of the Module and Color Analyzers Provevertically.(80~100).
(3) Aging time 1) After aging start, keep the power on (no suspension of
power supply) and heat-run over 5 minutes.2) In case of PDP, keep white pattern using inside pattern.3) In case of LCD, using no signal or full white pattern or
the others, check the back light on.
O Auto Adjustment Map(RS-232C)
14-4. Manual White Balance 1) Zero Calibrate CA-100+ / CA-210, and when controlling,
stick the sensor to the center of PDP module surface.2) Press the ADJ KEY on R/C and enter EZ ASJUST
Select 2. White Balance and press G (VOL +)Set test-pattern on and display inside pattern.
3) Control is carried out on three color temperatures, COOL,MEDIUM, WARM. (Control is carried out three times)
- R-Cut/ G-Cut / B-Cut is set to 64- Control R-Gain and G-Gain.- Each gain is limited to 192
- R-Cut/ G-Cut / B-Cut is set to 64- Control R-Gain and G-Gain.- Each gain is limited to 192
- R-Cut/ G-Cut / B-Cut is set to 64- Control G-Gain and B-Gain.- Each gain is limited to 192
- 11 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
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- 12 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
TROUBLE SHOOTING GUIDE
1. Power Board 1-1. The whole flowchart which it follows in voltage output state
Start check
Manufacture enterprisemeaning of a passage
1. Check the Power Offcondition.
Doesn't the screen whole come
out?
Is it identical with Power Off
condition?
Yes
Yes
No
No
No
No
No
2. Check the Interfacesignal condition.
Is the Interface signal operated?
Yes
3. Check the St-by 5Vsignal circuit.
Doesn't the low pressure output
come out?
Doesn't the St-by 5V signal
come out?
Yes
Yes
No
4. Check the 5V Monitorsignal circuit.
Doesn't the 5V Monitor signal
come out?
Yes
7. Check the VSC Vs-ONsignal
Doesn't the high tension output
come out?
Doesn't the VSC signal Vs-ON
come out?
Yes
Yes
Doeshigh tension
output voltage Dropoccur?
When theY B/D Module
input connector isremoved, does output
voltage dropoccur?
When theY, Z B/D Module
input connector is remove,does Power Board hightension
output voltage Dropoccur?
Yes No No
9. Check the PowerBoard Output high
tension circuit
Yes
10. Check the Z B/DModule output circuit
Yes
When theZ B/D Module
input connector isremoved, does output
voltage Drop occurs?
11. Check the Y B/DModule output circuit
Yes
No
8. Check the Vs, Vavoltage output circuit.
Doesn't the Vs, Va voltage output
come out?
Yes
No
No
5. Check the VSC RL-ONsignal.
Doesn't the VSC signal RL-ON
come out?
Yes
6. Check the VSC lowpressure output
Doesn't the VSC low pressureoutput come out?
Yes
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- 13 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
1-2. Power Board Structure(1) Pin Layout
(2) Pin Spec
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- 14 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
2. No Power(1) Symptom
1) Doesnt minute discharge at module. 2) Non does not come in into the front LED.
(2) Check following
A Power cord is plugged with TV set? Plug in power cord.
Yes
No
Is the AC-INLET connected with the power board? Connect the AC-INLET
Yes
No
Is the Fuse(F101,F801) onPower Board normal? Replace the Fuses.
Yes
No
Is the Power Board withVSC Board though Cable connected? Connect the Cable.
Yes
No
Measure output voltages(16V,12V,5V) on the power board.If the measured values is not normal, replace power board.
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- 15 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3. Protect Mode(1) Symptom
1) After once shining, it does not discharge minutelyfrom module.
2) The Rely falls.(The sound is audible click) 3) It is converted with the color where the front LED
is red from green.
(2) Check following
Is the Power Boardnormal ?
Replace PowerBoard.
Is output the normality Low/Highvoltage except Stand-by 5V?
Yes
No No
Is the each connectornormal?
Replace theconnector.
ReplaceY-Board.
After connecting well each connector,the normality it operates?
Yes
No Yes
Is the Ctrl Boardnormal?
ReplaceX-Board.
Is the output voltage normal afterremove P163 connector of Ctrl-B/D?
Yes
No Yes
Is the Y-Boardnormal?
Is the output voltagenormal after removeP209 connector of
Y-B/D?
Is the Fuse(FS201) on Y-B/Dnormal?(In case of open is replace)
Yes
No Yes Yes
ReplaceZ-Board.
Is the Z-Boardnormal?
Is the output voltagenormal after removeP3 connector of Z-
B/D?
Is the Fuse (FS1) on Z-B/D normal?(In case of open is replace)
Yes
No Yes
Is the X- Boardnormal?
Is the output voltage normal afterremove P242 connector of
X-B/D?
After remove P211 output voltage normality:Replace Right X-B/DAfter remove P23 output voltage normality:Replace Left X-B/D
Yes
No Yes
Is the VSC Board normal?
Is the output voltage normal afterremove P1001 of VSC Board?
After crisis COF of each board, check the normality operates.If in case normality operates, correspondence COF Fail is replace the module.
After remove P1001 normal operation:Replace VSC Board
Yes
No
Is the COF of X, Y, Znormal ?
No
Yes
Yes
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- 16 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Does minute dischargeAt Module?
Is the LVDS cable connect well from CtrlBoard to VSC Borad?
Replace FLI106X0HIC(IC100)
Is the VaVs normal?
Check the PDP ModuleYes
No
YES
Yes
Reconnect the LVDScable in P501
No
Is normal the VSCBoard?
Operates the FLI106X0H(IC100)?1. Check the Monitor OUT by SCART2 : Connect the another TV SET2. Check the LVDS clock(R537,R538) on the VSC Borad by Oscilloscope?
Replace theVSC B/D.
No
NO Replace the Power board
Is output the normalityLow/High voltage except
stand-by 5V?
NO
4. No Raster(1) Symptom
1) No OSD and image occur at screen. 2) It maintains the condition where the front LED is green.
(2) Check the followings
Yes
No
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- 17 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
5. In case of occurring strange screen into specific mode5-1. In case the OSD does not displayed
(1) Symptom1) LED is green.2) The minute discharged continuously becomes Accomplished from module.
(2) Check following
1. Is damage in the LVDS cable?2. Isnt the LVDS cable connect well fromCtrl Board to VSC Board?
Is the VSC Boardnormal?
1. Replace cable2. LVDS Cable connect well from Ctrl Board to VSC Borad
No
Yes
Yes
No
Is the Ctrl Board of Module normal?1. Check the LED on the Ctrl Board2. Check the 5V_ON on the Power Board by the DMM.
No
Replace FLI106X0HIC(IC100)
Operates FLI106X0H(IC100)?1. Check the Monitor OUT by SCART2 : Connect the another TV set2. Check the LVDS clock(R240,R243) on the VSC Borad by Oscilloscope?
Replace theVSC B/D.
Yes
No
Replace the Ctrl B/D
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- 18 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
5-2. In case of doest display the screen into specific mode(1) Symptom
1) The screen does not become the display from specific input mode(RF, AV, Component, RGB, DVI).
(2) Check following1) Check the all input mode should become normality display.
(3) In case of becomes unusual display from RF mode
(4) In the case of becomes unusual display from side S-video/AV mode
Is the Tuner normal? Is the RF Cable connected well?1. Check the another TV set.
Cable inserts well or Change the RF CableYes
No
No
Operates the FLI106X0H IC(IC100)?1.Check the Monitor OUT by SCART2 : Connect the another TV SET2.Check the LVDS clock(R537, R538) on the VSC Board by Oscilloscope?3.Check the each Input Source. ATV(TV_CVBS : R302), DTV(TU301 Pin23),
S/AV Mode( SIDE_CVBS_IN : R1160), Component/RGB(COMP_Y, V/HSYNC : R1122, R1174, R1180)HMDI(SDA/SCL : IC201 Pin29, Pin30), SCART(SC1/2_CVBS_IN : R977, R521) on the VSC Board by Oscilloscope.
Replace the Tuner(TU301)
No
Is normal the Input voltage, IIC Communication?1.Check the Input Voltage 5V(L303), 3.3V(L1022), 1.8V(TU301 Pin22)2. Check the Analog/Digital IIC(A:R334,R335 D:R342, R343)
Yes
Block A
Replace the FLI106X0H(IC100).
No
Is Video input of the AV Jack (JK700, 707) normal?1. Check the CVBS signal in AV jack by Oscilloscope
Yes
Check the input source of EquipmentNo
Same as Block A
-
- 19 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
(5) In the case of becomes unusual display from Component, RGB mode
(6) In the case of becomes unusual display from HDMI mode
(7) In the case of becomes unusual display from SCART mode
Is R,G,B input and H,V Sync of the JK701, 703 normal?1. Check the RGB signal/H(V)SYNC in the RGB Cable
Yes
Check the input source of Equipment
Same as Block A
No
Is Video input of A/V jack normal?
Yes
Check the input source.
Same as Block A
No
NoIs the HDMI(IC201)normal?
Yes
Same as Block A
Is the TMDS waveform between theIC and HDMI jacks normal? Replace the IC201.
No
-
- 20 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
6. In case of no sound(1) Symptom
1) LED is Green.2) Screen display but sound is not output.
(2) Check following
All input(mode) is nosound?
Only HDMI is NoSound?
Yes
Downloadthe EDID data
No
No YES
Only RF is no sound? Check the Tuner IN/OUTTV_L/R_OUT( R356)No
Yes
IC601(Audio AMP) operates Normal?1.Check 1.8V, 3.3V, 16V input Voltage (L607, IC601 Pin8, IC601 Pin32)2.Check the IIC communication (SDA/SCL : R645, R643)3.Check the Audio Signal is normal.(SPK_L/R : L603, L604, L606, L610)
Replace the Audio AMP IC(IC601).
No
No
YES
Replace the VSC Board
Is the speaker On it menu?1. Menu > Audio > TV Speaker ON/OFF
Set on speaker in menu.(TV Speaker OFF ? ON)
No
Is the speaker Cable normal?1. Isnt damage in the Speaker Cable?2. Is the Speaker cable connect well form VSC B/D to Speaker.
Change or Reconnect theSpeaker Cable.
Yes
Only RF is no sound? Replace the VSC B/DYes
Yes
Check the Input Sound IN/OUTAV1(SC1_LIN : R1140, SC1_RIN : R1134)AV1(SC2_LIN : R1146, SC2_RIN : R1145)AV3(SIDE_LIN : R1306, SIDE_RIN: R1307 )PC(PC_LIN: R631, PC_RIN : R630)Component (COMP_LIN : R1178, COMP_RIN: R1179)
No
-
- 21 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
BLOCK DIAGRAMM
ain B
lock D
iagra
m
COMP
1
RGB
HDM
I1,
HDM
I2,
HDM
I3
SCAR
T1
Side
AV1
TS[0:
7]
CVBS
, Y/C
, L/R
SCAR
T2
DDR2
SDR
AM(64
MByte
)Qi
mond
aIC
701
NOR
Flash
(32MB
)SP
ANSI
ONIC
404
WXG
A Pan
el
SPDI
F
USB
SPDI
F_OU
TDigit
al am
p(N
TP30
00A)
IC60
1
RS-2
32C
TMDS
351P
AGIC
201
Y Pb
Pr
, L/R
RGB,
CVB
S, au
dio L/
R
CVBS
DTV/
MNT
OUT
I2S
EEPR
OM24
LC51
2IC
907
HDM
I4
RGB,
L/R
Tuner (TDFV-G135D1)
TU301
TMDS
[0:7]
74LVC541A(PW)BufferIC402
PCMCIACard
74LVC542A5Bi-Buffer
IC405
DATA
[0:7]
74LCX244MTCBuffer
IC406,407,408
Addr
ess[0
:14]
TMDS
[0:7]
CVBS
, SIF
, AM
Audio
Tuner V out
NLASB3157IC502
LVDS
TMD
S OD
D[10 b
it]
Host
Addr
ess[1
:16]
Host
Data
[0:15
]
LPF
DDR2
Dat
a[0:15
]
DDR2
SDR
AM(64
MByte
)Qi
mond
aIC
701
DDR2
Dat
a[16:3
1]
DDR2
Add
ress
[0:12
]
I2C
MIC
OMW
T61P
8IC
802
I2C
MAX
3232
CDR
IC10
1
TX/R
X
TX
NLASB3157IC1013
TXTX
AT24
C16A
NIC
801
FLI1
0306
TS[0]
, CLK
, SY,
VAL
Mod
ule I2
C
RX
Audio
L/R
out
Audio
L/R
out
MSP
4458
Audio
L/R
in
Audio
L/R
in
I2S
Mux
ed au
dio
L/R Au
dio Only
Dem
ux
Only f
or DTV
Audio
MPE
-
- 22 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
MIC
OM
Lev
el
gen
era
tor
0V,6
V,11
V
12V-
>3.
3VL
eve
lshi
fte
r
REC8
Ctr
l1
REC8
Ctr
l2
DTV
/MNT
_VO
UT
Sca
rt2I
D
Rec
ord
ingC
trl
Sca
rt1F
B
Sca
rt1C
VBS
TUNE
R_VO
UT
NLAS
B315
7Vi
deoS
/W
TRB
UF
Sca
rt1R
,G
,B
12V-
>3.
3VL
eve
lshi
fte
rSc
art
1ID
SID
EY/C
VBS
SID
EC
SID
ER
SID
EL
SID
ESS
/W
Sca
rt1L
/R
TVO
UTL
/R
Lev
elA
dj
[LBA
DC_IN
4]
[A2P
],[B2
P],[C
2P]
[A4
P]
[C4
P]
[SCAR
T_FB
]TR
Adj
[15]
VID
EO
[AUD
_IN
_I2
S]TR
BUF
TRN
et
[GPI
OA4
]
MUT
E_LI
NE
TRAd
j[S
V3P]
TU_
MAI
NLP
F
Lev
elA
djSc
art
1Lin
kVX
O_D
E
Sca
rt2C
VBS
[SV4
P]
[VXI
_D1
5][V
XI_
D16]
Sca
rt2I
D
[LBAD
C_IN
5][VD
AC_
GY_YC
_P]
[VOU
T2]
TRA
MP[
6dB]
[VXO
_D1
3]D
TV/M
NTs
witc
hCtr
l
Lev
elA
djSc
art
2Lin
kVX
O_
VSSc
art
2L/R
Lev
elA
dj
[AUD
_OU
T1_L,
R]
TRB
UF
[GPI
OA5
]M
UTE_
LINE
_D
TV
DTV
/MNT
L/R
LPF
LPF
Lev
elA
dj
Lev
elA
dj
[SV2
P][B
4P]
[AUD
_IN
_R4
][AU
D_IN
_L4
][V
XO_D1
1]SI
DEC
VBSL
ink
[VXO
_D
1]
FLI10
306
MIC
OM
TUNE
R
TRN
et
MSP
4458
MSP
4458
SIF
AMA
UDIO I2
S
Mux
edA
udi
o
Mux
edA
udi
o
[AUD
_OU
T1_
L,R]
TRAd
j
1:Au
dio
R ou
t (TV)
2:au
dio
R in
3:au
dio
L ou
t (TV)
4:au
dio
GND
5:bl
ue G
ND6:
audi
o L
in7:
Blue
8:SC
ART
ID9:
gree
n G
ND10
:dat
a 2
(NC)
11:G
reen
12:d
ata1
(NC)
13: L
ink
(red G
ND)
14:d
ata
GND
(NC)
15:R
ed16
:SCA
RT F
B17
:vid
eo G
ND18
:RG
B Co
ntro
l GND
19:C
VBS
out (T
V ou
t)20
:CVB
S in
21:s
afet
y G
ND22
:GND
23:G
ND
1:Au
dio
R ou
t (DTV
)2:
audi
o R
in3:
audi
o L
out (D
TV)
4:au
dio
GND
5:G
ND6:
audi
o L
in7:
NC
8:fu
nctio
n se
lect
9: N
C10
:dat
a 2
(NC)
11:N
C12
:dat
a1 (N
C)13
: Lin
k14
:dat
a G
ND (N
C)15
: NC
16: N
C17
:vid
eo G
ND18
:GND
19:C
VBS
out (D
TV ou
t)20
:CVB
S in
21:s
afet
y G
ND22
:GND
23:G
ND
SCAR
T 1
SCAR
T 2
-
- 23 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Bloc
kDiag
ram
( Com
pone
nt & R
GB &
HDMI
)C
OM
P_Y
COM
P_PB
CO
MP
_PR
VGA_
R
VGA_
BVG
A_G
HSY
NC
VSYN
C
ED
IDEE
PROM
AT24
C02B
N
D_SU
B_I2
C
CO
MP
_L
CO
MP
_R
PC
L,R
[A3P
][B
3P]
[C3P
]
[VXO_
D0]
[AUD_
IN_L3]
[AVS
][AH
S_AC
S]
[A1P
]
Leve
l Adj
Leve
l Adj
[AUD_
IN_R3
]CO
MP
Link
[B1P
][C
1P]
74
HC
14D
Schm
itt trig
gerin
g U
sage
: BU
F
[VXO_
HS]
RG
B Li
nk
[AUD_I
N_L5,R
5]
HDMI
2 TM
DS[8b
it]D
DC
HD
MI2
I2C
ED
IDAT
24C0
2BN
HDMI
3 TM
DS[8b
it]
DDC
HDMI
3 I2C
ED
IDAT
24C0
2BN
HDMI
SW TM
DS[8bi
t]HD
MI I2
C [SW]
HDMI
EQ Ctr
l[VX
O_D6
]
[GPIO
A0]
[GPI
OA1]
HDMI
Sele
ct 1
HDM
I Sele
ct 2
CEC_REMOTE
[GPI
OB1]
[2WIRE
_S1]
[2WIRE
_S0]
[DSDA
1,DSC
L1]
HD
MI S
W T
MD
S[8b
it]
DDC
HDMI
4 I2C
ED
IDAT
24C0
2BN
[2WIRE
_S2]
[BRX
]
[AR
X]
[VXO_
D20]
[VXO_
D21]
HDMI
1 5V D
ET
HDMI
3 5V D
ET
HDMI
4 5V
DET
[VXO
_CLK
]
HP D
ET S/
W4[VX
I_D23
]
HP DE
T S/W
1
HP DE
T S/W
3
[HDMI
_B_H
PD]
[HDMI_
A_HPD]
[VXO_
D22]
FET B
i-BUF
NLASB3157IC502
2 R
X
CHAP
LIN
RX
UCOM
RX
3 TX
UCOM
TX
CHAP
LIN
TX
6 R
X4
TX
G-pr
obe
FLI1
0306
MICO
M
MIC
OM
TMDS351PAG
IC201
MAX3232CDR
IC101
HDMI
2 TM
DS[8b
it]DD
C HD
MI2 I
2C
ED
IDAT
24C0
2BN
HDMI
2 5V D
ET
HP DE
T S/W
2
[VXO_
D19]
-
- 24 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Bloc
kDiag
ram
( FE &
PCMC
IA)
CI_
TS[0:
7]
Tuner (TDFV-G135D1)
TU301
74LVC
541A(P
W)B
uffe
rIC
402
PCMCIACard
74LV
C542
A5Bi-
Buffe
rIC
405
HOST
DAT
A[0:7]
FE_T
S[0:7]
FLI1
0306
HOST
Addre
ss[1:24
]HO
ST D
ATA[0
:15]
FLAS
H W
P Ct
rl[OO
B_CTX]
RES
ET[G
PIOE
7]
HO
ST W
rite
Enab
le[PO
D_WE_H
OST_WR
]HO
ST O
ut En
able
[POD_O
E_HOST
_RD]
HOST
Chip
Enab
le[HO
ST_BOO
D_CS_N
]
CI D
ATA[0
:7][PO
D_DIR_
N]C
I DAT
A D
ir Se
lect
CI D
etec
t[PO
D_DETE
CT_N]
CI
De
tect
TS_IN
[0:7]
74LCX
244MT
CBu
ffer
IC40
6H
OST
Add
ress
[0:3]
POD
Addr
ess[4
:7]CI
Add
ress[0
:7]
74LCX
244MT
CBu
ffer
IC40
7HO
ST Ad
dress
[10:13
]PO
D Ad
dress
[8;9;1
4]HO
ST A
ddre
ss[4]
74LCX
244MT
CBu
ffer
IC408
REG
CI D
etec
t
CI D
etec
t
CI Addr
ess[8:1
4]
CI D
etec
t
[POD_OE
_HOST_R
D]HO
ST O
ut En
able
CI O
ut En
able
HOST
Write
Ena
bleCI
Write
Ena
bleHO
ST A
ddre
ss[6]
CI IO
RD
HO
ST A
ddre
ss[5]
CI I
OW
RFE
_TS_
DATA
_VAL
CI_M
IVAL
FE_T
S_DA
TA_S
YNC
I_M
ISTR
TFE
_TS_
DATA
_CLK
CI_
MIC
LK
Tuner (TDFV-G135D1)
TU301
TPS204
2BDRG
4Po
wer D
istrib
uter
IC30
15V 600m
A
5V
5V_A
NN_M
NT5V
_ANN
_CTL
[AUDO_
I2SB_DA
T1]
[AUDO_
I2SB_DA
T2]
S29GL2
56N10T
FI020
NOR F
lash
FLI1
0306
MIC
OM
TS[0]
, CLK
, SY,
VAL
-
- 25 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Mute
CT
RL
[TR
]
Bloc
kDia
gram
(A
udio
& et
c)
SPDI
F_OU
T
MUTE_LINE
NTP3
000
Digit
al AM
P
Bit C
LK
Mute
CTR
L[T
R]
LR C
LK
SW_R
ESET
LPF
LPF
Leve
l Adj
Leve
l Adj
Leve
l Adj
Scar
t1 L
/R
Scar
t2 L
/R
Com
p L/
R SI
DE
L/R
PC
L/R
[AUD_
IN_L/R
1] Ch
. 3[AU
D_IN_
L/R 1]
Ch. 4
[AUD_
IN_L/R
1] Ch
. 5
Audio
Mast
er CL
K
LR C
h. Da
ta
[AUD_
MCLK0
][AU
DO_I2
SA_BC
LK][AU
DO_I2
SA_W
CLK]
[AUDO
_I2SA
_DAT
0]
[AUD_
OUT1
L/R]
[AUDO
_SPD
IR_O
UT]
Tuner
(TDFV-G135D1)
TU301
AM A
UDIO
TR B
UF
MUTE_LINE_DTV
TR B
UF
TR B
UF
SCAR
T 1
SCAR
T 2
TV L
R O
UT
DTV/
MNT
LR O
UT
16V
[FAUL
T]
AUDIO
_MUT
E
[VXO_
D5]
[RESE
T]I2
C 3
.3V
TPY
: 10W
+10W
M
AX :
15W
+15W
TPS2
042B
DRG4
Powe
r Dist
ribute
rIC
901
5V
USB
DP/D
M
5V 600m
A
FLI1
0306
MIC
OM
MIC
OM
USB2
0-PWE
USB2
0-OC
Soun
d IF
TR B
UFM
SP44
58
Bit C
LK, L
R CL
K,
CR C
h Da
ta
MPE
Leve
l Adj
-
- 26 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Bloc
kDia
gram
(R
eset)
KIA7
029A
FPo
wer O
n Res
etIC
803
MICO
M Rese
t[N
RST]
S29G
L256
N10T
FI02
0NO
R Fl
ash
IC40
4
RE
SE
T
EJTA
G RE
SET
[EJ_R
ST_N
]
SYS
RESE
T[R
ESET
_N]
Tic
S/W
NTP
3000
SW_R
ESET
[VX
O_D
5]
PC
MC
IACI
_RST
[PO
D_R
ES
ET
]
TU
NE
RFE
_RES
ET[V
XI_
D14
]
FLI10
306
MIC
OM[G
PIOE6
]
MS
P4
45
8
-
- 27 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
I2C
Cont
rol
SDA2
_3.3V
,SCL
2_3.3
VM
odul
eX4
: 0x
72
MIC
OM
0x50
NTP
3000
0x54
TU
NE
RD
igita
lR
:0x1
EW
:0x1
F
[Maste
r I2C 1
]
TU
NE
RA
na
log
R :
0x8
7W
: 0
x86
MVR
AM24
LC51
2W
: 0x
A6R
: 0x
A7
SDA1
_5V,
SCL
1_5V
[Master I2
C 0]
[Slave
I2C 0]
[Slave I
2C 2]
[Slave
I2C 1]
EDID
AT24
C02B
N
EDID
AT24
C02B
N
EDID
AT24
C02B
N
EDID
AT24
C02B
N
TMD
S35
1PAG
IC20
2
FLI10
306
EDID
AT24
C02B
N
[DSDA
1,DSC
L1]M
ICO
M
EDID
AT24
C02B
N
MS
P44
58D
igita
lR
:0x8
1W
:0x8
0
-
- 28 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Pow
er V
olta
ge B
lock
Dia
gram
12V
KA78
09(IC
1005
)
5V
KIA7
8R05
F(IC
1011
)
+5V
-TUN
ER
KIA7
8R05
F(IC
1007
)
CI_E
N
+5V
-CI
NTP
3000
A16
V
KIA7
8R33
F 1A
(IC10
12)
3.3V
_ON
+3.
3V-T
UNER
+3.
3V-C
I
AZ11
17H
-1.8
TRE
(IC10
04)
+1.
8V
AZ11
17H
-3.3
(IC10
03)
+3.
3V_S
TBY
FET
Pow
er S
/W(Q
1003
)+
5V
RL_
ON/
PWR_
ON/
OFF
Tune
r
CI_m
odul
e
Tune
r
HD
MI S
/W, C
I buf
fer,
Flas
h M
emor
y,
NTP
3000
A, C
hapl
in(A
UD_V
REFP
)
Tune
r, N
TP30
00A
RS-
232
Drive
r, Su
b M
icom
,
HD
MI S
/W, O
PTIC
Jac
k, N
VRAM
, USB
MSP
4458
MSP
4458
-
- 29 - LGE Internal Use OnlyCopyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Pow
er V
olta
ge
Bloc
kDia
gram
5VKI
A78R
33F
1A
(IC10
01)
3.3V
_ON
+3.
3V-D
OUG
LAS
PQ01
8EZ0
2ZPH
0.23
$(IC
1000
)+
1.8V
_DO
UGLA
S_DD
R
1.8V
_DO
UGLA
S_EN
SC45
19ST
RT60
0Khz
,3A,
0.41
$(IC
1002
)+
1.26
V_DO
UGLA
S
1.26
V_DO
UGLA
S_EN
-
- 30 - LGE Internal Use Only
EXPLODED VIEW
300
305
301
304 200
603
520
400
602
580
202
203
240
900
A21
A2
501591590
204
601
250
201
121
120
302
570
306
560
303
Many electrical and mechanical parts in this chassis have special safety-related characteristics. Theseparts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components asrecommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
-
270pFC319
READY
F
E
_
R
E
S
E
T
+3.3V_TUNER
+1.8V
F
E
_
S
D
A
F
E
_
S
C
L S
C
L
1
_
5
V
SIF
TU_MAIN
TUNER_VOUT
AM_AUDIO
AGC_SPEED_CTL
BOOSTER
F
E
_
T
S
_
D
A
T
A
_
V
A
L
SCL2_3.3V FE_SCL
10KR360
2SC3052Q302
E
BC
2SC3052Q306
E
BC
2SC3052Q308
EB
C
SDA2_3.3V FE_SDA
+5V_TUNER
+5V_TUNER
220uF16VC309
S
D
A
1
_
5
V
0.1uF16VC325
0.1uF16VC326
0.01uFC312
4
7
R
3
4
3
4
7
R
3
4
2
0.1uF16VC306
0.1uF16VC308
100pF50VC307
F
E
_
T
S
_
D
A
T
A
[
0
-
7
]
,
F
E
_
T
S
_
D
A
T
A
_
C
L
K
,
F
E
_
T
S
_
D
A
T
A
_
V
A
L
,
F
E
_
T
S
_
D
A
T
A
_
S
Y
N
MLB-201209-0120P-N2L303
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2SA1504SQ304E
BC
2SA1504SQ305
E
BC
2SA1504SQ301
2SA1504SQ307
E
BC
220uF16VC321
0.1uFC322
4.7uF10V
C317
3
3
A
R
3
0
1
3
3
A
R
3
0
2
3
3
A
R
3
0
3
0.1uF16V
C313
100R334
100R3352701%
R37482R347470R346
4.7KR345
0R348
100pF50VC305
4700pFC310
1KR350
0R371
3301%
R301
1KR356
4700pFC315
1K
1
%
R373READY
0R357
1KR372
READY
100R358
10KR367
2.2KR366
10R365
0R302
K
D
S
1
8
4
D
3
0
1
A2C
A1
TDFV-G135D1TU301
TUNER
1
A
N
T
[
5
V
]
2
B
B
[
C
T
R
]
3
G
N
D
_
1
4
+
B
[
5
V
]
5
N
C
_
1
6
R
F
_
A
G
C
7
T
P
[
V
T
]
8
N
C
_
2
9
G
N
D
_
2
1
0
S
D
A
_
T
1
1
S
C
L
_
T
1
2
A
I
F
_
1
1
3
A
I
F
_
2
1
4
N
C
_
3
1
5
V
I
D
E
O
1
6
A
U
D
I
O
1
7
S
I
F
1
8
S
D
A
1
9
S
C
L
2
0
R
S
T
2
1
3
.
3
V
2
2
1
.
8
V
2
3
E
R
R
2
4
M
C
L
2
5
D
7
2
6
D
6
2
7
D
5
2
8
D
4
2
9
D
3
3
0
D
2
3
1
D
1
3
5
S
H
I
E
L
D
3
2
D
0
3
3
V
A
L
3
4
S
Y
N
C
10KREADY
R364
2KREADY
R362
4.7uF10V
READY
C320
+3.3V_CI
TPS2042BDRG4IC302
READY3EN1
2IN
4EN2
1GND
5 OC2
6 OUT2
7 OUT1
8 OC1
0R352
READY
0.1uFC318
5V_ANN_MNT
5V_ANN_CTL
+5V
4
.
7
K
R
3
6
8
R
E
A
D
Y
0.1uFC316READY
F
E
_
T
S
_
D
A
T
A
_
S
Y
N
F
E
_
T
S
_
D
A
T
A
_
V
A
L
F
E
_
T
S
_
D
A
T
A
[
0
]
F
E
_
T
S
_
D
A
T
A
[
1
]
F
E
_
T
S
_
D
A
T
A
[
2
]
F
E
_
T
S
_
D
A
T
A
[
3
]
F
E
_
T
S
_
D
A
T
A
[
4
]
F
E
_
T
S
_
D
A
T
A
[
5
]
F
E
_
T
S
_
D
A
T
A
_
C
L
K
F
E
_
T
S
_
D
A
T
A
[
7
]
F
E
_
T
S
_
D
A
T
A
[
6
]
(USE ONLY FOR SECAM) OPTION: RF AGC
TUNER
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
HDMI3_5V_DET
HDMI2_5V_DETHDMI1_5V_DET
SW_RESET
1
9
.
6
6
0
8
0
H
z
X
8
0
1
+3.3V_DOUGLAS
FE_RESETREC_8_CTRL1REC_8_CTRL2
HP_DET_S/W_2HP_DET_S/W_4
DTV/MNT_SWITCH
HDMI4_5V_DET
HDMI_SW_EQ
5pFREADY
C809
5pFREADY
C808
LED_G
0.1uF50VC807
KEY2
LED_R
680pFC810
KEY1
P_+5V
IR
MLB-201209-0120P-N2
L801
SCART1_LINKSCART2_LINKRGB_LINK
SIDE_S_SW
COMP_LINKSIDE_CVBS_LINK
+3.3V_STBY
+3.3V_STBY
2
2
R
8
0
5
7
+3.3V_STBY
AT24C16AN-10SI-2.7IC801
3A2
2A1
4GND
1A0
5SDA
6SCL
7WP
8VCC
RL_ON/PWR_ONOFF
K
E
Y
2
22R8053
+3.3V_STBY
U
A
R
T
_
S
E
L
R
E
S
E
T
A
U
D
I
O
_
M
U
T
E
2
2
R
8
0
3
0
D
I
S
P
_
E
N
P_+5V
K
E
Y
1
0.1uF16VC814
D
_
S
U
B
_
S
D
A
100R8054
1
5
K
R
8
0
5
5
+3.3V_STBY
3.3V_ON
22R8044UCOM_RX
UCOM_TX
0.1uF16VC813
IR
SCL2_3.3V
2
2
R
8
0
7
2
1
/
1
6
W
4
7
K
R
8
0
6
1
L
E
D
_
R
0.1uF16VC818
V
A
V
S
_
O
N
100R8069
4
7
K
R
8
0
7
5
A
C
_
D
E
T
5
V
_
M
N
T
MUTE_LINE
0.1uF16VC819
1
0
0
R
8
0
3
1
1.8V_DOUGLAS_EN
6.8KR8070
1.26V_DOUGLAS_EN
KIA7029AFIC803
2G
3 O1I
MUTE_LINE_DTV100R8092
P_+5V
22R8051
L
E
D
_
G
22R8071
100R8091
CEC_0
3
.
3
K
R
8
0
4
1
4.7KR8040
D
_
S
U
B
_
S
C
L
SDA2_3.3V
4.7uF10V
C803
0R8087
READY
P_+5V
M
5
V
_
O
N
1
0
K
R
8
0
2
9
1
0
K
R
8
0
5
2
10KR8063
10KR8050
10KR8068
10KR8073
1
0
K
R
8
0
8
0
R
E
A
D
Y
1
0
K
R
8
0
6
5
R
E
A
D
Y
1
0
K
R
8
0
8
2
10uF6.3VC825
2
4
p
F
C
8
0
1
2
4
p
F
C
8
0
2
MODULE_SER_CLKMODULE_SER_DATA
BOOSTERAGC_SPEED_CTL
0.1uF16V
C804READY
HDMI_SEL1
HDMI_SEL2
12505WS-12A00P803
1IR
2GND
3KEY2
4GND
5KEY1
6GND
7STBY_5V
8GND
9LED_R
10GND
11LED_G
12GND
13
6.8KR8095
3
.
3
K
R
8
0
4
9
WT61P8-RN440WTIC802
1VDD33V2GND3OSCO4OSCI5GPIOB6/SSDA6GPIOB5/SSCL7GPIOB4/P058GPIOB3/P049GPIOB2/IR10GPIOB1/IRQ3/CEC11GPIOB0/IRQ2
1
2
G
P
I
O
C
7
/
P
1
7
/
I
R
Q
1
1
3
G
P
I
O
C
6
/
P
1
6
/
I
R
Q
0
1
4
G
P
I
O
C
5
/
P
1
5
/
T
X
D
1
1
5
G
P
I
O
C
4
/
P
1
4
/
R
X
D
1
1
6
G
P
I
O
C
3
/
A
D
3
1
7
G
P
I
O
C
2
/
A
D
2
1
8
G
P
I
O
C
1
/
A
D
1
1
9
G
P
I
O
C
0
/
A
D
0
2
0
D
S
D
A
1
2
1
D
S
C
L
1
2
2
G
P
I
O
A
5
/
D
S
D
A
2
23 GPIOA4/DSCL224 GPIOA3/PWM7/P0325 GPIOA2/PWM6/P0226 GPIOA1/PWM5/P0127 GPIOA0/PWM4/P0028 GPIOD7/RXD229 GPIOD6/TXD230 GPIOD5/P13/AD731 GPIOD4/P12/AD632 GPIOD3/P11/AD533 GPIOD2/P10/AD4
3
4
G
P
I
O
D
1
/
H
I
N
2
3
5
G
P
I
O
D
0
/
H
I
N
1
3
6
G
P
I
O
E
7
/
V
I
N
1
3
7
G
P
I
O
E
6
/
V
I
N
2
3
8
G
P
I
O
E
5
/
P
0
7
3
9
G
P
I
O
E
4
/
L
P
W
M
/
P
0
6
4
0
G
P
I
O
E
3
/
P
W
M
3
4
1
G
P
I
O
E
2
/
P
W
M
2
4
2
G
P
I
O
E
1
/
P
W
M
1
4
3
N
R
S
T
4
4
G
P
I
O
E
0
/
P
W
M
0
FLI10610H-AAIC100
VXI_CLKA18
VXI_DEC18
VXI_VSB18
VXI_HSD18
VXI_D0E19
VXI_D1A17
VXI_D2B17
VXI_D3C17
VXI_D4D17
VXI_D5F17
VXI_D6A16
VXI_D7B16
VXI_D8C16
VXI_D9D16
VXI_D10D19
VXI_D11E16
VXI_D12A15
VXI_D13B15
VXI_D14C15
VXI_D15D15
VXI_D16E15
VXI_D17A14
VXI_D18B14
VXI_D19C14
VXI_D20D14
VXI_D21E14
VXI_D22E17
VXI_D23E18
TESTMODE0C27
TESTMODE1C26
VXO_CLKAD19
VXO_DEAE19
VXO_VSAG18
VXO_HSAF18
VXO_D0AF15
VXO_D1AH16
VXO_D2AJ16
VXO_D3AE15
VXO_D4AE16
VXO_D5AF16
VXO_D6AG16
VXO_D7AH17
VXO_D8AJ17
VXO_D9AE17
VXO_D10AF17
VXO_D11AG17
VXO_D12AH18
VXO_D13AJ18
VXO_D14AD15
VXO_D15AE18
REF_CLKA22
XTAL_I NA23
CLKOUTE12
OBUFC_CLKF21
NC_1F7
NC_2F8
NC_3F9
NC_4F10
NC_5F11
SIF_INK6
10pF50V
C827
READY
10pF50V
C828
READY
10pF50V
C829
READY
10pF50V
C830
READY
+3.3V_STBY
10KR8058
2
4
M
H
z
X
8
0
2
1
8
p
F
5
0
V
C
8
1
7
1
8
p
F
5
0
V
C
8
1
2
470pF50V
C832
470pF50V
C826
100pF50V
C831
100pF50V
C833
+3.3V_STBY
0.1uFC815
READY
10KR8094
READY
10KR8093
+3.3V_STBY
BLM18AG121SN1DL803
BLM18AG121SN1D
L805
BLM18AG121SN1D
L802
BLM18AG121SN1DL806
BLM18AG121SN1DL804
+3.3V_DOUGLAS
10KREADY
R8002
10KR8001
READY
10KREADY
R8004
10KR8003
READY
HIGH:Writable
Sub-Micom
L
C
D
O
N
L
Y
:
P
A
N
E
L
_
C
T
L
L
C
D
O
N
L
Y
:
M
O
V
I
N
G
_
L
E
D
_
P
W
M
L
C
D
O
N
L
Y
:
S
O
F
T
_
T
O
U
C
H
_
B
U
Z
Z
_
C
T
R
L
CPL_DDR2_CAS_N
CPL_DDR2_CK_N
CPL_DDR2_DQS1_N
CPL_DDR2_A[0-12]
DDR2_RAS_N
CPL_DDR2_DQS3_P
CPL_DDR2_DQS0_N
DDR2_CKE
CPL_DDR2_DQS2_N
DDR2_WE_N
CPL_DDR2_DQS0_P
330uF6.3VC741
DDR2_A[0-12]
DDR2_DQS3_NDDR2_DQS2_N
DDR2_A[0-12]
DDR2_VREFDDR2_VREF
CPL_DDR2_DQS3_N
1uF6.3VC742
CPL_DDR2_BA1
DDR2_DQS1_N
DDR2_DQS2_P
DDR2_CAS_N
CPL_DDR2_BA0
CPL_DDR2_CK
DDR2_ODT_T
DDR2_DQS0_P
CPL_DDR2_DQS2_P
CPL_DDR2_DQS1_P
CPL_DDR2_CS_N
CPL_DDR2_DM[0-3]
DDR2_DQS1_P
DDR2_CS_N
330uF6.3VC720
DDR2_DQS3_P
DDR2_ODT
1uF6.3VC721
DDR2_DQS0_N
DDR2_BA1
CPL_DDR2_WE_N
CPL_DDR2_CKE
CPL_DDR2_RAS_N
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
+1.8V_DOUGLAS_DDR
+1.8V_DOUGLAS_DDR
+1.8V_DOUGLAS_DDR
+1.8V_DOUGLAS_DDR
+1.8V_DOUGLAS_DDR
DDR2_VREF
CPL_DDR2_D[0-31]
DDR2_D[0-31]
CPL_DDR2_D[0-31]
DDR2_D[0-31]
CPL_DDR2_DQS1_N
CPL_DDR2_DQS0_N
CPL_DDR2_DQS2_P
CPL_DDR2_DQS3_N
CPL_DDR2_DQS0_P
CPL_DDR2_DQS1_P
CPL_DDR2_DQS3_P
CPL_DDR2_DQS2_N
CPL_DDR2_A[0-12]
DDR2_DQS2_NDDR2_DQS2_P
CPL_DDR2_DM[0-3]
DDR2_DM[0-3]
DDR2_A[0-12]CPL_DDR2_CS_N
CPL_DDR2_RAS_N
CPL_DDR2_CAS_N
CPL_DDR2_CKCPL_DDR2_CK_N
CPL_DDR2_CKECPL_DDR2_BA0
CPL_DDR2_WE_N
CPL_DDR2_BA1
DDR2_CK_NDDR2_CK
DDR2_CAS_N
DDR2_CS_NDDR2_RAS_N
DDR2_CKEDDR2_BA0
DDR2_WE_N
DDR2_BA1
DDR2_DQS3_PDDR2_DQS3_N
DDR2_DQS0_PDDR2_DQS0_N
DDR2_DQS1_P
DDR2_DQS1_N
DDR2_CK_N
DDR2_BA0
DDR2_CK
DDR2_CAS_N
DDR2_BA0
DDR2_WE_N
DDR2_RAS_N
DDR2_CK_N
DDR2_BA1
DDR2_CK
DDR2_ODT_T
DDR2_CKE
DDR2_CS_N
DDR2_DM[0-3]
1/16W10AR707
1/16W10AR711
1/16W10AR704
1/16W10AR708
1/16W10AR716
1/16W10AR706
1/16W10AR717
1/16W10AR710
HYB18T512160AF-3SIC701
J2VREF
J8CK
H2 VSSQ2
B7UDQS
N8A4
P8A8
L1NC4
L2BA0
R8NC3
K7RAS
F8 VSSQ3
F3LDM
P3A9
M3A1
N3A5
K8CK
R3NC5
L3BA1
J7VSSDL
L7CAS
F2 VSSQ4
B3UDM
M2A10/AP
K2CKE
R7NC6
M7A2
N7A6
M8A0
J1VDDL
K3WE
E8LDQS
P7A11
K9ODT
A2NC1
N2A3
P2A7
H8 VSSQ1
F7LDQS
A8UDQS
R2A12
L8CS
E2NC2
E7 VSSQ5D8 VSSQ6D2 VSSQ7A7 VSSQ8B8 VSSQ9B2 VSSQ10
P9 VSS1N1 VSS2J3 VSS3E3 VSS4A3 VSS5
G9 VDDQ1G7 VDDQ2G3 VDDQ3G1 VDDQ4E9 VDDQ5C9 VDDQ6C7 VDDQ7C3 VDDQ8C1 VDDQ9A9 VDDQ10
R1 VDD1M9 VDD2J9 VDD3E1 VDD4A1 VDD5
B9 DQ15B1 DQ14D9 DQ13D1 DQ12D3 DQ11D7 DQ10C2 DQ9C8 DQ8F9 DQ7F1 DQ6H9 DQ5H1 DQ4H3 DQ3H7 DQ2G2 DQ1G8 DQ0
HYB18T512160AF-3SIC703
J2VREF
J8CK
H2 VSSQ2
B7UDQS
N8A4
P8A8
L1NC4
L2BA0
R8NC3
K7RAS
F8 VSSQ3
F3LDM
P3A9
M3A1
N3A5
K8CK
R3NC5
L3BA1
J7VSSDL
L7CAS
F2 VSSQ4
B3UDM
M2A10/AP
K2CKE
R7NC6
M7A2
N7A6
M8A0
J1VDDL
K3WE
E8LDQS
P7A11
K9ODT
A2NC1
N2A3
P2A7
H8 VSSQ1
F7LDQS
A8UDQS
R2A12
L8CS
E2NC2
E7 VSSQ5D8 VSSQ6D2 VSSQ7A7 VSSQ8B8 VSSQ9B2 VSSQ10
P9 VSS1N1 VSS2J3 VSS3E3 VSS4A3 VSS5
G9 VDDQ1G7 VDDQ2G3 VDDQ3G1 VDDQ4E9 VDDQ5C9 VDDQ6C7 VDDQ7C3 VDDQ8C1 VDDQ9A9 VDDQ10
R1 VDD1M9 VDD2J9 VDD3E1 VDD4A1 VDD5
B9 DQ15B1 DQ14D9 DQ13D1 DQ12D3 DQ11D7 DQ10C2 DQ9C8 DQ8F9 DQ7F1 DQ6H9 DQ5H1 DQ4H3 DQ3H7 DQ2G2 DQ1G8 DQ0
10R77810R77910R78010R781
10R78210R78310R78410R785
10R78610R78710R788
10R78910R79010R791
10R79210R79310R79410R795
10R79610R79710R79810R799
10R72410R725
10R70610R70310R70110R702
10R70510R704
10R707
1
0
K
R
7
7
2
10R710
6
8
0
1
%
R
7
7
1
6
8
0
1
%
R
7
7
0
0
.
1
u
F
C
7
1
3
0
.
1
u
F
C
7
3
7
0
.
1
u
F
C
7
0
8
0
.
1
u
F
C
7
1
0
0
.
1
u
F
C
7
0
5
0
.
1
u
F
C
7
1
4
0
.
1
u
F
C
7
2
8
0
.
1
u
F
C
7
2
7
0
.
1
u
F
C
7
1
7
0
.
1
u
F
C
7
2
9
0
.
1
u
F
C
7
0
6
0
.
1
u
F
C
7
0
9
0
.
1
u
F
C
7
1
1
0
.
1
u
F
C
7
0
7
0
.
1
u
F
C
7
2
5
0
.
1
u
F
C
7
2
6
0
.
1
u
F
C
7
1
2
0
.
1
u
F
C
7
1
5
0
.
1
u
F
C
7
3
8
0
.
1
u
F
C
7
2
4
200R712200R711
0.1uF50V
C754
0
.
1
u
F
C
7
0
4
0
.
1
u
F
C
7
0
3
DDR2_ODTDDR2_ODT_T10R777
0.1uF50V
C755
0.1uFC702
0.1uF16VC750
0.1uFC722
0.1uF16VC753
10uF6.3VC75110uF6.3V
C752
10R71610R71510R71410R713
0.1uFC723
0.1uFC701
0
.
1
u
F
C
7
1
6
0
.
1
u
F
C
7
3
3
0
.
1
u
F
C
7
3
2
0
.
1
u
F
C
7
3
4
0
.
1
u
F
C
7
3
0
0
.
1
u
F
C
7
3
1
0
.
1
u
F
C
7
3
6
0
.
1
u
F
C
7
3
5
294R709
1%
FLI10610H-AAIC100
DDR_D0F24
DDR_D1M24
DDR_D2J25
DDR_D3K26
DDR_D4M26
DDR_D5E25
DDR_D6L25
DDR_D7F26
DDR_D8E29
DDR_D9L29
DDR_D10H28
DDR_D11J29
DDR_D12L27
DDR_D13E27
DDR_D14K28
DDR_D15F28
DDR_D16Y24
DDR_D17AF28
DDR_D18AC25
DDR_D19AD26
DDR_D20AF26
DDR_D21W25
DDR_D22AE25
DDR_D23Y26
DDR_D24W29
DDR_D25AE29
DDR_D26AB28
DDR_D27AC29
DDR_D28AE27
DDR_D29W27
DDR_D30AD28
DDR_D31Y28
DDR_DQS0H25
DDR_DQS0_NH26
DDR_DQS1G28
DDR_DQS1_NG29
DDR_DQS2AB25
DDR_DQS2_NAB26
DDR_DQS3AA28
DDR_DQS3_NAA29
DDR_A0P27
DDR_A1U29
DDR_A2R26
DDR_A3U26
DDR_A4P25
DDR_A5T28
DDR_A6R27
DDR_A7V28
DDR_A8R29
DDR_A9T29
DDR_A10V25
DDR_A11R28
DDR_A12V26
DDR_DM0K24
DDR_DM1J27
DDR_DM2AD24
DDR_DM3AC27
DDR_BA0U28
DDR_BA1T27
DDR_CAS_NP24
DDR_RAS_NN26
DDR_CS_NN25
DDR_WE_NT25
DDR_CKP29
DDR_CK_NN29
DDR_CKEU27
DDR_ODTM27
DDR_CALU24
DDR2_A[9]
CPL_DDR2_DM[2]
DDR2_A[10]
DDR2_A[6]DDR2_A[4]
DDR2_A[10]
DDR2_A[3]
DDR2_A[8]
DDR2_A[2]
DDR2_A[9]
DDR2_A[12] DDR2_A[12]
CPL_DDR2_DM[0]
DDR2_A[5]DDR2_A[6]
DDR2_A[2]DDR2_A[0]
DDR2_A[7]
CPL_DDR2_DM[3]
DDR2_A[5]
DDR2_A[1]
DDR2_A[4]
DDR2_A[8]
CPL_DDR2_DM[1]
DDR2_A[3]
DDR2_A[0]
DDR2_A[7]
DDR2_A[1]
DDR2_A[11] DDR2_A[11]
CPL_DDR2_D[30]CPL_DDR2_D[25]CPL_DDR2_D[28]
CPL_DDR2_D[29]CPL_DDR2_D[24]CPL_DDR2_D[31]
DDR2_D[30]DDR2_D[25]DDR2_D[28]
DDR2_D[29]DDR2_D[24]DDR2_D[31]
CPL_DDR2_D[13]CPL_DDR2_D[8]CPL_DDR2_D[15]
CPL_DDR2_DM[3]
CPL_DDR2_DM[1]
CPL_DDR2_D[14]CPL_DDR2_D[9]CPL_DDR2_D[12]
CPL_DDR2_A[10]CPL_DDR2_A[3]CPL_DDR2_A[7]CPL_DDR2_A[12]
CPL_DDR2_A[2]CPL_DDR2_A[9]CPL_DDR2_A[5]
CPL_DDR2_A[1]
CPL_DDR2_A[8]CPL_DDR2_A[11]CPL_DDR2_A[6]
DDR2_DM[3]
DDR2_DM[1]
DDR2_A[6]DDR2_A[11]DDR2_A[8]
DDR2_A[1]
DDR2_A[5]DDR2_A[9]DDR2_A[2]
DDR2_A[12]DDR2_A[7]DDR2_A[3]
DDR2_A[10]
DDR2_D[14]DDR2_D[9]
DDR2_D[12]
DDR2_D[15]DDR2_D[8]
DDR2_D[13]
DDR2_DM[2]DDR2_DM[3]
CPL_DDR2_D[0]CPL_DDR2_D[1]CPL_DDR2_D[2]CPL_DDR2_D[3]CPL_DDR2_D[4]CPL_DDR2_D[5]CPL_DDR2_D[6]CPL_DDR2_D[7]CPL_DDR2_D[8]CPL_DDR2_D[9]CPL_DDR2_D[10]CPL_DDR2_D[11]CPL_DDR2_D[12]CPL_DDR2_D[13]CPL_DDR2_D[14]CPL_DDR2_D[15]CPL_DDR2_D[16]CPL_DDR2_D[17]CPL_DDR2_D[18]CPL_DDR2_D[19]CPL_DDR2_D[20]CPL_DDR2_D[21]CPL_DDR2_D[22]CPL_DDR2_D[23]CPL_DDR2_D[24]CPL_DDR2_D[25]CPL_DDR2_D[26]CPL_DDR2_D[27]CPL_DDR2_D[28]CPL_DDR2_D[29]CPL_DDR2_D[30]CPL_DDR2_D[31]
DDR2_D[15]DDR2_D[14]DDR2_D[13]DDR2_D[12]DDR2_D[11]DDR2_D[10]DDR2_D[9]DDR2_D[8]DDR2_D[7]DDR2_D[6]DDR2_D[5]DDR2_D[4]DDR2_D[3]DDR2_D[2]DDR2_D[1]DDR2_D[0] DDR2_D[16]
DDR2_D[17]DDR2_D[18]DDR2_D[19]DDR2_D[20]DDR2_D[21]DDR2_D[22]DDR2_D[23]DDR2_D[24]DDR2_D[25]DDR2_D[26]DDR2_D[27]DDR2_D[28]DDR2_D[29]DDR2_D[30]DDR2_D[31]
DDR2_DM[1]DDR2_DM[0]
CPL_DDR2_D[18]CPL_DDR2_D[19]
CPL_DDR2_DM[2]CPL_DDR2_D[22]CPL_DDR2_D[17]CPL_DDR2_D[20]
CPL_DDR2_D[21]CPL_DDR2_D[16]CPL_DDR2_D[23]
CPL_DDR2_D[5]CPL_DDR2_D[0]CPL_DDR2_D[7]
CPL_DDR2_DM[0]
CPL_DDR2_D[2]
CPL_DDR2_D[3]CPL_DDR2_D[6]CPL_DDR2_D[1]CPL_DDR2_D[4]
CPL_DDR2_A[0]CPL_DDR2_A[1]CPL_DDR2_A[2]
CPL_DDR2_A[3]CPL_DDR2_A[4]
CPL_DDR2_A[5]CPL_DDR2_A[6]
CPL_DDR2_A[7]CPL_DDR2_A[8]
CPL_DDR2_A[9]CPL_DDR2_A[10]
CPL_DDR2_A[11]CPL_DDR2_A[12]
DDR2_D[18]DDR2_D[19]
DDR2_DM[2]DDR2_D[22]DDR2_D[17]DDR2_D[20]
DDR2_D[21]DDR2_D[16]DDR2_D[23]
DDR2_D[5]DDR2_D[0]DDR2_D[7]
DDR2_D[2]
DDR2_DM[0]
DDR2_D[3]DDR2_D[6]DDR2_D[1]DDR2_D[4]
CPL_DDR2_D[26]CPL_DDR2_D[27] DDR2_D[27]
DDR2_D[26]
DDR2_D[10]CPL_DDR2_D[10]CPL_DDR2_D[11] DDR2_D[11]
CPL_DDR2_A[4] DDR2_A[4]CPL_DDR2_A[0] DDR2_A[0]
DDR2
0.1uF16VC9019
USBUP-DPUSBUP-DM
USB20-OC1USB20-PWE1
1
/
1
0
W
4
.
7
K
5
%
R
9
5
1
1
/
1
0
W
1
K
5
%
R
9
5
4
1/10W22
5%
R957
33pF50VC9020
R
E
S
E
T
SDA2_3.3VSCL2_3.3V
SDA_HDMI_SWSCL_HDMI_SW
DDC_SDA_4DDC_SCL_4
100R927
RESET
0.1uFC9010
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SCART1_IDSCART2_ID
USB20-1-DM
USB20-PWE1
+5V
0.1uFC9016
USB20-1-DP
120-ohm
L908
0R961
USB20-OC1
C
D
S
3
C
3
0
G
T
H
3
0
V
D
9
0
1
C
D
S
3
C
3
0
G
T
H
3
0
V
D
9
0
2
0R936
0 R9440 R945
RESETTMUE312GAB
SW901
1 2
435
+3.3V_OTP
0.1uF16V
READY
C9001
+3.3V_DAC_DOUGLAS
+3.3V_ADC_DOUGLAS
+3.3V_DOUGLAS
+3.3V_DAC_DOUGLAS
+1.26V_AUD_DOUGLAS
1
K
R
9
6
6
+1.26V_DOUGLAS_D
+1.26V_DOUGLAS
+3.3V_OTP
+3.3V_DOUGLAS
2N3904SQ902
E
B
C
+3.3V_DOUGLAS
+1.26V_DOUGLAS
+1.26V_DOUGLAS_D
+3.3V_HDMI_DOUGLAS
+3.3V_DOUGLAS
+1.26V_DDRPLL
+1.26V_DOUGLAS_D
DDR2_VREF
+3.3V_ADC_DOUGLAS
1/10W
390
5%
R964
4
7
K
R
9
6
5
+3.3V_LVTX_PLL_DOUGLAS
+1.26V_HDMI_DOUGLAS
+3.3V_IO_DOUGLAS
+3.3V_HDMI_DOUGLAS
+1.26V_DOUGLAS
+1.8V_DOUGLAS_DDR
+3.3V_AUD_DOUGLAS
+3.3V_DOUGLAS
+3.3V_DOUGLAS
+1.26V_DDRPLL
+1.26V_DDRPLL
+1.26V_AUD_DOUGLAS
+3.3V_LVTX_DOUGLAS
+3.3V_DOUGLAS
+3.3V_DOUGLAS
+3.3V_LVTX_DOUGLAS
+1.8V_DOUGLAS_DDR
+3.3V_AUD_DOUGLAS
+1.26V_HDMI_DOUGLAS
+3.3V_IO_DOUGLAS
+3.3V_DOUGLAS
+3.3V_LVTX_PLL_DOUGLAS
+1.26V_DOUGLAS_D
+1.26V_DOUGLAS_D
CI_EN
0.1uFC9153
22R971
47KR967
22R968
47KR969READY
47KR970
+5V +5V
SCL1_5V
SDA1_5V
SDA1_5VSCL1_5V
+1.26V_ADC_DOUGLAS+1.26V_DOUGLAS
+1.26V_ADC_DOUGLAS
+5V
D_SUB_SCLD_SUB_SDA
100R928
+1.8V_DOUGLAS_DDR
+3.3V_DOUGLAS
+3.3V_DOUGLAS
1
0
K
R
9
5
0
+1.26V_DOUGLAS_D
+3.3V_DOUGLAS
+3.3V_CI
0R907
0R908
+1.8V_DOUGLAS_DDR
0.1uF16V
C9059
0.1uF16V
C9121
0.1uF16V
C9035
0.1uF16V
C9079
0.1uF16V
C9090
0.1uF16V
C9032
0.1uF16V
C9050
0.1uF16V
C9122
0.1uF16V
C9060
0.1uF16V
C9064
0.1uF16V
C9053
0.1uF16V
C9096
0.1uF16V
C9048
0.1uF16V
C9084
0.1uF16V
C9066
0.1uF16V
C9078
0.1uF16V
C9157
0.1uF16V
C9046
0.1uF16V
C9044
0.1uF16V
C9034
0.1uF16V
C9061
0.1uF16V
C9155
0.1uF16V
C9136
0.1uF16V
C9040
0.1uF16V
C9103
0.1uF16V
C9033
0.1uF16V
C90710.1uF16V
C9029
0.1uF16V
C9074
0.1uF16V
C9058
0.1uF16V
C9082
0.1uF16V
C9134
0.1uF16V
C9160
0.1uF16V
C9069
0.1uF16V
C9123
0.1uF16V
C9119
0.1uF16V
C9051
0.1uF16V
C9130
0.1uF16V
C9036
0.1uF16V
C9031
0.1uF16V
C9101
0.1uF16V
C90770.1uF16V
C9062
0.1uF16V
C9128
0.1uF16V
C9056
0.1uF16V
C9118
0.1uF16V
C90630.1uF16V
C9073
0.1uF16V
C9038
0.1uF16V
C9162
0.1uF16V
C9138
0.1uF16V
C9131
0.1uF16V
C9072
0.1uF16V
C9081
0.1uF16V
C9114
0.1uF16V
C90680.1uF16V
C9055
0.1uF16V
C9030
0.1uF16V
C9070
0.1uF16V
C9075
0.1uF16V
C9052
0.1uF16V
C9112
0.1uF16V
C9039
0.1uF16V
C9156
0.1uF16V
C9037
0.1uF16V
C9054
0.1uF16V
C9161
0.1uF16V
C9087
0.1uF16V
C9049
0.1uF16V
C9047
0.1uF16V
C9107
0.1uF16V
C9198
+3.3V_DOUGLAS
0.1uF16V
C91650.1uF16V
C9196
+3.3V_DOUGLAS_VAA
+3.3V_DOUGLAS_VDDI
+3.3V_DOUGLAS
0.1uF16V
C9197
+3.3V_DOUGLAS_VAA
+3.3V_DOUGLAS_VDDI
0R901
+3.3V_DOUGLAS
+3.3V_STBY+3.3V_STBY
DEBUG_RXDEBUG_TX
CHAPLIN_RXCHAPLIN_TX
MLB-201209-0120P-N2L919
MLB-201209-0120P-N2L922
MLB-201209-0120P-N2L926
MLB-201209-0120P-N2L924
MLB-201209-0120P-N2L910
MLB-201209-0120P-N2L928
MLB-201209-0120P-N2L912
MLB-201209-0120P-N2L923
MLB-201209-0120P-N2L921
0R914
0R913
4.7KR984
24LC512IC907
3A2
2A1
4VSS
1A0
5 SDA
6 SCL
7 WP
8 VCC
0.1uF16VC9199
4.7KR982
47uF16VC9017
READY
100uF16VC9025
10uF6.3V
C9045
10uF6.3V
C9042
10uF6.3V
C9026
10uF6.3V
C9095
10uF6.3V
C9043
10uF6.3V
C9113
10uF6.3V
C9085
10uF6.3V
C9109
10uF6.3V
C902810uF6.3V
C9002
10uF6.3V
C916410uF6.3V
C916310uF6.3V
C9144
READY330uF6.3V
C9159
TPS2042BDRG4IC901
3EN1
2IN
4EN2
1GND
5OC2
6OUT2
7OUT1
8OC1
10uF6.3V
C9154
10uF6.3V
C9104
+3.3V_OTP
1/16W1KAR901
1
0
0
R
9
6
0
R
E
A
D
Y
1
0
0
R
9
6
3
R
E
A
D
Y
SCART1_VIN
SIDE_CIN
SCART1_FB
1
/
1
6
W
4
.
7
K
A
R
9
0
2
1/16W100AR904
1/16W100AR903
10R978
0.1uFC9166
510R977
0R962
READY
0.1uFC9152
0.1uF16V
C9158
6.2K1%
R956
33uF10V
C9076
12505WS-08A00P904
1
2
3
4
5
6
7
8
9
R
T
R
0
3
0
P
0
2
Q
9
0
1
S
D
G
22
R9040.1uFC9003
22
R903
0.1uF
C9004
0.1uF
C900522R902
3.3KR911
3.3KR910
4.7KR912
4.7KR905
FLI10610H-AAIC100
LBADC_33D24
LBADC_GNDE23
LBADC_IN1C25
LBADC_IN2C24
LBADC_IN3B25
LBADC_IN4B24
LBADC_IN5A25
LBADC_IN6A24
LBADC_RETURNF22
2WIRE_M1_SDAD21
2WIRE_M1_SCLD20
2WIRE_M0_SCLE20
2WIRE_M0_SDAF20
2WIRE_S0_SDAB12
2WIRE_S0_SCLA12
2WIRE_S1_SDAD12
2WIRE_S1_SCLC12
2WIRE_S2_SDAE11
2WIRE_S2_SCLD11
PWM3A13
PWM2B13
PWM1C13
PWM0D13
RESET_ND23
UART0_RXDA19
UART0_TXDB19
UART1_RXDA20
UART1_TXDB20
UART1_RTSC20
UART1_CTSC19
TRSTB26
TDIB27
TDOA27
TMSA28
TCKB28
EJ_RST_NA29
EJ_DINTB29
USB_FLAGC29
USB_PWRENC28
USBPHY_PADPAJ20
USBPHY_PADMAH20
USBPHY_VRESAG20
IRDATAC21
DFSYNCE13
PPWRA21
PBIASB21
FLI10610H-AAIC100
CVDD12_1L11
CVDD12_2L12
CVDD12_3L17
CVDD12_4L18
CVDD12_5L19
CVDD12_6M11
CVDD12_7M12
CVDD12_8M17
CVDD12_9M18
CVDD12_10M19
CVDD12_11V11
CVDD12_12V12
CVDD12_13V13
CVDD12_14V18
CVDD12_15V19
CVDD12_16W11
CVDD12_17W12
CVDD12_18W13
CVDD12_19W18
CVDD12_20W19
IOVDD33_1F12
IOVDD33_2F13
IOVDD33_3F14
IOVDD33_4F15
IOVDD33_5F16
IOVDD33_6F18
IOVDD33_7F19
IOVDD33_8AD8
IOVDD33_9AD10
IOVDD33_10AD11
IOVDD33_11AD12
IOVDD33_12AD14
IOVDD33_13AD16
IOVDD33_14AD17
IOVDD33_15AD18
IOVDD33_16U6
IOVDD33_17V6
IOVDD33_18Y6
IOVDD33_19AA6
IOVDD33_20AB6
ADC_VDD12_1A1
ADC_VDD12_2B2
ADC_VDD12_3C3
ADC_VDDA33_1E4
ADC_VDDA33_2F4
ADC_VDDA33_3G4
ADC_VDDA33_4H4
ADC_VDDA33_5K4
AUD_AVDD12_1P6
AUD_AVDD12_2R6
C4PL1
AUD_AVDD33_2T6
AUD_AVDD33_3T5
AUD_AVDD33_4U5
AUD_AVDD33_5U4
AUD_AVDD33_6U3
AUD_HP_AVDD33U2
DDRPLL_AVDD12D22
DDR_VDD_1D25
DDR_VDD_2D27
DDR_VDD_3D29
DDR_VDD_4F25
DDR_VDD_5F27
DDR_VDD_6F29
DDR_VDD_7H24
DDR_VDD_8H27
DDR_VDD_9H29
DDR_VDD_10K25
DDR_VDD_11K27
DDR_VDD_12K29
DDR_VDD_13M25
DDR_VDD_14M29
DDR_VDD_15N24
DDR_VDD_16P28
DDR_VDD_17R25
DDR_VDD_18U25
DDR_VDD_19V27
DDR_VDD_20Y25
DDR_VDD_21Y27
DDR_VDD_22Y29
DDR_VDD_23AB24
DDR_VDD_24AB27
DDR_VDD_25AB29
DDR_VDD_26AD25
DDR_VDD_27AD27
DDR_VDD_28AD29
DDR_VDD_29AF25
DDR_VDD_30AF27
DDR_VDD_31AF29
DDRPLL_AVDD33E22
DDR_VDDI_1F23
DDR_VDDI_2AD23
DDR_VRF_0G25
DDR_VRF_1R24
DDR_VRF_2AA25
DLL_VAA 0M28
DLL_VAA 1V24
HDMI_VDDA33_1C4
HDMI_VDDA33_2D5
HDMI_VDDA33_3D6
HDMI_VDDA33_4E6
HDMI_VDDA33_5E7
HDMI_VDD12_1D10
HDMI_VDD12_2E8
HDMI_VDD12_3E9
HDMI_VDD12_4E10
LVTX_VDD33_1AE21
LVTX_VDD33_2AE22
LVTX_VDD33_3AF24
LVTX_PLL_VDD33AG26
OTP_VDD33A26
RPLL_AVDD33B23
RPLL_AVDD12C23
USB_AVDD12AE20
USB_AVDD33_1AF20
USB_AVDD33_2AG19
USB_AVDD33_3AH19
VDAC_VDD12AD6
VDAC_AVDD33_1AE6
VDAC_AVDD33_2AF5
VDAC_AVDD33_3AF6
CVSS_1D26
CVSS_2D28
CVSS_3E24
CVSS_4E26
CVSS_5E28
CVSS_6G24
CVSS_7G26
CVSS_8G27
CVSS_9J24
CVSS_10J26
CVSS_11J28
CVSS_12L13
CVSS_13L14
CVSS_14L15
CVSS_15L16
CVSS_16L24
CVSS_17L26
CVSS_18L28
CVSS_19M13
CVSS_20M14
CVSS_21M15
CVSS_22M16
CVSS_23N11
CVSS_24N12
CVSS_25N13
CVSS_26N14
CVSS_27N15
CVSS_28N16
CVSS_29N17
CVSS_30N18
CVSS_31N19
CVSS_32N27
CVSS_33N28
CVSS_34P11
CVSS_35P12
CVSS_36P13
CVSS_37P14
CVSS_38P15
CVSS_39P16
CVSS_40P17
CVSS_41P18
CVSS_42P19
CVSS_43P26
CVSS_44R11
CVSS_45R12
CVSS_46R13
CVSS_47R14
CVSS_48R15
CVSS_49R16
CVSS_50R17
CVSS_51R18
CVSS_52R19
CVSS_53T11
CVSS_54T12
CVSS_55T13
CVSS_56T14
CVSS_57T15
CVSS_58T16
CVSS_59T17
CVSS_60T18
CVSS_61T19
CVSS_62T24
CVSS_63T26
CVSS_64U11
CVSS_65U12
CVSS_66U13
CVSS_67U14
CVSS_68U15
CVSS_69U16
CVSS_70U17
CVSS_71U18
CVSS_72U19
CVSS_73V14
CVSS_74V15
CVSS_75V16
CVSS_76V17
CVSS_77V29
CVSS_78W14
CVSS_79W15
CVSS_80W16
CVSS_81W17
CVSS_82W24
CVSS_83W26
CVSS_84W28
CVSS_85AA24
CVSS_86AA26
CVSS_87AA27
CVSS_88AC24
CVSS_89AC26
CVSS_90AC28
CVSS_91AE24
CVSS_92AE26
CVSS_93AE28
ADC_GND12_1