Lecture2 Ee720 Channels

7/29/2019 Lecture2 Ee720 Channels

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Sam Palermo Analog & Mixed-Signal Center

Texas A&M University

ECEN720: High-Speed LinksCircuits and Systems

Spring 2013

Lecture 2: Channel Components, Wires, & Transmission Lines



Announcements

• HW1 due now• Lab1 will be on Jan. 28 in ZACH 203

• Prelab 1 is due on Jan 30 in class

• Reference Material Posted on Website• TDR theory application note• S-parameter notes

• Anyone graduating or want an intern this summer?• I know of several companies with openings in the high-

speed link area

2



Agenda

• Channel Components• IC Packages, PCBs, connectors, vias, PCB Traces

• Wire Models• Resistance, capacitance, inductance

• Transmission Lines• Propagation constant• Characteristic impedance

• Loss• Reflections• Termination examples• Differential transmission lines

3



Channel Components

4

Edge connector

Packaged SerDes

Line card trace

Backplane trace

Via stub

The ChannelTx IC

Pkg Line cardtrace

Edgeconnector

Line cardvia

Backplanevia

Backplane16” trace

Edgeconnector

Line cardtrace

Rx IC

Pkg Backplanevia

Line cardvia

[Meghelli (IBM) ISSCC 2006]



IC Packages

• Package style dependson application and pincount

• Packaging technologyhasn’t been able toincrease pin count atsame rate as on-chipaggregate bandwidth

• Leads to I/O constraineddesigns and higher datarate per pin

5

Package Type Pin Count

Small Outline Package (SOP) 8 – 56

Quad Flat Package (QFP) 64 - 304

Plastic Ball Grid Array (PBGA) 256 - 420Enhanced Ball Grid Array (EBGA) 352 - 896

Flip Chip Ball Grid Array (FC-BGA) 1089 - 2116SOP

PBGA

QFP

FC-BGA

[Package Images - Fujitsu]



IC Package Examples

• Wirebonding is mostcommon die attach method

• Flip-chip packaging allows

for more efficient heatremoval

• 2D solder ball array onchip allows for moresignals and lower signaland supply impedance

6

Standard Wirebond Package

Flip-Chip/Wirebond Package

Flip-Chip/Solder Ball Package

[Package Images - Fujitsu]



IC Package Model

7

Bondwires• L ~ 1nH/mm•Mutual L “K” • Ccouple

~ 20fF/mm

Package Trace• L ~ 0.7-1nH/mm•Mutual L “K” • Clayer

~ 80-90fF/mm•C

couple

~ 40fF/mm

[Dally]



Printed Circuit Boards

• Components soldered ontop (and bottom)

• Typical boards have 4-8signal layers and anequal number of powerand ground planes

• Backplanes can haveover 30 layers

8



PCB Stackup

• Signals typically on top andbottom layers

• GND/Power plane pairs and

signal layer pairs alternate inboard interior

• Typical copper trace thickness

• “0.5oz” (17.5um) for signal layers• “1oz” (35um) for power planes

9

[Dally]



Connectors

• Connectors are usedto transfer signalsfrom board-to-board

• Typical differentialpair density between

16-32 pairs/10mm

10

[Tyco]



Connectors

• Important to maintain proper differentialimpedance through connector

11

• Crosstalk can be an issue in the connectors

[Tyco]



Vias

• Used to connect PCB layers

• Made by drilling a hole throughthe board which is plated with

copper• Pads connect to signal layers/traces• Clearance holes avoid power planes

• Expensive in terms of signaldensity and integrity• Consume multiple trace tracks• Typically lower impedance and create

“stubs”

12

[Dally]



Impact of Via Stubs at Connectors

13

• Legacy BP has default straight vias• Creates severe nulls which kills signal integrity

• Refined BP has expensive backdrilled vias

Edge connector

Packaged SerDes

Line card traceBackplane trace

Via stub



PCB Trace Configurations

• Microstrips are signaltraces on PCB outersurfaces• Trace is not enclosed

and susceptible tocross-talk

• Striplines aresandwiched betweentwo parallel groundplanes• Has increased isolation

14

[Johnson]



Wire Models

• Resistance

• Capacitance

• Inductance

• Transmission line theory

15



Wire Resistance

• Wire resistance is determined by materialresistivity, ρ , and geometry

• Causes signal loss and propagation delay

16

whl

Al

R ρ ρ ==2rl

Al

Rπ ρ ρ ==

[Dally]



Wire Capacitance

• Wire capacitance is determinedby dielectric permittivity, ε ,and geometry

• Best to use lowest ε r

• Lower capacitance• Higher propagation velocity

17

sw

C ε =( )

12log

2rr

C πε =( )rs

Clog

πε =( )hss

wC

4log2πε ε +=

[Dally]



Wire Inductance

• Wire inductance is determined by materialpermeability, µ , and closed-loop geometry

• For wire in homogeneous medium

• Generally

18

εµ =CL

H/m104 70 −×== π µ µ



Wire Models

• Model Types• Ideal• Lumped C, R, L• RC transmission line• LC transmission line• RLGC transmission line

• Condition for LC or RLGC model ( vs RC)

19

LR

f π 20

≥

Wire R L C >f (LC wire)

AWG24 Twisted Pair 0.08 Ω /m 400nH/m 40pF/m 32kHz

PCB Trace 5 Ω /m 300nH/m 100pF/m 2.7MHz

On-Chip Min. Width M6(0.18µm CMOS node) 40k Ω /m 4µH/m 300pF/m 1.6GHz



RLGC Transmission Line Model

20

( ) ( ) ( )t

txILtxRIx

txV∂

∂−−=∂

∂ ,,,

( ) ( ) ( )t

txVCtxGV

xtxI

∂∂−−=

∂∂ ,

,,

0dxAs →(1)

(2)

GeneralTransmissionLine Equations



Time-Harmonic Transmission Line Eqs.

• Assuming a traveling sinusoidal wave with angular frequency, ω

21

( ) ( ) ( )xIL jRdx

xdVω +−=

( ) ( ) ( )xVC jGdx

xdIω +−=

• Differentiating (3) and plugging in (4) (and vice versa)

( ) ( )xVdx

xVd 22

2

γ =

( ) ( )xIdx

xId 22

2γ =

• where γ is the propagation constant

( )( ) ( )-1m C jGL jR j ω ω β α γ ++=+=

(5)

(6)

Time-HarmonicTransmissionLine Equations

(3)

(4)



Transmission Line Propagation Constant

• Solutions to the Time-Harmonic Line Equations:

22

( ) ( ) ( ) xr

xf rf eVeVxVxVxV γ γ

00 +=+= −

• What does the propagation constant tell us?

• Real part ( α ) determines attenuation/distance (Np/m)• Imaginary part ( β) determines phase shift/distance (rad/m)• Signal phase velocity

( ) ( ) ( ) xr

xf rf eIeIxIxIxI γ γ

00 +=+= −

where ( )( ) ( )-1m C jGL jR j ω ω β α γ ++=+=

(m/s) β ω υ =



Transmission Line Impedance, Z 0

• For an infinitely long line, the voltage/current ratio is Z 0• From time-harmonic transmission line eqs. (3) and (4)

23

( )( ) ( )

Ω+

+== 0 C jG

L jR

xI

xVZ

ω

ω

• Driving a line terminated by Z 0 is the same as driving an

infinitely long line

[Dally ]



Lossless LC Transmission Lines

• If Rdx=Gdx=0

24

LC

LC j j

ω β

α

ω β α γ

=

==+=

0

CL

Z

LC

=

==

0

1 β ω υ

No Loss!

• Waves propagate w/o distortion• Velocity and impedance

independent of frequency• Impedance is purely real

[Johnson ]



Low-Loss LRC Transmission Lines

• If R/ ωL and G/ ωC << 1• Behave similar to ideal

LC transmission line,

but …• Experience resistive anddielectric loss

• Frequency dependent

propagation velocityresults in dispersion• Fast step, followed by slow

DC tail

25

( )( )

β α α

ω ω ω

ω ω

ω ω β α γ

j

CG

LR

LC jGZ

ZR

LCGLRC

jLC j

C jGL jR j

DR++=

+

+++≅

+−≅

++=+=

220

0

21

81

811

22

1

2

2

0

0

GZZR

D

R

≅

≅

α

α

+ +≅

22

81811 CGLRLC ω ω ω β

122

81

811

−

+

+≅

CG

LR

LCω ω

υ

Resistive Loss

Dielectric Loss



Skin Effect (Resistive Loss)

• High-frequency current density fallsoff exponentially from conductorsurface

• Skin depth, δ, is where current fallsby e -1 relative to full conductor

• Decreases proportional tosqrt(frequency)

• Relevant at critical frequency f swhere skin depth equals half conductor height (or radius)

• Above f s resistance/loss increasesproportional to sqrt(frequency)

26

δ d

e J−

= ( ) 21−= µσ π δ f

2

2

=h

f sπµ

ρ

( )21

=

sDC f f Rf R

21

02

=

s

DCR f

f Z

Rα

For rectangular conductor:

[Dally ]



Skin Effect (Resistive Loss)

27

[Dally ]

MHzf mR sDC 43 ,7 =Ω=5-mil Stripguide

kHzf mR sDC 67 ,08.0 =Ω=30 AWG Pair

21

02

=

s

DC

R f

f

Z

Rα



Dielectric Absorption (Loss)

• An alternating electric fieldcauses dielectric atoms torotate and absorb signalenergy in the form of heat

• Dielectric loss is expressedin terms of the losstangent

• Loss increases directlyproportional to frequency

28

CGD ω

δ =tan

LCf

CLfCGZ

D

DD

δ π

δ π α

tan2

tan22

0

=

==

[Dally ]



Total Wire Loss

29

[Dally ]



Reflections & Telegrapher’s Eq.

30

T

i T ZZ

VI +

=0

2

+

−=

+−=

−==

0

0

0

00

0

2

,

ZZ

ZZ

Z

VI

ZZV

ZVI

IIIZ

VI

T

Tir

T

iir

Tf ri

f

0

0

ZZZZ

VV

IIk

T

T

i

r

f

rr +

−===

Termination Current:• With a Thevenin-equivalent model of the line:

• KCL at Termination:Telegrapher’s Equation or

Reflection Coefficient

[Dally ]



Termination Examples - Ideal

31

R S = 50Ω

Z0 = 50 Ω , t d = 1ns

R T = 50 Ω

05050

5050

050505050

5.05050

501

=+

−=

=+−=

=

+=

rS

rT

i

k

k

VVV

in (step begins at 1ns)

source

termination



Termination Examples - Open

32

R S = 50Ω

Z0 = 50 Ω , t d = 1ns

R T ~ ∞ (1M Ω )

05050

5050

15050

5.05050

501

=+

−=

+=+∞−∞=

=

+=

rS

rT

i

k

k

VVV


source

termination



Termination Examples - Short

33

R S = 50Ω

Z0 = 50 Ω , t d = 1ns

R T = 0 Ω

05050

5050

1500500

5.05050

501

=+

−=

−=+−=

=

+=

rS

rT

i

k

k

VVV


source

termination



Arbitrary Termination Example

34

R S = 400Ω

Z0 = 50 Ω , t d = 1ns

R T = 600 Ω

778.050400

50400

846.05060050600

111.050400

501

=+

−=

=+−=

=

+=

rS

rT

i

k

k

VVV


sourcetermination

0.111V 0.205V

0.278V 0.340



Lattice Diagram

35

R S = 400Ω

R T = 600 Ω

Z0 = 50 Ω , t d = 1ns


Rings up to 0.6V (DC voltage division)



Termination Reflection Patterns

36

R S = 25 Ω , RT = 25 Ω

kr S & kr T < 0

Voltages Converge

R S = 25 Ω , RT = 100 Ω

kr S < 0 & kr T > 0

Voltages Oscillate

R S = 100 Ω , RT = 25 Ω

kr S > 0 & kr T < 0

Voltages Oscillate

R S = 100 Ω , RT = 100 Ω

kr S > 0 & kr T > 0

Voltages Ring Up

source

termination

sourcetermination

source

termination

source

termination



Termination Schemes

37

• No Termination• Little to absorb line energy• Can generate oscillating

waveform• Line must be very short

relative to signal transition time• n = 4 - 6

• Limited off-chip use

• Source Termination• Source output takes 2 steps up• Used in moderate speed point-

to-point connections

LCnlnTt triproundr 2=> −

LClt porch 2≅



Termination Schemes

38

• Receiver Termination• No reflection from receiver• Watch out for intermediate

impedance discontinuities• Little to absorb reflections at driver

• Double Termination• Best configuration for min

reflections• Reflections absorbed at both driver

and receiver• Get half the swing relative to

single termination• Most common termination scheme

for high performance serial links



Differential Signaling

39

• Differential signaling advantages• Self-referenced• Common-mode noise rejection

• Increased signal swing• Reduced self-induced power-supply noise

• Requires 2x the number of signaling pins

relative to single-ended signaling• But, smaller ratio of supply/signal (return) pins• Total pin overhead is typically 1.3-1.8x (vs 2x)



Odd & Even Modes

40

[Hall ]

• Even mode• When equal voltages drive both lines, only one mode propagates called even more

• Odd mode• When equal in magnitude, but out of phase, voltages drive both lines, only one

mode propagates called odd mode• For a differential pair (odd mode), a virtual reference plane exists between

the conductors that provides a continuous return current path• Electric field is perpendicular to the virtual plane• Magnetic field is tangent to the virtual plane



Balanced Transmission Lines

• Even (common) modeexcitation• Effective C = C C

• Effective L = L + M• Odd (differential) mode

excitation

• Effective C = C C + 2C d• Effective L = L – M

41

21

21

2

+−=

+=

dcodd

c

even

CCML

Z

C

MLZ

[Dally ]

2 ,2 even

CModdDIFFZ

ZZZ ==



PI-Termination

42

1RZeven=

2||2|| 221 RZRRZ evenodd==

−

=oddeven

evenodd

ZZZZ

R 22



T-Termination

43

12 2RRZeven +=

( )oddeven

odd

ZZR

RZ

−=

=

21

1

2



Next Time

• Channel modeling• Time domain reflectometer (TDR)• Network analysis

Lecture2 Ee720 Channels

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