Lab. 7 Signal Transmission between DSP and ADC/DAC DAC/ADC/FGPA module:

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1 Lab. 7 Signal Transmission between DSP and ADC/DAC DAC/ADC/FGPA module: With DAC/ADC, digital systems can be communicated with the analog world. PC DSP Ethernet EMIF Analog Digital Digital DAC ADC FPGA

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Lab. 7 Signal Transmission between DSP and ADC/DAC DAC/ADC/FGPA module: With DAC/ADC, digital systems can be communicated with the analog world. Digital. Digital. Analog. DSP. PC. DAC ADC. FPGA. Ethernet. EMIF. IQ board: provide I/Q connectors for the DAC/ADC. - PowerPoint PPT Presentation

Transcript of Lab. 7 Signal Transmission between DSP and ADC/DAC DAC/ADC/FGPA module:

Page 1: Lab. 7 Signal Transmission between DSP and ADC/DAC DAC/ADC/FGPA module:

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Lab. 7 Signal Transmission between DSP and ADC/DAC

DAC/ADC/FGPA module:

With DAC/ADC, digital systems can be communicated with the analog world.

PC DSP

Ethernet EMIF

AnalogDigitalDigital

DACADC

FPGA

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IQ board: provide I/Q connectors for the DAC/ADC.

There are 4 channels (2 inputs/2 outputs) and each channel has IQ components (differential). Thus, we have total 16 SMA connectors.

EMIF interface routines in both FPGA and DSP have been built. All you have to do is call the related C functions when you want to conduct I/O.

* Can be replaced by RF board

FPGA DACADC

Page 3: Lab. 7 Signal Transmission between DSP and ADC/DAC DAC/ADC/FGPA module:

How to call the EMIF routines? Step 1: Copy the given files to your project: (1) hello.c,

(2) edma.c, (3) interrupt.c, (4) intvecs.asm, (5) psc.c Step 2: Declare five functions in your main C file.

Step 3: Call the function F_StartEMIFA (.) first for initialization (only do that for one time).

Step 4: Call the function F_SetTxBlkGp (.) to start transmit or F_SetRxBlkGp (.) receive data from FPGA through EMIF (Call this function when you want to do TX or RX task).

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Note that the unit of TX and RX buffer are 1K, and the variable format is short (2 Bytes). However, we do not use all bits to transmit data. In TX direction, we only use the 10 bits in the end of a short word (16 Bits), and in RX direction, we only use the 12 bits in the end of a short word (16 Bits).

Also, the DAC is unsigned. Thus, the signal has to be quantized and mapped.

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Page 5: Lab. 7 Signal Transmission between DSP and ADC/DAC DAC/ADC/FGPA module:

The input/output of DAC/ADC are differential, meaning that you have two pairs of wires.

The IQ board:

The demo program outputs both I and Q signal. For Tx experiment, you can either use I or Q for the scope.

I+

I-

Q+

Q-

I+

I-

Q+

Q-

I+

I-

Q+

Q-

I+

I-

Q+

Q-TX/DAC

RX/ADC

TX experimentOr

RX experiment

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Tx experiments:– Use DSP to generate periodic signals and use a scope after

DAC to observe the output

Practice 1:– Generate a sinusoidal signal in DSP.

– Generate a triangular wave in DSP.

– Observe the signal on scope (in one channel).

– Calculate the frequencies of the observed signals, and find the relationship between the analog and digital frequencies.

– Adjust the peak values of the signals and see the output results.

PC DSP

Ethernet EMIF

DACADC

FPGA

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Rx experiments:– Use a function generator (FG) to generate periodic signals

and input the signals to the ADC.

Practice 2:– Generate sinusoidal and triangular signals with the FG.

– Observe the signal in DSP.

– Calculate the frequencies of the observed signals, and find the relationship between the analog and digital frequencies.

– Adjust the peak values of the signals and see the output results.

– Adjust the frequency of the input signal.

DSP DAF FG

Page 8: Lab. 7 Signal Transmission between DSP and ADC/DAC DAC/ADC/FGPA module:

Since the function generator is single-ended, we tie one of a differential pair to the ground.

Grounding:

I+

I-

Q+

Q-

I+

I-

Q+

Q-

I+

I-

Q+

Q-

I+

I-

Q+

Q-

……..Ground

Functiongenerator

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Loop-back experiments:– Use DSP to generate periodic signals and loop back the

signal from DAC to ADC.

Practice 3:– DSP generates a triangular wave and let the signal loop

back.

– DSP saves the received signal into a file.

– Read the file and plot the signal to check if it is right.

PC DSP

Ethernet EMIF

DACADC

FPGA