KITPF7100FRDMEVM - NXP
5
5 5 4 4 3 3 2 2 1 1 D D C C B B A A KITPF7100FRDMEVM 1 TITLE, TOC & REV 3 Table of Contents 2 BLOCK DIAGRAM PMIC Revisions Rev Description Initial schematic Date X1 17-JAN-2019 B2 Wenhua Chen Kate Fan Wenhua Chen KL25, CONNECTOR, AMUX 4 APPENDIX JUMPER/DNP/SWITCH 5 A Release A085 4-MAR-2019 B 1.Solved the J1 mirror problem. 2. Changed J27.3,J26.3,R103.1,R78.1,R85.1 pin nets from VIN_PIN to VIN. 3. Changed FSOB and PWRON pull up resistors from 470K to 100K. 31-MAY-2019 B1 Update the board name. 15-Aug-2019 B2 Update U1 part number to PPF7100AVBA0ES. 25-Sep-2019 Drawing Title: Size Document Number Rev Date: Sheet of Page Title: Designer: Drawn by: Approved: Analog Sensor Product Group 6501 William Cannon Drive West Austin, TX 78735-8598 This document contains information proprietary to NXP and shall not be used for engineering design, procurement or manufacture in whole or in part without the express written permission of NXP Semiconductors. ICAP Classification: CP: IUO: PUBI: SCH-45772 PDF: SPF-45772 KITPF7100FRDMEVM C Wednesday, September 25, 2019 TITLE 1 5 X ____ ____ Drawing Title: Size Document Number Rev Date: Sheet of Page Title: Designer: Drawn by: Approved: Analog Sensor Product Group 6501 William Cannon Drive West Austin, TX 78735-8598 This document contains information proprietary to NXP and shall not be used for engineering design, procurement or manufacture in whole or in part without the express written permission of NXP Semiconductors. ICAP Classification: CP: IUO: PUBI: SCH-45772 PDF: SPF-45772 KITPF7100FRDMEVM C Wednesday, September 25, 2019 TITLE 1 5 X ____ ____ Drawing Title: Size Document Number Rev Date: Sheet of Page Title: Designer: Drawn by: Approved: Analog Sensor Product Group 6501 William Cannon Drive West Austin, TX 78735-8598 This document contains information proprietary to NXP and shall not be used for engineering design, procurement or manufacture in whole or in part without the express written permission of NXP Semiconductors. ICAP Classification: CP: IUO: PUBI: SCH-45772 PDF: SPF-45772 KITPF7100FRDMEVM C Wednesday, September 25, 2019 TITLE 1 5 X ____ ____
Transcript of KITPF7100FRDMEVM - NXP
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C C
B B
A A
KITPF7100FRDMEVM
1 TITLE, TOC & REV
3
Table of Contents
2 BLOCK DIAGRAMPMIC
Revisions
Rev Description
Initial schematic
Date
X1 17-JAN-2019
B2
Wenhua Chen
Kate Fan
Wenhua Chen
KL25, CONNECTOR, AMUX4APPENDIX JUMPER/DNP/SWITCH5 A Release A085 4-MAR-2019
B1.Solved the J1 mirror problem.2. Changed J27.3,J26.3,R103.1,R78.1,R85.1 pin nets from VIN_PIN to VIN.3. Changed FSOB and PWRON pull up resistors from 470K to 100K.
31-MAY-2019
B1 Update the board name. 15-Aug-2019
B2 Update U1 part number to PPF7100AVBA0ES. 25-Sep-2019
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Analog Sensor Product Group6501 William Cannon Drive WestAustin, TX 78735-8598
This document contains information proprietary to NXP and shall not be used for engineering design,procurement or manufacture in whole or in part without the express written permission of NXP Semiconductors.
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
TITLE
1 5
X________Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Analog Sensor Product Group6501 William Cannon Drive WestAustin, TX 78735-8598
This document contains information proprietary to NXP and shall not be used for engineering design,procurement or manufacture in whole or in part without the express written permission of NXP Semiconductors.
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
TITLE
1 5
X________Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Analog Sensor Product Group6501 William Cannon Drive WestAustin, TX 78735-8598
This document contains information proprietary to NXP and shall not be used for engineering design,procurement or manufacture in whole or in part without the express written permission of NXP Semiconductors.
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
TITLE
1 5
X________
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BLOCK DIAGRAM
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772 B2
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
BLOCK DIAGRAM
2 5
___ X Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772 B2
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
BLOCK DIAGRAM
2 5
___ X Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772 B2
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
BLOCK DIAGRAM
2 5
___ X
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NOTE:VDDOTP = GND, the device loadsthe configuration from the OTPFuses
VDDOTP = V1P5D, the device loadsthe configuration from thedefault hardwire configuration.
Vout =1.242V*(R2/R1+1)
TBBEN
NOTE:TBBEN = GND, the deviceoperates in normal mode (fullfunctionality)
TBBEN = V1P5D, the deviceenters TBB configuration andlimited functionality. TBBregisters can be set and thenwill be loaded after PWRONevent.
VSELECT
LDO2EN
SW1 and SW2 single phase modeOperation mode
SW1/SW2/SW3/SW4 Quad phase mode
SW3/SW4 Dual phase modeSW3 and SW4 single phase mode
SW1/SW2 Dual phase mode
Mounting Hole
Place the header around edge of board
Ground Loops
����������
���������
����������
�������������
���
External 3.3V/1.8V LDO
SW1/SW2/SW3 Triple phase mode
��������VIN
VIN
VIN
VIN
VIN_PIN
LDO1IN
LDO2IN
VIN
VIN_PIN V1P5AV1P5D
SW1IN
SW2IN
SW3IN
SW4IN
SW5IN
VDDOTPV1P5D
LDO1OUTVDDIO
VREG
VIN
P5V_USB
VIN_REG VREG
VDDIO
V1P5D
VDDIO
VDDIO
VIN
P5V_USB
VDDIO
VSNVS1
VIN
VDDIO
VDDIO
V1P5A
VDDIO
VDDIO
LDO1IN LDO2IN
VSNVS1 VSNVS2
LDO2OUT LDO1OUT
SW1INSW1OUT
SW2OUT SW2IN
SW3OUT SW3IN
SW4OUT SW4IN
SW5OUT SW5IN
V1P5D
V1P5A
VDDOTP
VDDIO
VREG
VIN
SW1OUT
SW2OUT
SW3OUT
SW4OUT
VIN
VIN
SYNCIN 4
SCL1 4
SDA1 4
TBBEN 4
XINTB 4
AMUX 4
PGOOD 4
EWARN 4
PWRON 4
STANDBY 4
RESETBMCU 4
INTB 4
WDI 4
SYNCOUT 4
XFAILB 4
VSELECT 4
LDO2EN 4
LDO1OUT 4
LDO2OUT 4
SW5OUT 4
VSNVS1 4
VSNVS2 4
VIN_PIN 4
SW1OUT 4
SW2OUT 4
SW4OUT 4
SW3OUT 4
FSOB 4
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772 B2
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
PMIC
3 5
___ X Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772 B2
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
PMIC
3 5
___ X Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772 B2
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
PMIC
3 5
___ X
TP69
J37
TB_1X2
SILK = SW4OUT
A1
B2
C62.2uF
TP3
FSOB
TP67
R79 100K
C674.7UF
R96 0
C720.1uFDNP
TP54
VREG
R98 0
R80 100K
R99 0
C91 1000pFDNP
C121uF
TP5
SCL1
C111uF
Q6
NX3008NBKW,115
1
23
TP51GND
J38
TB_1X2
SILK = SW5OUT
A1
B2
PPF7100AVBA0ES
U1B
LDO1IN20
LDO2EN4
LDO2IN19
VSELECT48
VSNVS222
LDO1OUT21
LDO2OUT18
VSNVS123
C822uF
TP57
J28 HDR1X2JUMPER[DEFAULT] = 1-2
12
TP75
C7822uF
R83 0
TP1GND
J30
HDR 1X3
JUMPER[DEFAULT] = 2-3
123
PPF7100AVBA0ES
U1A
SCL11
SDA10
VDDIO9
VDDOTP8
VIN27
INT37
PWRON34
RESET_MCU35
STANDBY33
V1P5A24
V1P5D28
SYNCOUT2
AG
ND
26
AMUX25
DG
ND
29
EP
AD
49
EWARN3
FSOB36
PGOOD38
TBBEN32 WDI
1
XINTB13
SYNCIN5
XFAILB17
C7422uF
R94 0
R89169K
J36
TB_1X2
SILK = SW3OUT
A1
B2
C182.2uF
C754.7UF
C6922uF
TP59
L4 1uH1 2
J7HDR 1X3
JUMPER[DEFAULT] = 1-2
SILK = VIN_PIN
123
TP21
LDO1OUT
R92
280K
L3 1uH1 2
C14470pF
C100.1uF
TP58
TP9
SYNCIN
R1031.5K
C161uF
TP80
XFAILB
TP25
V1P5A
J14
HDR 1X3
JUMPER[DEFAULT] = 2-3
123
R55SOLDER SHORT
J29 HDR1X2JUMPER[DEFAULT] = OPEN
12
R91
76.8K
R82 0
Q8
NX3008NBKW,115
1
23
Q4
NX3008NBKW,115
1
23
C131uF
J34
TB_1X2
SILK = SW1OUT
A1
B2
TP70
C151uF
TP23
VIN_PIN
TP73
BH1MTG1
R76 2.20K
SW11 2
R73 100K
C800.1uFDNP
D7
LED_GREEN
SILK = PWRON
A C
R81 100K
J35
TB_1X2
SILK = SW2OUT
A1
B2
D1
LED_GREEN
SILK = PGOOD
A C
TP8
SYNCOUT
TP26
VDDIO
BH2MTG1
C644.7UF
R69 100K
D3 CMDSH2-3A C
TP64
AMUX
TP81
TP12
RESETBMCU
J26
HDR 1X3
JUMPER[DEFAULT] = 2-3
123
R63 SOLDER SHORT
D4 CMDSH2-3A C
R95 0
TP53
WDI
R49 SOLDER SHORT
C6522uF
D2RED
SILK = FSOB
AC
J11 HDR1X2
JUMPER[DEFAULT] = 1-2SILK = LDO1IN
12
TP84
XINTB
C8222uF
C2100uFDNP
C7722uF
C660.1uFDNP
TP68
TP6
STANDBY
TP11GND
R78
1.5K
R97 0TP76
TP74
J20
HDR 1X3
JUMPER[DEFAULT] = 1-2
123
J31 HDR1X2
JUMPER[DEFAULT] = 1-2SILK = LDO2IN
12
TP10
INTB
C172.2uF
R90 100K
C714.7UF
J25
HDR 1X3
JUMPER[DEFAULT] = OPEN
123
C680.1uFDNP
L1 1uH1 2
L5 1uH1 2
TP16GND
J12HDR 1X3
JUMPER[DEFAULT] = 1-2: VREG=3V3JUMPER[OPTION] = 2-3: VERG=1V8
123
C7322uF
TP62
TBBEN
R88 0
C90 0.01ufDNP
J4
SKT BLACK
SILK = GND
12
TP24
LDO2EN
TP7
PWRON
J39 HDR1X2JUMPER[DEFAULT] = 1-2
12
J27
HDR 1X3
JUMPER[DEFAULT] = 2-3
123
U2
MIC5205
IN1
GND2
ADJ4
EN3
OUT5
R102470K<ASSY_OPT>
R66100K
J10
SKT RED
SILK = VIN
12
R74 2.20K
TP83
VSNVS2
TP65
VSELECT
R85
1.5K
R104470K
TP52
EWARN
R68100K
TP63
VDDOTP
R87470K
R65 1.5K
C794.7UF
C7022uF
PPF7100AVBA0ES
U1C
SW1FB31
SW1IN39
SW2FB30
SW2IN42
SW3FB7
SW3IN43
SW4FB6
SW4IN46
SW5FB12
SW5IN15
SW1LX40
SW2LX41
SW3LX44
SW4LX45
SW5LX16
NC_4747NC_1414
C634.7UF
L2 1uH1 2
R86 0
R72 0DNP
BH4MTG1
R70 100K
TP66
BH3MTG1
R67 100K
TP2
PGOOD
TP77
J15 HDR1X2
JUMPER[DEFAULT] = 1-2
12
R77 0
TP4
SDA1
R105470K
TP22
V1P5D
TP15
VSNVS1
R93 100K
R84 0
C624.7UF
Q1
NX3008NBKW,115
1
23
C8122uF
C1100uF
J22
HDR 1X3
JUMPER[DEFAULT] = 1-2
123
TP19
LDO2OUT
C760.1uFDNP
R75 100K
J21
HDR 1X3
JUMPER[DEFAULT] = OPEN
123
ADJ
SYNCIN
SCL1SDA1
TBBEN
XINTB
AMUX
FSOB
PGOOD
EWARN
PWRON
STANDBY
RESETBMCU
INTB
WDI
SYNCOUT
XFAILB
VSELECT
LDO2EN
SW1FBSW1OUTSW1INSW1LX
SW2OUT SW2FBSW2INSW2LX
SW3OUT SW3FBSW3INSW3LX
SW4OUT SW4FBSW4INSW4LX
SW5OUT SW5FBSW5INSW5LX
SW1LX
SW2LX
SW3LX
SW4LX
SW5LX
PGOOD
FSOB
PWRON
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
B2
(PTA2)(PTA1)
(PTA12)(PTD4)
(PTA4)
(PTC9)
(PTA5)(PTC8)
(PTE31)
(PTC17)
(PTC12)
Mates SSQ-110-23-G-D
(PTD7)
(PTA17)
(PTC16)
(PTD6)
(PTA16)
(PTC13)
(NC)
(PTD0)
(PTD1)
(PTA13)
(PTD2)
(VREF)(GND)
(PTE1)
(PTD5)
(PTD3)
(PTE0)
(PTE4)
(PTB11)
(PTB0)
(PTB3)
(PTE20)
(PTE23)
(PTE2)
(PTE5)
(PTB1)
(PTC2)
(PTE3)
(PTE21)
(PTE29)
(PTB8)
(PTB10)
Mates SSQ-106-23-G-D
(PTB2)
(PTC1)
(PTB9)
(PTE22)
(PTE30)
(PTC11)(PTC10)(PTC6)
(PTC7)
(PTC5)
(PTC0)
(PTC4)(PTC3)
����������VOLTAGE RANGE
VIN
AMUX 2/CH 7
AMUX 2/CH 4
AMUX 2/CH 1
AMUX 1/CH 6
AMUX 1/CH 3
0.4V to 1.8V, 2500mA
RESERVED
1.0V to 4.1V, 2500mA
LDO1
SW1
1.8V, 3.0V, 3.3V, 10mA
AMUX/CHANNEL
VSNVS1
AMUX 2/CH 8
AMUX 2/CH 5
AMUX 2/CH 2
AMUX 1/CH 7
AMUX 1/CH 4
AMUX 1/CH 1
0.4V to 1.8V, 2500mA
1.5V to 5V, 400mA
LDO2
SW2
RAIL
SW3
AMUX 2/CH 6
AMUX 2/CH 3
AMUX 1/CH 8
AMUX 1/CH 5
SW4
AMUX 1/CH 2
1.5V to 5V, 400mA
0.4V to 1.8V, 2500mA
SW5
0.4V to 1.8V, 2500mA
2.7V to 5.5V
RESERVED
0.8V, 0.9V, 1.8V, 10mA
RESERVED
VSNVS2
RESERVED
RESERVED
RESERVED
Mates SSQ-108-23-G-D
(P5-9V_VIN)
(SDA_PTD5)
(GND)
Mates SSQ-108-23-G-D
(5V)(GND)
(3V3)
(3V3)(RESET/PTA20)
SYNCOUT_SXINTB_S
NOTE: Use single 12 Row connector to connectSlave side from primary EVB to Master side of 2ndEVB. Resistors can be configured on primary boardfor specific configurations.
Master/Slave Connector
Populate the following connectors on the Freedom board (female with long pins, low insertion):SSQ-106-23-G-D / 210-80515SSQ-110-23-G-D / 210-80513SSQ-108-23-G-D (x2) / 210-80247
AMUX 1I2C Address: 0b10010000x48
AMUX 2I2C Address: 0b10010010x49
��� ���� � NOTE: Secondary AMUX is intended for Softwarepurposes. GUI can use this to enable livemonitoring instead of using AMUX on PF8100/8200AMUX uses the best of supply from P3V3 Freedomsupply and VIN.
SECONDARY AMUX
��������������
P3V3_FRDM
P5V_USB
P3V3_FRDM
VIN
VIN_AMUX
VIN_AMUX
VIN_AMUX
VIN_AMUX
VIN_AMUX
VIN_AMUX
VIN_AMUX2V5_ADC
VIN_AMUX
SCL13SDA13
INTB3WDI3
PGOOD3TBBEN3
EWARN3
PWRON3
STANDBY3
RESETBMCU3VSELECT3
LDO2EN3XINTB3
AMUX 3
XFAILB3
SW1OUT3SW2OUT3SW3OUT3SW4OUT3
VSNVS23
VIN_PIN3
VSNVS13
SW5OUT3
LDO1OUT3
LDO2OUT3
SYNCIN3SYNCOUT3
FSOB 3
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
KL25Z I/O, Connector, AMUX
4 5
___ X Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
KL25Z I/O, Connector, AMUX
4 5
___ X Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
KL25Z I/O, Connector, AMUX
4 5
___ X
R20 0
R31 0
R26 100K
-
+
U5AAD8606ARMZ-R7
3
21
R35 4.7K
J6
SKT_2X8
1 23 4
657 89 10
11 1213 1415 16
C881uF
R3 0
R11 0DNP
R19 0
J5
SKT_2X6
1 23 4
657 89 10
11 12
R6 0
R13 0
J2
CON_2X10
1234
6 57891011121314151617181920
R22 0
TP13
J1
SKT_2X8
1234
6 578910111213141516
R30 0
J3
HDR_2x12
1 23 4
657 89 10
11 1213 1415 1617 1819 2021 2223 24
R8 0
J33HDR1X2JUMPER[DEFAULT] = 1-2
12R17 100K
-
+V-
V+
U5BAD8606ARMZ-R7
5
67
48
R18 0
R34100K
R24 0
ADG715
U3
SCL1
SDA3
S15
S27
S39
S411
S514
S616
S718
S820
A122
RESET23
A024
D16
D28
D310
D412
D513
D615
D717
D819
VD
D2
GN
D4
VS
S21
R43100K
R29 0
D6 CMDSH2-3A C
R9 0
R32 100K
R4 0
C890.1uF R42 100K
R39100K
C860.1uF
R16 0
ADR3425ARJZ
U6
VOUT_SENSE5
VIN4
ENABLE3
VOUT_FORCE6
GND_SENSE2
GND_FORCE1
C850.1uF
R38 100K
R41100K
R21 0
R12 0
TP17
R40 100K
J32HDR1X2JUMPER[DEFAULT] = 1-2
12
R33 0
R27100K
ADG715
U4
SCL1
SDA3
S15
S27
S39
S411
S514
S616
S718
S820
A122
RESET23
A024
D16
D28
D310
D412
D513
D615
D717
D819
VD
D2
GN
D4
VS
S21
R7 0
R14 100K
C870.1uF
C830.1uF
R106 0DNP
R10 0DNP
R15 0
R23 0
R5 0
R28 0
R36 4.7K
D5 CMDSH2-3A C
R37100K
C840.1uF
R1 0
R2 0
R25 0
ADC_0ADC_12V5_ADC
MUX_RESETB
TBBEN2
SDA2SCL2
RESETBMCUINTB
XINTBWDIPWRONSTANDBYSCL1SDA1TBBEN
RESETBMCU_SINTB_SSYNCIN_S
WDI_SPWRON_SSTANDBY_SSCL_SSDA_STBBEN_SXFAILB_S
RESETBMCU PWRON_S
RESETBMCU_S
INTB INTB_S
SYNCIN_SSYNCOUT
XINTB INTB_S
WDI WDI_S
PWRON PWRON_S
STANDBY STANDBY_S
SCL1 SCL_S
SDA1 SDA_S
TBBEN2 TBBEN_S
XFAILB XFAILB_S
SCL2SDA2 MUX_RESETB
SCL2SDA2
VIN_PIN_HALFVSNVS1_HALF
SW5OUT_HALFLDO1OUT_HALFLDO2OUT_HALF
VIN_PIN_HALF
VSNVS1_HALF
SW5OUT_HALF
LDO1OUT_HALF
LDO2OUT_HALF
ADC_1ADC_0
MUX_RESETB
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
REF DES JUMPER[DEFAULT] JUMPER[OPTION] PAGE NAMEJ28,J7,J11,J31,J20,J39,J15,J22
1-2 03-PMIC
J27,J30,J14,J26 2-3 03-PMICJ29,J25,J21 OPEN 03-PMICJ12 1-2: VREG=3V3 2-3: VERG=1V8 03-PMICJ33,J32 1-2 04-KL25Z I/O, CONNECTOR, AMUX
REF DES ASSY_OPTPAGE NAMEC72,C91,C80,C66,C2,C68,C90,R102,R72,C76
DNP 03-PMIC
R11,R106,R10 DNP 04-KL25Z I/O, CONNECTOR, AMUX
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772 B2
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
APPENDIX JUMPER/DNP/SWITCH
5 5
___ X Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772 B2
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
APPENDIX JUMPER/DNP/SWITCH
5 5
___ X Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772 B2
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
APPENDIX JUMPER/DNP/SWITCH
5 5
___ X
