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Transcript of Jpl Iitb.pres1
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Physics and Transport Modeling in
Nanoscale MOS Devices
Jean-Pierre Leburton
Department of Electrical and Computer
Engineering and Beckman Institute
University of Illinois at Urbana-Champaign
Urbana, IL 61801, USA
J.P. Leburton, IWSG-2009, IITB, India
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Threshold Voltage: Channel Formation
Flat band conditionsM O S
VG-VFB
VB
Vox
Ec
Ei
Ev
Efs
Efm
2q!p
q!p
VT = VFB +VC +2!p +
1
Cox2"
0"sqNa (2!p +VC#VB )
tox
Depletion charge
Inversion potential
Channel potential
(non-equilibrium)
qVFB
Depletion
ee
e
e
After Y.Taur and T.H. Ning, FMVD, Cambridge, 2d ed.
J.P. Leburton, IWSG-2009, IITB, India
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MOSFET Operation Principles*
a)VG >V
T,V
D !0 b)VG >VT,VD V
T,V
D >V
GT
Pinch-off
VDS
IDS
(a)
(b) (c)
Charge control operation
ON
OFF
I-V Characteristic
IDSAT
After R.S. Muller and T.I Kamins, DEIC, Wiley, 2d ed.
J.P. Leburton, IWSG-2009, IITB, India
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Gradual Channel Approximation ( )VGT
!VDS
VG VD
VC
yLy0
VD
VC(y)
VG
COX COX COX COX
S D
V
VD+VTVC(y)+VTVS+VT
Qn(y)
Qn(y) =!Cox VG !VT!VC(y)[ ]
VDS
IDS
!(x,y): electrostatic potential!"
!y
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VG VD
S D
V
qFX qFX
Gate control:
many carriers
-low field
Gate control
lost: Few
carriers-high
field
IDS=qWn(y)v(y): constant
Pinch-Off and Saturation (VGT
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Sub-Threshold Conduction*
Normal conduction
Sub-threshold
conduction
(Diffusion)
*After R.S. Muller and T.I Kamins, DEIC, Wiley, 3d ed
e-
ns ! exp("q#B
kT)
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MOSFET Scaling (Constant field)*
Scaling assumptions Device dimensions (L, W, tOX,) 1/K
Doping concentration (Na,Nd) K
Voltage (except VT) 1/K
Derived scaling: Electric fields 1
Device parameters Carrier velocity 1 Depletion layer width (Wd) 1/K Capacitance (C="A/t) 1/K
Inversion layer charge density 1
Current, drift 1/K
Channel resistance 1
Derived scaling: Circuit delay time (#$CV/I) 1/K
Circuit parameters Power dissipation (P~VI) 1/K2 Power-delay product (P#) 1/K3
Circuit density (~1/A) K2
Power density (P/A) 1
Device and circuitparameters
Multiplicativefactor (K>1)
Wd =2!0!s"depl
qNa
Down scaling ofcircuit parameters
*After Y. Taur and T.H. Ning, Fundamentals of Modern VLSI Devices,Cambridge, 2d edition
J.P. Leburton, IWSG-2009, IITB, India
Not scalable: Materials (EG, , etc)
Temperature
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Modern CMOS
*After R.S. Muller and T.I Kamins, DEIC, Wiley, 3d ed.
CMOS Inverter circuit* Transfer characteristics*
J.P. Leburton, IWSG-2009, IITB, India
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Short Channel Effects
Channel-length modulation
IDSAT
=
W
2LC
ox(V
G! V
T)
2
L
S D
VG
%L
IDSAT
'=
W
2(L ! "L(VG))C
ox(V
G !V
T)
2> I
DSAT
VDS
IDS
VGT
Pinch-off
Beyond
pinch-off
Pinch-off
Beyond
pinch-off
J.P. Leburton, IWSG-2009, IITB, India
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Velocity Saturation (Si-Devices)
F
vd
(1)
(2) (3)
f(v)
v0
F1
2
3
4
(4)
kBT
c
vd1 vd2 vd3=vd4
Line
ar
Sub-linear Saturation
Carrier heating:
collisions
Carrier drift
Fc
vd =
vsatF
F+ Fc
= vsat
/ Fc
vsat
!107cm / s
Consequence for MOS Devices
IDS
=
W
LC
ox (V
G! V
T)V
DS! V
DS
2/ 2"# $%
IDS
=W
L + (VDS / Fc )C
ox (V
G! V
T)V
DS! V
DS
2/ 2"
# $
%
Velocity saturation
induced current reduction
*After R.S. Muller and T.I Kamins, DEIC, Wiley 3d ed.J.P. Leburton, IWSG-2009, IITB, India
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Gate-Induced Mobility Degradation
VG VD
n+ n+
VS
p-Si
Interface
roughness
Interface
charge
eFX
Feff =!
1
"0"s
(Qd+Q
n
2)
eff =
0
1+ (Feff /F0 )#
with0,F
0 and# fitting parameters
eff =0
1+!(VG"VT) For simulation purpose
Feff
R.S. Muller and T.I Kamins, DEIC, Wiley, 3d ed.
J.P. Leburton, IWSG-2009, IITB, India
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Drain-Induced Barrier Lowering (DIBL)*
e
VT-shift with VD
*After Y.Taur and T.H. Ning, FMVD, Cambridge, 2d ed.J.P. Leburton, IWSG-2009, IITB, India
Tunneling
Thermionic emission
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Source-Drain Charge Sharing Effect:
VT (Gate coupling)-Reduction*
tox
*After R.S. Muller and T.I Kamins, DEIC, Wiley, 3d ed.
J.P. Leburton, IWSG-2009, IITB, India
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Deep Nanoscale Devices
vdr
x or t
vsat
Oxide leakage
Quantum ChargeDopant granularityVelocity Overshoot
J.P. Leburton, IWSG-2009, IITB, India
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Velocity Overshoot (Transient)
Fx
t(or x)
v
vx
Fx
1
2
3
4
6
5
Increasing scattering rates
with carrier energy
vsat
n+ n+
t or xtmax/ xmax
L= xmax
In III-V Compnds : tmax~1ps =>xmax~100nm
vmax~ 4-5x107cm/s
In Si: tmax~0.1ps=>xmax~10-20nm
vmax~2x107cm/s
High speed-high current!!
K. Hess, ATSD, Wiley, 2000
J.P. Leburton, IWSG-2009, IITB, India
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Depletion and Quantum Capacitance:
Gate Coupling ReductionPoly-Si gate*
(All-Si&self-alignment)Quantized inversion
layer
C-V curve*
CPoly
Cox
Cinv
1
Cg=
1
Cpoly+
1
Cox+
1
Cinv
! Cg
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Dopant Granularity: VT-Fluctuations*
*U. Kovac et al., Microelectronic Reliability 48, 1572 (2008)J.P. Leburton, IWSG-2009, IITB, India
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tox-Scaling => High-K Dielectrics*
But
Cox
=
!0!
ox
tox
tox
Tunneling-induced dissipation
High-K dielectrics Cox =!0!SiO
2
tSiO2
=
!0!high"K
thigh"K
thigh!K =("high!K / "SiO2 )tSiO2 >>tSiO2 Reduces Tunneling
*P. Zeitzoff and H.Huff, 2005 ICCMUT,
Dallas, TX
J.P. Leburton, IWSG-2009, IITB, India
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High-K Dielectric Phonons
High-K: Large!=> large polarization
!
P
e
+ +
+++
+
+
++
+
Polar Optic Phonons
+ + + +-- - -
U(t): ion displacement
!"!#SO
1
$ox
% & 1
$ox
0
'() *
+," P
2
Interaction strength(Frohlich)
Electronic
contribution (fast)
Ionic contribution
(slow)
M. Fischetti et al., JAP 90, 4587 (2001)
!
P =!
Pionic
+
!
Pelectronic
Me/Si-O bond!E
G
"n(direct)
negligible in
insulators
(large EG)
Si-O bond: strong--> hard phonons
Me-O bond: weaker-->soft phonons
Electron-phonon interactionHigh energyLow !0
Low energyLarge !0
J.P. Leburton, IWSG-2009, IITB, India
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High-K Dielectric Remote Phonons
(High-K)
(Si)
Interaction between electron in Si and
remote phonons in High-K dielectric !!!!
!" !#SO
1
$ox
%+ $
Si
%&
1
$ox
0+ $
Sio
0
'
()
*
+,
Interaction strength
(image charge)
K. Hess, ATSD, Wiley, 2000
Q. Wang &G.D. Mahan, PRB 6, 4517 (1972)
*M. Fischetti et al., JAP 90, 4587 (2001)
+++
+ +
+ + +
+
__
_
_
__
_
_
_
Plasmon-RIP coupling*Remote Interface Phonons
Si-substrate
Metal gate
n-channel
tox
weak strong
J.P. Leburton, IWSG-2009, IITB, India
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High-K Dielectric Remote Phonon Scattering
Strong RIP
scattering
(ZrO2&HfO2)
Weak (bare or
plasmon screened)
RIP scattering
J.P. Leburton, IWSG-2009, IITB, India
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RIP-Limited Channel Mobility:SiO2 vs. HfO2*Simulated Theory vs Experiment
Ns-dependence
T-dependence
Weaker T-dependence
for Hf-based
insulators
coulombscattering
neglected in
the model
Goodagreement
at high Ns
J.P. Leburton, IWSG-2009, IITB, India
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Alternative (Future) MOSFET Structures*
* After K. Imai, Proc. Of SPICE vol. 7028
Depleted devices for - Reduction of VT-fluctuations
- Ballistic transport
+ III-V on Si for high mobility
J.P. Leburton, IWSG-2009, IITB, India
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Confined Phonons in Quantum Wires*
Carrier confinement, but alsoCarrier confinement, but also
phonon confinementphonon confinement"
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