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Icarus Verilog Installation and Usage Manual

CS623: CAD for VLSI Design

Dept. of Computer Science and Engineering

Indian Institute of Technology

Document prepared by:

Noor Mahammad Sk

Reconfigurable and Intelligent Systems Engineering Group

Department of Computer Science and Engineering,

Indian Institute of Technology Madras, Chennai - 600036

Email: noorse@cse.iitm.ernet.in

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Icarus Verilog Installation and Usage Manual

Contents

1 Introduction 3

2 Features of iverilog v8.3 3

3 Building/Installing Icarus Verilog From Source 3

3.1 Compile Time Prerequisites . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

3.2 Building source and Installation Procedure . . . . . . . . . . . . . . . . . . . . . . 4

3.2.1 Linux 32bit Machines . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3.2.2 Special AMD64 Instructions . . . . . . . . . . . . . . . . . . . . . . . . . 53.3 Icarus Verilog Installation using RPMs . . . . . . . . . . . . . . . . . . . . . . . . 6

3.4 Compilation and Execution of a verilog file using iverilog . . . . . . . . . . . . . . 6

4 Icarus Verilog for Windows 7

4.1 How to Compile Verilog file on Windows . . . . . . . . . . . . . . . . . . . . . . 7

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1 Introduction

The main aim of this document is to give some of the important and necessary steps in installation

of Icarus Verilog (iverilog) simulator in different environments and how to simulate the given

verilog program. iverilog is the simulation tool that is used for compilation and simulation.

This tools is a free down-loadable software available at following web link.

ftp://ftp.icarus.com/pub/eda/verilog/v0.8

In this page you will find the latest version of both verilog source and rpms. Download the latest

version of verilog source or rpm.

This document will give the detailed installation procedure of iverilog using the source and rpm in

a typical Linux and windows environment.

2 Features of iverilog v8.3

Icarus Verilog is intended to compile ALL of the Verilog HDL as described in the IEEE-1364

standard. Of course, its not quite there yet. It does currently handle a mix of structural and

behavioral constructs. For a view of the current state of Icarus Verilog, see its home page at

http://www.icarus.com/eda/verilog.

Icarus Verilog is not aimed at being a simulator in the traditional sense, but a compiler that

generates code employed by back-end tools. These back-end tools currently include a simulator

engine called VVP, an XNF (Xilinx Netlist Format) generator and an EDIF FPGA netlist generator.

In the future, backends are expected for EDIF/LPM, structural Verilog, VHDL, etc.

3 Building/Installing Icarus Verilog From Source

If you are starting from source, the build process is designed to be as simple as practical. Someone

basically familiar with the target system and C/C++ compilation should be able to build the source

distribution with little effort. Some actual programming skills are not required, but helpful in case

of problems.

3.1 Compile Time Prerequisites

You need the following software to compile Icarus Verilog from source on a UNIX-like system:

- GNU Make

The Makefiles use some GNU extensions, so a basic POSIX

make will not work. Linux systems typically come with a

satisfactory make. BSD based systems (i.e., NetBSD, FreeBSD)

typically have GNU make as the gmake program.

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- ISO C++ Compiler

The ivl and ivlpp programs are written in C++ and make use

of templates and some of the standard C++ library. egcs and

recent gcc compilers with the associated libstdc++ are known

to work. MSVC++ 5 and 6 are known to definitely *not* work.

- bison and flex

- gperf 2.7

The lexical analyzer doesnt recognize keywords directly,

but instead matches symbols and looks them up in a hash

table in order to get the proper lexical code. The gperf

program generates the lookup table.

A version problem with this program is the most common cause

of difficulty. See the Icarus Verilog FAQ.

- readline 4.2

On Linux systems, this usually means the readline-devel

rpm. In any case, it is the development headers of readline

that are needed.

- termcap

The readline library in turn uses termcap.

If you are building from CVS, you will also need software to generate the configure scripts.

- autoconf 2.53

This generates configure scripts from configure.in. The 2.53

or later versions are known to work, autoconf 2.13 is

reported to *not* work.

3.2 Building source and Installation Procedure

3.2.1 Linux 32bit Machines

The installation procedure for linux 32 bit environment. Login as a root and follow the following

four steps to build and install iverilog from source.

1. Unpack the tar ball, using the following command

[root-]$ tar -zxvf verilog-0.8.3.tar.gz

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2. Change directory to the verilog-0.8.3 directory

[root-]$ cd verilog-0.8.3

3. Compile the source with the following commands

[root-]$ ./configure

[root-]$ make

4. Install using following command

[root-]$ make install

Normally, this command automatically figures out everything it needs to know. It generally workspretty well. There are a few flags to the configure script that modify its behavior:

--without-ipal

This turns off support for Icarus PAL, whether ipal

libraries are installed or not.

--prefix=

The default is /usr/local, which causes the tool suite to

be compiled for install in /usr/local/bin,

/usr/local/share/ivl, etc.

I recommend that if you are configuring for precompiled

binaries, use --prefix=/usr. On Solaris systems, it is

common to use --prefix=/opt. You can configure for a non-root

install with --prefix=$HOME.

--enable-vvp32 (experimental)

If compiling on AMD64 systems, this enables the

compilation of 32bit compatible vvp (vvp32) and the vpi

modules that match.

3.2.2 Special AMD64 Instructions

The Icarus Verilog RPM for x86 64 is build using these instructions.

If you are building for Linux/AMD64 (a.k.a x86 64) then to get the most out of your install, first

make sure you have both 64bit and 32bit development libraries installed. Then configure with this

somewhat more complex command:

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./configure libdir64=$(prefix)/lib64 vpidir1=vpi64 vpidir2=. --enable-vvp32

This reflects the convention on AMD64 systems that 64bit libraries go into lib64 directories.

The enable-vvp32 also turns on 32bit compatibility files. A 32bit version of vvp (vvp32) will be

created, as well as 32bit versions of the development libraries and bundled VPI libraries.

3.3 Icarus Verilog Installation using RPMs

Copy the latest version of Icarus Verilog rpm to your system root. Use the following guidelines for

installation using rpms.

If the rpm is binary rpm then use following command for installation.

[root-]$ rpm -i verilog-0.8.3-0.i386.rpm

Installation from source rpm.

[root-]$ rpm -i verilog-0.8.3-0.src.rpm

On a RedHat System, this installs the source files and the SPEC files in /usr/src/redhat directory.

Now build and install using the following commands.

[root-]$ rpmbuild -ibb /usr/src/redhat/SPECS/verilog.spec \\

[root-]$ rpm -i /usr/src/redhat/RPMS/i386/verilog-0.8.3-0.i386.rpm

The above commands will install iverilog on your system.

3.4 Compilation and Execution of a verilog file using iverilog

The compilation and execution of a verilog file using the iverilog can be done using the following

commands in Linux console.

1. Compilation of a verilog file

[user]$ iverilog filename.v

The above command will generate a.out file.

2. Execution can be done using following command.

[user]$ ./a.out

A hierarchy of files is compiled by compiling the testbench or the top-level code.

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4 Icarus Verilog for Windows

Icarus verilog for windows is available at the following link:

http://bleyer.org/icarus/

Icarus Verilog for windows is a free compiler implementation for the IEEE-1364 Verilog

hardware description language. In this page you will find easy to install Icarus Verilog packages

compiled with the MinGW toolchain for the Windows environment.

Download the latest version of verilog setup file (iverilog-0.8.2 setup.exe [1.43MB]) to your

machine. Login as an administrator and double click on the iverilog-0.8.2 setup.exe file. It will

install the iverilog with an interactive mode. Once installation is completed, type the installed path

for example.

c:\IcarusVerilog\bin\iverilog

On your command prompt. This will give the iverilog compilation options.

4.1 How to Compile Verilog file on Windows

By a text editor edit the your verilog program and save it as filename.vl. Next, compile this

program with following command.

iverilog -o filename filename.vl

The results of this compile are placed into the file filename, as the -o flag tells the compiler

where to place the compiled result. Next, execute the compiled program using following command.

vvp filename

The vvp target generates code for the vvp runtime. The output is complete program that

simulates the design but must be run by the vvp command.

Other way of compilation is iverilogfilename.v and this will generate the a.out executable file.

For execution use the command ./a.out.

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