Isolated Zeta Converter: Principle of Operation and · PDF fileIsolated Zeta Converter:...

Isolated Zeta Converter: Principle of Operation and Design in Continuous Conduction Mode

PIJIT KOCHCHA, SARAWUT SUJITJORN*

School of Electrical Engineering, Institute of Engineering Suranaree University of Technology

111 University Avenue, Muang District, Nakhon Ratchasima, 30000 THAILAND

[email protected] *corresponding author: [email protected]

Abstract: - The principle of operation of the zeta converter is explained in the article. Small-signal and

steady-state models of the converter are presented. The design formulas for the continuous conduction mode (CCM) are given together with some design examples and simulation results. The power factor and harmonic issues are also addressed. Key-Words: - zeta converter, continuous conduction mode (CCM), harmonic, power factor.

1 Introduction Vast majority of power converters used nowadays employ front-end diode bridge rectifiers. Such rectifiers draw pulsating currents which leave behind a great amount of harmonics, and considerably low power factor. For a single converter of this type used with a single-phase load such as in a consumer electronic equipment, the problems may not seem serious. However, a great number of those equipments in parallel connection at a point of common coupling (PCC) to draw power simultaneously introduce some serious effects concerning reactive power and harmonic. The situations are quite common in offices and industries. Several types of AC-DC converters have been introduced to achieve the demanded power conversion, and the less problems on harmonic and power factor [1]. To name a few, these include the Cuk converter [2], the Sepic converter [3]-[6], the combined boost with double winding flyback converter [7], and the zeta converter [8]-[13]. Among those, the zeta converter, which is originally the buck-boost type, can be regarded as a flyback type when an isolated transformer is incorporated. An isolated zeta converter has some advantages including safety at the output side, and flexibility for output adjustment [14]-[16]. This article describes the operation principle of the isolated zeta converter in the CCM in Section 2.

Section 3 presents an overview of the state-space averaging technique, while the transfer function model can be found in Section 4. Section 5 presents the steady-state time-domain model in CCM. Section 6 provides design examples, simulation results with discussions. The harmonic, and power factor issues are also discussed. Conclusion follows in Section 7.

2 Principle of Operation Fig.1(a) depicts the circuit diagrams of the isolated zeta converter such that its operation principle in the CCM could be readily explained. Fig.1(b) represents the 1st region of operation in which the switch S is “on”, and the diode D is “off”. This region takes the time from 0 to d1Ts seconds. The inductor Lm stores the energy received from the rectifier. The capacitor C1 supplies energy to the load (R) via the inductor Lo, and the capacitor Co. the currents through the inductors Lm and Lo increase linearly, while no current flows through the diode. Fig.1(c) represents the 2nd operation region in which the switch S is “off”, and the diode D is “on”. This region begins at the time d1Ts seconds, and ends by d2Ts seconds. The diode D is forward biased due to the voltage across the inductor Lm has reversed polarity, while the currents iLm and iLo decrease linearly. The stored energy in the inductor Lm is transferred to the capacitor C1. The load R

WSEAS TRANSACTIONS on CIRCUITS and SYSTEMS Pijit Kochcha, Sarawut Sujitjorn

ISSN: 1109-2734 483 Issue 7, Volume 9, July 2010

sv

si

gi

gv

+

−

1:n

R oV

+

−mLi

pi 1Ci

Di

oLi

oCi

oi

sv

si

gi

gv

+

−

1:n

R oV

+

−mLi

pi 1Ci

Di

oLi

oCi

oi

sv

si

gi

gv

+

−

mLv

+

−mL

1:n 1C

1Cv− +

oL

oLv+ −oC oCv

+

−

R oV

+

−

S

(a) an isolated zeta converter

(b) region 1 of operation (c) region 2 of operation

Fig.1 Circuit diagrams of the isolated zeta converter.

Lmi

Loi

S

ON OFF

g

m

V

L1C

m

v

nL−Lmi∆

1g C o

o

nv v v

L

+ −o

o

v

L−Loi∆

t

t

t

S

ON OFFt

1 sd T 2 sd TsT

1Ci

1g C o

o

nv v v

L

+ −−

12C

m

v

n L−

t

Coi

t

1g C o

o

nv v v

L

+ − o

o

v

L−

t

Lmv gv

1Cv

n

t

Lov1g C onv v v+ −

ovgi

( )1g C og

m o

n nv v vv

L L

+ −+

t

1 sd T 2 sd TsT

Di

t

12C o

m o

v v

n L L− −

Fig.2 Current and voltage waveforms.



receives energy from the inductor Lo. Hence, the current iD=iC1+iLo. Fig.2 illustrates the steady-state current and voltage waveforms in one switching cycle. These curves will be referred to for the development of the design formulas.

3 Overview of The State-Space Averaging Technique Considering the operation of the converter during the on- and off-time intervals denoted as ont or

1 sd T ,

and offt or ( )11 Sd T− , respectively, the state

equations in one switching cycle can be written as

s s

s

x A x B u

y C x

= +

=

ɺ

(1)

, where

( ) ( )( )

1 1 2 1 1 1 2 1

1 1 2 1

[ 1 ], [ 1 ],

1 .

s s

s

A A d A d B B d B d

C C d C d

= + − = + −

= + −

Linearization can be made to the above equations by considering small-signal perturbations such that x X x= + ɶ , y Y y= + ɶ , 1 1 1d D d= + ɶ , u U u= + ɶ

where X x>> ɶ , Y y>> ɶ , U u>> ɶ and 1 1D d>> ɶ be substituted into Eq. (1). Under the steady-state condition of the state variables, one may write the following equations

0av av

av

X A X B U

Y C X

= + =

= (2)

, and

( ) ( )( )

1 2 1 2

1 2

av av

av

x A x A A X B B U d B u

y C x C C X d

= + + + + +

= + −

ɶɺɺ ɶ ɶ

ɶɶ ɶ

(3)

, where

( ) ( )( )

1 1 2 1 1 1 2 1

1 1 2 1

1 , 1 ,

1 .

av av

av

A A D A D B B D B D

C C D C D

= + − = + −

= + −

From Eq. (2), Eq. (4) below are obvious.

1

1 .

av av

av av av

X A B U

YC A B

U

−

−

= −

= − (4)

Under small-signal assumption, taking the Laplace

transform to Eq. (3) results in

( ) [ ] ( )

( ) ( )

( ) ( ) ( ) ( )

1

1 2 1 2 1

1 2

+ ( )

av av g

g

av

x s sI A B v s

A A X B B V d s

y s C x s C C X d s

−= −

− + −

= + −

ɺ ɶ

ɶ

ɶɶ ɶ

(5).

Finally, one can obtain the following transfer functions: for 0gnv =ɶ

( )( )

[ ] ( ) ( )

( )

1

1 2 1 2

1

1 2

av av g

y sC sI A A A X B B V

d s

C C X

− = − − + −

+ −

ɶ

ɶ (6)

, and for 1 0d =ɶ

( )( )

[ ] 1

av av avg

y sC sI A B

v s

−= −

ɶ

ɶ (7).

4 Transfer Function Models Referring to the circuit in Fig. 1(a), the parameters transferred from the secondary onto the primary side are

2 2 2

1 1

2

, , , ,

.

o o o o o ov v n L L n C n C C n C

R R n

′ ′ ′ ′= = = =

′ =

According to the operation in one switching cycle, the circuit equations can be written as

( ) ( ) ( )

( ) ( ) ( )

( )( ) ( )

( )

11 1

2 22

11 1

11 12 2

1 1

2

1

1

.

gLm C

m m

gLo C Co

o o o

C Lo Lm

Co Lo Co

o o

o Co

vVdi td d

dt L L

n v n vn Vdi td d

dt L L L

dv t i id d

dt n C n C

dv t vi

dt n C RC

v v

′

′ ′ ′

′ ′

′ ′′

′

= − −

= + −

= − + −

= −

′ =

(8)



Let the state, input and output vectors be represented by

1 , ,T

Lm Lo C o g ox i i v v u v y v′ ′ ′ ′ ′ = = =

,

the coefficient matrices of the state-variable models can be obtained as

( )

( )

1

2 21

1 12 2

1 1

2

10 0 0

0 0

10 0

1 10 0

m

o oav

o o

D

L

n D n

L LA

D D

n C n C

n C RC

− −

− = − − −

(9)

2

1 1 0 0T

avm o

D n DB

L L

=

(10)

[ ]0 0 0 1avC = (11).

By substituting Eqs. (9)-(11) into Eq. (4), the following steady-state relations can be obtained

( )

( )

( )

( )

( )

2 21

2

1

21

1

11

1

1

1

1

1

1

1

1

1

1

Lm

Lo

gC

o

o

g

n D

R DI n DI R D

VV D

DV

D

D

V D

V D

′

′

− − =

′ − −

′=

−

(12).

The small-signal models as shown in Eqs. (13)-(14) can be obtained from substituting Eqs. (9)-(11) into Eq. (5).

( )

( )

1

2 21

11 112 2

1 1

2

1

21

10 0 0

0 0

10 0

1 10 0

0 0

0

0

m

Lm Lm

Loo oLo

CC

oo

o o

m

go

D

L

i in D n

iL LivD Dvvn C n Cv

n C RC

D

L

n Dv

L

′′

′′

− −

− = − −

′ ′ −

−

+ +

ɺɶ ɶ

ɶɺɶ

ɶɺɶ

ɶɺɶ

ɶ

1

21

1

1 12 2

1 1

0

0 0 0

0 0

0 0 0 0

mLm

Lo

oC

o

d

LI

n d IL V

d dV

n C n C

′

′

′−

ɶ

ɶ

ɶ ɶ

2

1

0

0

g

m

g

o

V

L

n Vd

L

+

ɶ (13)

[ ]1

0 0 0 1

Lm

Loo

C

o

i

iv

v

v

′

′

′ = ′

ɶ

ɶɺɶ

ɶ

ɶ

(14).

The transfer function models of the isolated zeta converter can be derived from the above Eqs. (13)-(14), and obtained as

( )( )1

( )ovd

v sG s

d s

′=ɶ

ɶ

( )

2

2 4 3 2

1

1

1vd vd vda s b s c

as bs cs ds eD

+ +=

+ + + +− (15)

( )( )( )o

vvg

v sG s

v s

′=ɶ

ɶ

( )

2

2 4 3 2

1

1

1vv vva s b

as bs cs ds eD

+=

+ + + +− (16)



, where

( )

( )

2 2 21 1 1

2

1

1 , ,

1

vd m g vd m g

vd g

a n RL C V D b n D L V

c RV D

= − = −

= −

( )21 1 1 1, 1vv m vva n D RL C b D D R= = −

( )

( ) ( )

2 21 1

2 2 2 21 1 1

2 221 1 1

,

1

1 , 1 .

m o o m o

o o m o m

o m

a n RL L C C b n L L C

c RL C D n D RL C n RL C

d L D n D L e R D

= =

= − + +

= − + = −

5 Steady-State Models

Referring to the waveforms in Fig. 2 and the analysis principle presented in [17], the steady-state models of the isolated zeta converter in CCM can be developed as follows.

The turn-on and turn-off times (ton and toff) can be expressed as

1m Lm o Lo

on sg g

L i L it d T

V nV

∆ ∆= = = (17)

( )11

1 m Lm o Looff s

C o

nL i L it d T

V V

∆ ∆= − = = (18).

Since the voltage ( )1 1 11C g oV nV d d V= − = , one

can obtain the voltage gain

( )1

11o

g

V ndM

V d= =

− (19)

, and the duty cycle

1

Md

n M=

+ (20).

Due to the fact that

1s on off

s

T t tf

= = + , and from

Eqs. (17)-(19), one may derive the current ripple terms obtained as

( )1 1

1

g C gLm

s ms m C g

V V V di

f Lf L V nV∆ = =

+ (21)

( )1g o g

Los os o o g

nV V nV di

f Lf L V nV∆ = =

+ (22).

sT2sT

Q∆Coi

t2

∆ Coi ∆ Coi

Fig. 3 The current Coi waveform.

The voltage ripple 1CV∆ can be expressed as

1 1 1

1 10 01 1 1

1 1s sd T d To s

C C o

i d TV i dt i dt

C C C∆ = = =∫ ∫ (23).

From Eq. (23) and oVi

R= , one can obtain

11

1

o

s C

V dC

f R V=

∆ (24).

Referring to the waveforms of Coi and Loi in Figs.

(2)-(3), and the fact that Co oV Q C∆ = ∆ , one may

derive

( )1

2

1

8o

os o Co

V dC

f L V

−=

∆ (25).

6 Design Examples

Designing the isolated zeta converter in the CCM requires the knowledge of critical inductances denoted as mcL and ocL .

Based on the assumptions of lossless and the average load current being equal to the average current in oL , the terms ocL and mcL can be found

as follows:

1(1 )

2oc

s

d RL

f

−= (26)

2

12

1

(1 )

2mcs

d RL

n f d

−= (27)

The design criteria are that o ocL L≥ , m mcL L≥ ,

11

1

o

s C

V dC

f R V≥

∆, and

( )12

1

8o

os o Co

V dC

f L V

−≥

∆to achieve



% 1%γ ≤ and 1 2 3C Co oV V Vγ∆ = ∆ = . The formulas

dignify the smallest components possible. In practice, the output qualities must be considered for a proper component sizing.

Let us consider the requirement that the converter produces the average output voltage of 105 Vdc, and the current of 2.1 Adc from the ac input of 311 Vpk, 50 Hz. The first step is to calculate the gain

105 311 0.3376o gM V V= = = , the duty cycle

d1=0.6280, and the turns ratio n. Then select the switching frequency fs. The expressions (26) and (27) are used next to obtain the inductances oL and

mL as follows:

13

(1 ) (1 0.6280)(50)

2 2(50 10 )

186

os

d RL

f

Hµ

− −≥ =

×

=

( ) ( )( ) ( )( )

221

22 31

1 0.6280 50(1 )

2 2 0.2 50 10 0.6280

2.75 .

ms

d RL

n f d

mH

−−≥ =

×

=

Thus, the chosen inductances are oL =200 Hµ ,

and mL =3 .mH

The capacitances oC and 1C are calculated according to Eqs. (24) and (25), and obtained as

( ) ( )( )

( ) ( )( )1

22 3 6

1 105 1 0.6280

8 8 50 10 200 10 1.82

5.36

oo

s o Co

V dC

f L V

Fµ

−

− −≥ =

∆ × ×

=

( )( )

( )( )( )1

1 31

105 0.6280

50 10 50 1.82

14.49

o

s C

V dC

f R V

Fµ

≥ =∆ ×

=

The design results are summarized by Table 1.

Table 1 Design results (converter with an R load).

Parameters Values

peak input voltage (Vg) 311 V 50 Hz

avg. output voltage (Vo) 105 V

avg. output current (Io) 2.1 A

switching frequency (fs) 50 kHz

Lm , Lo 3 mH, 200 uH

C1 , Co 20 uF, 1.41 mF

turns ratio

of hf transformer (n) 0.2

duty cycle (d1) 0.6280

M 0.3376

(a) source voltage and current waveforms

(b) output voltage and current waveforms

Fig. 4 Simulation results (R load, without LC filter).



The simulation results using PSIM are illustrated in Fig. 4. Very large transient voltage can be observed, and later suppressed by an LC filter. The average output voltage and current are 105.48 Vdc , and 2.11 Adc, respectively. A high current harmonic of 123.53 % THDi, and a low power factor of 0.6270 (lagging) are observed at the PCC.

sv

mL

1:n 1CoL

oC R oV

+

−fC

fL

(a) zeta converter with the LC-filter

(b) source voltage and current waveforms

(c) output voltage and current waveforms

Fig. 5 Simulation results (R load, with LC filter).

An LC filter designed by a conventional method (L f = 100 mH, Cf = 137 nF) is incorporated into the converter as shown by the diagram in Fig. 5(a). Figs

5(b)-(c) show the simulation results indicating that the output transient peaks are well suppressed, and the outputs become steady in a short time. The average outputs of 105.35 Vdc , and 2.11 Adc are obtained. At PCC, the current harmonic distortion is reduced to 30.81 % THDi, and the power factor is as high as 0.9096 (lagging).

Let’s consider another design example where the load of the converter is a series RL. This can be a good representation of a motor load in steady-state operation. The zeta converter has 220V (311 peak voltage), 50Hz supply. Its load is assumed to be 23.7 mH series with an R, 800W, 11A rated. Firstly, the equivalent load resistance, and the average output voltage can be calculated as 2

o oP I = 800/112

= 6.6116 Ω, and o oP I = 800/11 = 72.73 Vdc,

respectively. The voltage gain and the duty cycle are 72.73 311 0.2339o gM V V= = = , and 1d = 0.5391,

respectively. The expressions (26) and (27) are used next to obtain the inductances oL and mL as

follows:

13

(1 ) (1 0.5391)(6.6116)

2 2(50 10 )

30.47

os

d RL

f

Hµ

− −≥ =

×

=

( ) ( )( ) ( )( )

221

22 31

1 0.5391 6.6116(1 )

2 2 0.2 50 10 0.5391

651.31 .

ms

d RL

n f d

Hµ

−−≥ =

×

=

Thus, the chosen inductances are oL = 40 Hµ ,

and mL =700 .Hµ

The capacitances oC and 1C are calculated according to Eqs. (24) and (25), and obtained as

( ) ( )( )

( ) ( )( )1

22 3 6

1 72.73 1 0.5391

8 8 50 10 40 10 1.26

43.66

oo

s o Co

V dC

f L V

Fµ

−

− −≥ =

∆ × ×

=

( )( )( )( )( )

11 3

1

72.73 0.5391

50 10 6.6116 1.26

94.14

o

s C

V dC

f R V

Fµ

≥ =∆ ×

=

Table 2 summarizes the case.



Table 2 Design results (converter with an RL load).

Parameters Values

peak input voltage (Vg) 311 V 50 Hz

avg. output voltage (Vo) 72.73 V

avg. output current (Io) 11 A

switching frequency (fs) 50 kHz

Lm , Lo 700 uH, 40 uH

C1 , Co 100 uF, 4.4 mF

turns ratio

of hf transformer (n) 0.2

duty cycle (d1) 0.5391

M 0.2339



Fig. 7 Simulation results (RL load, without LC filter).

The voltage and current waveforms obtained from PSIM are illustrated in Fig. 7. With the assumed RL load, the average output voltage and current of the converter are 72.83 Vdc, and 10.93 Adc, respectively, according to the expectation. Without a filter, the current harmonic is as high as 143%, and the power factor is 0.5844 (lagging). An LC filter having fL = 50 mH and fC = 137 nF is

added to the input frontend. The duty cycle is also increased to 0.5861 to compensate for the associated voltage drop. The simulation results indicate that the average output voltage is 72.34 Vdc, the average output current is 10.86 Adc, with 28.83 %THDi and power factor of 0.8842 (lagging). It is observed that the LC filter significantly decreases the pulsation of the source current, in turn drastically reduces the harmonic distortion, and increases the power factor of the circuit.



Fig. 8 Simulation results (RL load, with LC filter).



7 Conclusion This paper has explained the principle of operation of the zeta converter with the design formulas for the continuous current mode (CCM) of operation. It also presents the development of the state-variable, and the transfer function models of the isolated zeta converter. Two design examples are given for the cases of R, and series RL loads. Detailed simulation results are presented, and the following conclusions are drawn: (i) the output voltage and current contain a considerable amount of ripples which have to be limited in practice, (ii) the converter without an input filter produces a great deal of current harmonic, and possesses a low power factor, and (iii) a simple LC input-filter can be used at first sight to reduce the harmonic, and to increase the power factor. The issues concerning the discontinuous current mode (DCM), the control of the output power, the power factor correction, and the harmonic reduction are under investigations.

Acknowledgements The authors are thankful to the Mechatronics Program-SUT for financial supports of the project. The first author’s thank is due to SUT for the doctoral scholarship.

References [1] B. Singh, B.N. Singh, A. Chandra, K. Al-

Haddad, A. Pandey, and D.P. Kothari, “A review of single-phase improved power quality AC-DC converters,” IEEE Trans. Industrial Electronics, vol.50, pp.962-981, 2003.

[2] C. Wu, “Evaluation and implementation of the optimum magnetics design of the Cuk converter in comparison to the conventional buck-boost converter,” IEEE Trans. Magnetics, vol.18, pp.1728-1730, 1982.

[3] J.J. Jozwik, and M.K. Kazimierczuk, “Dual sepic PWM switching-mode DC/DC power converter,” IEEE Trans. Industrial Electronics, vol.36, pp.64-70, 1986.

[4] D.C. Martins, and A.H. de Oliveira, “Isolated three-phase rectifier using a Sepic DC-DC converter in continuous conduction mode for power factor correction,” WSEAS Trans. Circuits, vol. 2, no. 1, pp. 13-19, 2003.

[5] E. Niculescu, D-M. Purcaru, and M.C. Niculescu, “A steady-state analysis of PWM Sepic converter,” 10th WSEAS International Conference on Circuits, pp. 217-222, 2006.

[6] E. Niculescu, M.C. Niculescu, and D-M. Purcaru, “Modelling the PWM Sepic converter in discontinuous conduction mode,” 11th

WSEAS International Conference on Circuits, pp. 98-103, 2007.

[7] D. Cismasiu, V. Popescu, and D. Lascu, “Single-stage PFC power supply with universal input and automatic voltage clamping,” 11th WSEAS International Conference on Circuits, pp. 109-114, 2007.

[8] D.C. Martins, and G.N. de Abreu, “Application of the Zeta converter in switch-mode power supplies,” Conference and Exposition, Applied Power Electronics, APEC., pp.214-220, 1993.

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LIST OF SYMBOLS

d1 = “on” duty cycle of switch S d2 = “off” duty cycle of switch S fs = switching frequency (Hz) iC1 = current of capacitor C1 (A) iCo = current of capacitor Co (A) iD = current of diode D (A)



ig = output current of rectifier (A) iLm = current of inductance Lm (A) iLo = current of inductance Lo (A) io = output current (A) ip = primary current of transformer (A) is = input current (A) n = turns ratio of high frequency transformer vC1 = voltage of capacitor C1 (V) vg, Vg = output voltage of rectifier (time domain), peak value (V) vLm = voltage of inductance Lm (V) vLo = voltage of inductance Lo (V) vo, Vo = output voltage (time domain), average value (V) vs = sinusoidal source voltage (V) Gvd(s) = transfer function of duty cycle to output voltage Gvv(s) = transfer function of input to output voltages M = voltage gain of peak input to output voltages THDi = total harmonic current distortion Ts = switching period (s) iLm = current ripple of inductor Lm (A) iLo = current ripple of inductor Lo (A) VC1 = voltage ripple of capacitor C1 (V) VCo = voltage ripple of capacitor Co (V) γ = output ripple factor

= small-signal perturbation

= transferred circuit parameters from secondary to primary



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