Introduction to Virtual Memory and Memory Management 1 Introduction to Virtual Memory and Memory...
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Introduction to Virtual Memory and Memory Management 1 Introduction to Virtual Memory and Memory Management ARM Advanced RISC Machines
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Introduction to Virtual Memory and Memory Management
1
Introduction to Virtual Memory and Memory Management
ARMAdvanced RISC Machines
Introduction to Virtual Memory and Memory Management
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Physical Memory
* A computer system will probably contain several different types of memory devices.
* The Memory Management mechanism must access all available memory in, apparently , the same way as seen by user code.
SlowD/VRAM,ROM
DISCor other v. slow
device
Physical Address Space
Fast SRAM,ROM
* Fast memory, on chip or off, is expensive.
* Most memory will be slow (eg disc)
* Making the system think all memory is in the one place, and of the one type employs
Virtual Memory.
Introduction to Virtual Memory and Memory Management
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Virtual memory
Virtual Memory
Fast RAM/ROM
SlowRAM/ROM
DISCor other v. slow
device =Seen by the system.
e.g. 4GB
Virtual Address Space Physical Address Space
e.g.. 180MB
4MB
1MB
* The physical memory may be smaller than the
- total CPU address space
- the total required for all user code and data.
* Create a VIRTUAL memory space, mapping into the Physical memory space.
Introduction to Virtual Memory and Memory Management
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Virtual Addresses* Mapping of virtual addresses to physical addresses via a page table
* Memory mapping or address translation
Virtual Page Number Page Offset
Main MemoryPage Table
Physical Address
Introduction to Virtual Memory and Memory Management
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Memory management -overview
* "Memory Management Units" allow the processor to use external memory mapped into a virtual address space.
• allows protection schemes to be implemented
• control system when the physical memory is less than the virtual memory
• control system when physical is greater than the virtual memory
• Efficient memory usage ( Eg: defragmentation )
* This added complexity may bring problems:
• increased die size
• a “single” access may require up to three accesses to translate the address and get the data.
Introduction to Virtual Memory and Memory Management
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An example
Protection & Aborts
VRAM
RAM
ROM
RAM
RAM
Process A
VirtualMemory
PhysicalMemory
Translationand checking mechanism.
TLB
Translation Tables
Manager
Process B
Process C
* The Memory Management hardware resolves:
• the mapping from virtual to physical memory
• the access rights of the current process against those of the memory requested.
MMU
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Page Tables
* Page tables contain the mapping of the Virtual to Physical Addresses
* The Page table must be read before the translation can take place
* Extra read cycles are required to access the page tables
• A single read could require up to 3 accesses to memory to get the data
031
ProtectionAddress MappingPage Table Entry
The amount of information that can be storedabout the protection is limited by the size of the page.
Introduction to Virtual Memory and Memory Management
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Segments and Pages* Memory (physical or virtual) is divided into Segments or Pages
* Segments are variable size blocks
• Largest segment could be 4GBytes
• Smallest segment could be 1 Byte
• Requires two words per address
• More difficult to handle as must find contiguous unused block of memory to replace a segment
* Pages are fixed length blocks
• Typically 512 to 8192 bytes
• Require one word per address
• Easier to handle as all blocks are the same size
• Less wasted storage space as it is easier to store the smaller pages
* Compromise is Paged Segments
• Each segment is is an integral number of pages
Introduction to Virtual Memory and Memory Management
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Memory management structures
* Two main operations are required from a memory management system:
• Translation : Finding the location of the real, physical, address of the required memory from the virtual address.
• Protection : Confirmation that this location is eligible for access under the current privilege
• ARM has split the two operations. This allows the size of the units of address location or translation to be different from those of protection
Virtual Address
The MMUTranslation/ProtectionPhysical Address Exception
Introduction to Virtual Memory and Memory Management
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Translation Lookaside Buffers ( 1 )* A data read could take up to three accesses to memory
* Slow when trying to read data
MMU
Physical Memory
Virtual Memory
Page Tables
Data Required
descriptor 1
descriptor 2
Access Real Data
Introduction to Virtual Memory and Memory Management
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Translation Lookaside Buffers (2 )* The Translation Lookaside Buffers effectively cache the last
transactions so the accesses to the page tables are not needed.
MMU
Physical Memory
Virtual Memory
Page Tables
Access Real Data
TLB’s
Introduction to Virtual Memory and Memory Management
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The Translation Page Tables
Translation Table
(level 2)
L2PT
Sector Access
Page access
* If the TLB misses, the translation walk hardware accesses the Translation Page Tables, kept in physical memory
* The translation will be satisfied
• Base of Translation Table held in TT Base Register of MMU.
• Must reside on 16KByte boundaries
• Translation information returned to TLB.
Translation Tables (in physical memory)
Translation Table
(level 1)
Physical memory
To MMU
