Introduction to Experiment 7 Replacing Hardwired Control Unit with the Picoblaze Microcontroller ECE...
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Transcript of Introduction to Experiment 7 Replacing Hardwired Control Unit with the Picoblaze Microcontroller ECE...
Introduction to Experiment 7
Replacing Hardwired Control Unitwith the Picoblaze Microcontroller
ECE 448Spring 2009
2ECE 448 – FPGA and ASIC Design with VHDL
Sources
• P. Chu, FPGA Prototyping by VHDL Examples
Chapter 14, Picoblaze Overview Chapter 15, Picoblaze Assembly Code Development Chapter 16, Picoblaze I/O Interface Chapter 17, Picoblaze Interrupt Interface
SSD1SSD2LED
JOYSTICK
PRNG_STATUSPRNG_CTRL
OUTPUT_INTERFACE
INPUT_INTERFACE
PRNGADDR_DECODER
DATARAM
PICOBLAZE
INSTRUCTIONRAM
MEM_BANK
DO[7..0]
DI[7..0]
out_port
A[8..0]
DO[0] A[8]
port_id
A[7..0]
instruction address
addrA[7..0]
RA[7..0]
din
read_strobewrite_strobe
dout
iomem
rng
io, mem, rngSSD1_en, SSD2_enLED_en, MEM_BANK_en,PRNG_CTRL_en,RAM_wen,RAM_ren
we
re
RAM_wen
RAM_ren
in_port
interrupt
interrupt_ack
Two 7-segmentdisplays
8 LEDs
joystick
A[8..0]RD[7..0]
R_wen
R_wen
rinit
rinit
rinit
000001002
. . .
0FE0FF100101102103104105
. . .
1FE1FF
255 x 8 DATARAM
MEM_BANKJOYSTICK
SSD1
SSD2LED
PRNG_STATUSPRNG_CTRL
MEM_BANK
MEM_BANK:
7 6 5 4 3 2 1 0A8
A8 – current memory bank number = the most significant bit of the address
JOYSTICK:
7 6 5 4 3 2 1 0A
A – joystick active (bit cleared by reading registerJOYSTICK or by interrupt_ack),
RLDUS
R, L, D, U, S – joystick right, left, down, up, select
PRNG_STATUS:
7 6 5 4 3 2 1 0D
D – done: bit cleared by writingto register PRNG_CTRL, set after PRNGgenerates 255 8-bit numbers,
PRNG_CTRL:
7 6 5 4 3 2 1 0I
I – initialize: after 1 is written to this bit,PRNG generates 255 8-bit numbers, and the corresponding address (index) of each number
Task 1 – Browsing Mode
00 0102030405….
FAFBFCFDFE
00 0102030405….
FAFBFCFDFE
Address Data
Current Address Two 7-SegmentDisplays
(in hexadecimalnotation)
Joystick up = Increment Address
Joystick down = Decrement Address
8 LEDs(in binarynotation)
Value at Current Address
255x8 RAM
Task 2 – Edit Mode
00 0102030405….
FAFBFCFDFE
00 01020304
05=>06….
FAFBFCFDFE
Address Data
Current Address Two 7-SegmentDisplays
(in hexadecimalnotation)
Joystick up = Increment Address
Joystick down = Decrement Address
8 LEDs(in binarynotation)
Value at Current Address
255x8 RAM
Joystick Enter = Edit
Joystick up = Increment Data
Joystick down = Decrement Data
Joystick Enter = Approve
Task 3 – Initialize
00 0102030405….
FAFBFCFDFE
25 879426B5C6….
7A5B344389
Address Data
Joystick Enter = Initialize with Pseudorandom Values
255x8 RAM
8-bit LFSR (Linear Feedback Shift Register)with the period of 28-1
8
R
R0R1R2R3R4R5R6R7
= D flip-flop with set or reset determining its initialvalue after “soft” reset
Run for 8 clock cycles before using a new output value.
Task 4 – Sorting
00 0102030405….
FAFBFCFDFE
25 3744565778….
B4B6B8CCD4
Address Data
Joystick Enter = sorting using one of the following types
sorting signed numbers in the descending ordersorting signed numbers in the ascending ordersorting unsigned numbers in the descending ordersorting unsigned numbers in the ascending order
Joystick Up changing sorting type
255x8 RAM
Task 5 – Advanced Testbench
ProcessesGenerating
InputStimuli
Design Under Test (DUT)
ProcessComparing
Actual Outputs
vs.Expected
Outputs
DesignCorrect/Incorrect
Yes/NoTestvector
file(s)
Task 5 – Format of an input file
number of entries to be sorted (in decimal)empty line
numbers to be sorted in the initial order (in the hexadecimal notation, one number per line)
empty line
numbers after sorting (in the hexadecimal notation, one number per line)
6
B489A3586178
58617889A3B4
Task 6 : Comparing Circuits from
Experiment 6 and Experiment 7(hardwired vs. Picoblaze-based
controller) in terms of
• minimum number of clock cycles necessary to complete sorting• minimum clock period• resource utilization.
Introduction to Picoblaze Development Environment
(Hands-on Session)