Introduction of Electronics
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Transcript of Introduction of Electronics
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Contents
o course outline
System
Passive elements Sources
o Dependent Sources
Lecture 3: DC Circuit Analysis
Lecture 4: More on Dependent Sourceso Thevenin's Theorem
o Norton Theorem
o Example: Analysing circuits using Thevenin's and Norton's equivalents
Using Thevenin's equivalent
Using Norton's equivalent
Transient response of RL circuit
R-C Circuits
Sinusoidal Steady State Response Power Supply
o Full Wave rectifier
o Full wave rectifier without center tapped transformer
o LM 317: Regulator
Bipolar Junction Transistor
o CE Characteristics
o Constant current source
o Constant voltage source
Operational Amplifiers
Digital Circuits
o Universality of certain gates
Using NAND gates
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o Boolean Expressions
Other ways of realizing logic functions
o Multiplexers (MUX)o Flip-Flops and Latches
o Sequential circuits
Master Slave Flip-Flop (S-R) Edge triggered Flip-Flop
System
Each system will have inputs and output. Example of an input can be battery which isconnected to a circuit. The output is some entity which we want to measure in a circuit
element.
In the example below, the input is the battery supplying voltage . Since, we are
interested in current flowing in the resistor, the output is current .
Figure 1.1: Resistance
The process of predicting the output for given inputs in a electronic system is circuit
analysis. The inputs can be of various forms e.g., mic converts audio to electrical signal.Alternatively, the output can also be a non-electrical entity e.g., speaker converting the
electrical signal to audio. In general the electronic system will have multiple inputs (can
be signal inputs or power sources) and multiple outputs.
We need to understand the basic elements to do circuit analysis.
Passive elements
Most of the Circuit elements have at least two leads (electrical terminals). They are
characterized by voltage across the terminals and current flowing through the device (seeFig.2.1); this is V-I characterization of device.
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Figure 2.1: Simple element
Resistance: Across this element, if we applied a voltage source and observe the current,
then we will observer that , that is, , where R is the resistance measured in
Ohms (Fig.1.1, 2.2).
Figure 2.2: Graph of V vs I for a Resistance
Higher the value of R, larger the voltage required to achieve the same current. Voltageproportional to current - is Ohm's law (It was deduced hueristically by experiments for
metals, by George Simon Ohm). For lamp, this law is not true, as with increase incurrent, temperature of bulb increases, causing the increase in resistance. Hence Ohms
law is not strictly true for lamp. But for most of the practical purposes and for this course
the Ohm's law holds true for the resistive circuit elements.
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The resistive elements (resistances) can be fixed or variable. Commonly use resistor
types are carbon film and wire wound. The example of variable resistor is potentiometer.
For a material with length and cross-sectional area , the resistance will be ,
where is specific resistivity (property of material). Inverse of resistance is conductance.
, measured in mhos or Seimens.
Figure 2.3: Bulb as a resistive load
In Fig. 2.4, property of interest is resistance between A and B. It is dependent on details
of wire, connector, filament, material, and shape. It can be abstracted as simple resistance
(Fig.2.4).
Figure 2.4: Bulb abstracted as a simple resistance
Inductance:
It another important basic circuit element. Current flowing in a wire causes generation of
magnetic field intensity ( ). is independent of material medium surrounding the
current carrying wire. The leads to magnetic flux density . Here is
absolute permeability of vacuum. Is relative permeability of material where is
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measured. The flux flowing around wire links with the conducting wire. And if the flux
linkage changes it lead to generation of EMF (electromotive force) which tries to oppose
the change in flux. This means it tries to nullify the change in current.
The current causes production of magnetic flux. is the EMF of a single turn.
Here, . Thus, the total EMF , where is the number of turns.
Defining the inductance - , is inductance and measured in Henry. See the
output current of sinusoidal applied across an inductor in Fig.2.5
Figure 2.5: V and I as function of t for an Inductor
Figure 2.6: Physical Implementation of an inductor
In lumped model, inductance is considered only due to element. The inductance due to
wires connecting it to other elements is neglected (Fig.2.6)
Analysis of circuit: To find voltage or currents in an element of interest. One can also
find voltage and current in all the elements of circuit.
Lumped simplified model of resitance, inductance and capacitance.
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Capacitance: , capacitance. The magnitude of charge on either plate is given by
.
Figure 2.7: Symbols for resistance, inductance and capacitance
Lumped model: Shape, material, wire, and connectors - effect of each is assumed to be
due to single entity shown by the symbols in the diagram. In actual resistance, inductance
and capacitance are distributed all across the circuits. For most practical purpose, lumped
model- satisfactory.
Series and Parallel connections
Figure 2.8: A series connection of resistors
Kirchhoffs voltage law: In a circuit, if your start from a point A and transverses the
circuit in any fashion and reaches back to point A, the total sum of potential changes
should be zero. This has to be true since, same point cannot have two different potentials.
Kirchhoffs current law: At any point in the network, total amount of current entering and
leaving the point has to be equal to rate of accumulation of charge at the point. Since, in
the circuits ordinarily the points where one circuit element is connected to other circuit
element (these points are called nodes) do not store charge sum of incoming current hasto be equal to sum of outgoing currents.
Thus, for series model, we get relations:
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Thus equivalent resistance of series connection is .
For parallel connection, we get the relations:
Thus, equivalent resistance here is: . Similarly, we calculate equivalentinductance and capacitance for series and parallel cases.
Inductances in series:
Inductances in parallel:
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Figure 2.9: Series connection of capacitances
Capacitances in series:
Capacitances in parallel
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Inductance of a Solenoid (Coil)
Figure 2.10: A Solenoid diagram showing magnetic circuit path lengths
Define =magnetic circuit path lengthA=magnetic circuit crossectional area.
Inductance: (Assuming that is same in the closed path of length .)
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Here is magnetomotive force (equivalent of eletromotive force - EMF in
magnetic domain), and flux is equivalent of current in magnetic domain. The Magnetic
reluctance= is then equivalent of resistance in magentic domain.
Linearity: when elemental change in cause , always leads to same elemental change
in effect i.e., , then the system is said to be linear.
In general, for a system let input lead to output , and a small perturbation in
causes a small perturbation in output. If perturbation alwasy leads to
same perturbation of in the output irrespective of any , then the system islinear.
The implication of the above is that if input causes output , and causes
, then will cause an output of . This is principal
of superposition.
Sources
Figure 3.1: A DC source (Ideal Voltage Source) with a circuit element
Ideal voltage source: Whatever amount of current is drawn from it the voltage at theterminals is always same. Whenever the terminals are short circuited (resistance of
between the terminals) the infinite amount of current flows to maintain voltage. This is
hypothetical condition, why?
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Figure 3.2: Ideal Current Source
Ideal current source: Whatever load or network of elements is connected to source, the
current pumped by the source into the load always remains same. Whenever the terminalsare open circuits (Terminals are not connected to any thing) the voltage across the
terminals becomes to maintain the same amount of current through terminals. This is
also hypothetical condition, why?
Can I leave a current source as shown in figure3.3?
Figure 3.3: Current Source left open
In this case, voltage across the terminals will be .
Non Ideal Voltage Source: See the circuit in figure 3.4. A non ideal voltage source is
modeled with an internal resistance of source . Thus battery terminal voltage
changes with the load current.
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Figure 3.4: Non Ideal Voltage Source
Under no load, i.e. for zero current, . When a load current flows,
. For a new battery, generally, is negligible, and it increases as thebattery gets discharged. is a function of electrolyte and terminal materials.
Non Ideal Current Source: See the circuit in figure3.5.
Figure 3.5: Non-ideal Current Source
A non ideal current source is modeled by an internal conductance in parallel with
the source. .
From the figure, we see that: . Ideal current source has ,
i.e., .
Non-ideal voltage source and current source analysis: The source is non-ideal, hence v is
not constant. If it is linear circuit, and are linearly related. is cause, and is effect.
Thus we get:
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Figure 3.6: Battery
(3.1)
(3.2)
Figure 3.7: Model
This equation is equivalent to fig.3.7. Thus a battery can be represented by 3.8:
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Figure 3.8: Battery Model
Similarly, for a nonideal current source (fig.3.9), if it is linear,
(3.3)
(3.4)
For ideal current source, always. Thus .
Figure 3.9: Current Source
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Figure 3.10: Current Source Model
In the above, the sources are modelled using ideal voltage (current) sources whosevoltage (current) remains constant.
We can also havesource whose output can be controlled. These can be used to model
certain real life devices (e.g., transistor) We will study transistor later during the course.
Dependent Sources
Output of source depends on some other variable. These are of four types depending onthe controlling variable and output of the source.
Voltage controlled voltage sources: This is a voltage source whose output can be
controlled by changing the controlling voltage (Fig.3.11). This is a voltage amplifier
if we consider the VCVS to be a box which takes the input as voltage and then at theoutput generated the amplified voltage. In the figure, 20 will be the gain of voltge
amplifier.
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Figure 3.11: Voltage controlled voltage source
Voltage controlled current sources: In case the control variable is voltage and the output
of the source is current, it is VCCS. The unit of gain factor (20 in the Fig.3.12) will of
siemens. This is transconductance amplifier.
Figure 3.12: Voltage controlled current source
Output current can be modified by changing . .
Current controlled voltage sources: shown in figure 3.13.
Figure 3.13: Current controlled voltage source
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This is a transimpedence amplifier since the ratio of output to input has units ofresistance (more general term is impendance). The gain factor for this type of source has
units of ohm, measured as .
Current controlled current sources (Fig.3.14: A current amplifier, the gain is current
gain (dimensionless, as in voltage amplifier).
Figure 3.14: Current controlled current source
Lecture 3: DC Circuit Analysis
A network of passive elements and sources is a circuit.
Analysis: To determine currents or voltages in various elements (effects) due to varioussources (cause).
Figure 4.1:
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In circuit4.1 all the time.Expected that all current (voltage) in (across) the elements is constant.
Inductor:
(4.1)
implies constant.
Hence
Inductors act as a short cicuit for DC inputs. This would not be the case if I put a switchacross a source.
Capacitor:
(4.2)
as (expected), .
Thus capacitor acts as open circuit for DC analysis.
Figure 4.2:
The resultant circuit will be as shown in Fig.4.2.
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Analysis: To find currents in all branches, voltage across all branches.We can use Kirchoff's law (voltage and current). For as many independent equations as
number of unknown variables.
Solve the simultaneous equations, and get the result.
Voltage drop from 'a' to 'b'. Therefore,
Current in branch ab in the direction from 'a' to 'b'. Here .
Hence:
Note: In a circuit with nodes, the number of branches will alwasy be ,
where are maximum number of independent closed paths possible in the circuit.
Hence, we can always form equations using Ohm's law, equations using
KCL, equations using KVL. Hence in total equations can be formed, which are
sufficient to solve for variables (voltage and current in each branch).
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Can we simplify the situation? Loop currents method: We do away with branch currentsand define loop currents. The branch currents can be written in terms of loop currents
once all the loop currents passing through the branch and their directions are known.
The branch voltages can always be written using Ohm's law and branch current written
in terms of loop currents. So now our objective is to find loop currents. For this we
choose maximum number of independent loops (Fig.4.3) and apply KVL in them.
Figure 4.3:
If and are known, voltages across all elements can be found.
Make two independent equations:For loop abef
(4.3)
(4.4)
For loop bcde:
(4.5)
(4.6)
Use any technique to solve these (such as using matrices). We get:
(4.7)
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(4.8)
Nodal Voltage Method
Figure 4.4: Nodal Voltage method
Considering Fig.4.4.
Independent Nodes: One of the nodes in circuit need to be considered as reference node.Hence its node potential is zero. For other nodes, nodal voltage is potential differetial
w.r.t. to reference node. The nodes are called independent nodes. In general for node
network, nodes will be independent.
At node b: .
Similarly, other equations are:
(4.9)
(4.10)
(4.11)
(4.12)
(4.13)
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(4.14)
These are six equations, in six unknowns. Thus can be solved for a unique solution. Onecan make a supernode and use KCL combining the nodes nodes a and f. We also make
extra equations for potential difference between two nodes.
With supernode, no. of equations is equal to no. of independent nodes whose voltagew.r.t. reference needs to be determined.
Current Sources in Loop Current Analysis
Figure 4.5: Current sources in Loop current analysis
Using KVL for loop 1 in Fig.4.5:
(4.15)
The other equations are:
(4.16)
(4.17)
The first and the third equation can be combined for taking care of . This can be
done by making superloop for writing KVL.
Graph
For analysing circuits efficiently.
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Loop current methodOne can form a spanning tree from graph such that current sources are in links (Those
elements which do not form part of the tree). Each link when added to the tree gives a
loop. All voltage sources should be kept in branches of tree. For example, refer to the
following two figures (Fig.4.6, Fig.4.7)
Figure 4.6: Loop Current method
Figure 4.7: Loop current method
Node voltages
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Figure 4.8: Node Voltage method
In the above figure, . There are five unknown node voltages in the above
circuit, namely, , , , and . Correspondingly, we have five equations.
Note that we can merge into onesupernode
Lecture 4: More on Dependent Sources
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Figure 5.1: A dependent Source
All dependent sources are linear elements if (see figure 5.1) K=constant and the output is
proportional to controlling variable. Here, in figure 5.1 , effect, and V= cause. If K
is constant, always gives same for all values of . . In general all the
measured variables can be written as linear combination of all the causes, since nodalvoltage or loop current method leads to linear equations. This is true for network withlinear elements, and linear dependent sources.
For measuring effect of many sources (also called forcing functions), the effect due to
one source at a time is computed (assuming all others to be null). For the sources to be
nullified means that if they are voltages sources, they are short circuited (making thevoltage of source zero), and if they are current sources, they are open circuited (making
the current from the source zero). Effects of all individual independent sources are added
to get effect due to presence of all the independent sources. This is known asSuperposition Theorem and is valid because of linearity in the circuit (as explained
above).
While applying superposition theorm, depenendent sources are retained as any other
circuit element. They should not be nullified to get their effect separately on the quantityof interest.
Example: Consider the circuit shown in figure5.2
Figure 5.2: Example Circuit
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Using loop analyis, as shown in fig5.3 , we apply KVL. For .
Figure 5.3: Tree for the example circuit
Solving the same circuit using superposition theorem
There are two sources. We will take one at a time and find the contribution in shown in
figure which is quantity of interest for us. Taking Voltage source first (as in figure 5.4)
Figure 5.4: Taking Voltage source
(5.1)
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Taking current source only, (as in figure 5.5), making tree (as in figure5.6)
Figure 5.5: Taking Current Source only
Figure 5.6: Making Tree for the circuit considering current source only
When one is finding effect of an independent source, other independent sources arenullified. Let's take an example having dependent source (Fig.7.5).
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Figure 5.7: Circuit for analysis with dependent source
Taking voltage source first (Fig.7.6)
Figure 5.8: Taking only voltage source
Using KVL:
(5.2)
Taking Current source (Fig.7.7), and making a tree (Fig.7.8), we write KVL and solve
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Figure 5.9: Taking Current Source
Figure 5.10: Making a tree
Now we verify the solution from loop current method directly (Fig.7.9). Making tree
(Fig.7.10).
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Figure 5.11: Direct Verification
Figure 5.12: Making Tree
Which is correct answer?
Norton Theorem
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If the network shown in figure 5.19is linear, . The network can then be
replaced by a Norton equivalent, as shown in steps in figures5.205.215.225.23 and5.24.
Figure 5.19: The Linear Network
Figure 5.20:
Figure 5.21:
Figure 5.22:
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Figure 5.23:
Figure 5.24:
Using Thevenin's equivalent
The circuit is shown in figure 5.25, and the aim is to find . The analysis is shown in fig
5.26, 5.27, 5.28.
Figure 5.25:
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Figure 5.26:
Figure 5.27:
Figure 5.28:
Using Norton's equivalent
The same problem is then worked out with Norton's equivalent, as shown in figures 5.29,
5.30, 5.31, 5.32. Finally,
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Figure 5.29:
Figure 5.30:
Figure 5.31:
Figure 5.32:
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Transient response of RL circuit
Figure 6.1: non-realistic model
Figure 6.2: Switch attached to make it realistic
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Figure 6.3: Inductance of wire also considered
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Figure 6.4: After closing the switch
For DC circuit analysis, the voltage and current source excitation is constant, so C and
L are neglected6.1. The circuit is assumed to be as it is since time= to . In
practice, no excitation is constant from to . A more realistic circuit
would include a switch, as shown in Fig.6.2. Also, inductance and capacitances of wires
and components cannot be neglected as shown in Fig.6.3, and in Fig.6.4 (for ).
Using KVL:
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Multiplying both sides by
to get
Therefore,
Integrating both sides, we get
Note that, at , and at , .
Now, , where, , and .
As at , ,
The plot of vs. is shown in the Fig.6.5. Note that when , A.
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Figure 6.5:
Voltage across the inductor is given by . Therefore,
The plot of vs is shown in Fig.6.6.
Figure 6.6:
From the above equation, we notice that in time seconds, the voltage across the
inductor would reduce to of its original value and would go on decreasing by a further
factor of every seconds thereafter. Therefore, summing it up, we have for aninductor-resistor pair with a constant voltage applied at ,
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and
Figure 6.7:
Now, consider the circuit shown in Fig.6.7.
Before , we have the circuit looking as in Fig. . Therefore we have the initial
current (at ) through the inductor as A.
Figure 6.8:
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Figure 6.9:
At , the circuit looks as in Fig. and therefore, we have the following equations
for .
At , A. Hence,
The plot for vs would therefore be as in Fig 5.10
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Figure 6.10:
Figure 6.11: R
Hence, and, as shown in6.11, discharge will be immediate. We write equations
for across the inductor.
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Figure 6.12: Note the sign of
Sign of is as shown in6.12. As ,
Figure 6.13: Large inductance doesn't allow currents to change at fast rates
Switching off causes a discharge in the tube or spark at switch 6.13.
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Figure 6.14:
At , 6.14
In generic form,
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Figure 6.15:
Now, have a look at the circuit shown in the figure 5.15. As the resistance is 0, the
equations are indeterminate and are of the form
So, we solve the circuit directly
At , , therefore,
We will use the above circuit to analyse the circuit shown in Figure 5.16. As the
resistance of is in parallel with the voltage source and also the rest of the circuit, the
current drawn by it will be constant and will not affect the analysis of the rest of the
circuit. So, for , we can consider the circuit to be as in Figure 5.17. Analysingit as in the previous example, we get
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Figure 6.16:
Further, for , the circuit can be equivalently considered as in Figure 5.19.
Notice that still, Amps. as the inductor is in parallel with the voltage
source. The plot for vs. would therefore be linear as in Figure 5.18. Therefore,
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Figure 6.17:
After , the circuit can be considered equivalently to be that in Fig 5.20. Now,
there is no constant voltage source across the resistance of . This, the current flowing
through it also comes into the analysis.
Figure 6.18:
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The solution thus is: , where, given the initial
conditions, we can solve for and .
R-C Circuits
An RC circuit is shown in fig.7.1. Since, in practical circuits, power is always switchedon at certain time, a switch is provided here. This switch closes at time .
Figure 7.1: An RC Circuit
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We are interested in finding how voltage across capacitor changes with time? We
can also assume that voltage across the capacitor is zero . Using Kirchoff's voltage
law across the only loop in circuit we can find the equation relating , and .
Using the characterstic equations of capacitors, resistors i.e.,
and using KVL
for
for ,
For , constant
Thus, ; here is constant
At , capacitor voltage will be 0. Hence
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Alternatively,
at
Thus,
Thus,
(7.1)
The curves showing and are shown in the figures 7.2and7.3.
Figure 7.2: i vs t
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Figure 7.3: vs t
These show the exponetially decaying (growth) nature of current (voltage across
capacitor).
Consider the figure shown in 7.1. The switch is closed at .
Now,
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For RC circuit with source voltage zero, and an initial capacitor voltage of , this
expression reduces to .
For constant current charging of a capacitor, as shown in 7.4, the analysis:
Figure 7.4: Constant current excitation of a capacitor
(7.2)
(7.3)
That is, voltage varies linearly with time on constant current charging.
Figure 7.5:
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0
Now consider the circuit shown in figure 7.6
Figure 7.6:
The switch is turned off at sec. There is no charge on the capacitor initially.
Therefore, after and before , the circuit is equivalent to figure7.7
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Figure 7.7:
Taking thevenin equivalent in the direction of the arrow leads to figure 7.8
Figure 7.8:
Therefore ,
For , we have the following equation
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After , the switch is once again thrown open and the equivalent circuit is
shown in figure 7.9
Figure 7.9:
Now,
Therefore,
The graph of with time is shown in figure 7.10
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Figure 7.10:
Sinusoidal Steady State Response
Cause and effect for linear systems are related by linear differential equations. note that
for the exponential function ,
and
where is also a constant. Similar equations hold for derivatives also.
Figure 8.1: An Linear System
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Consider a function . If on operation by a system, the function is only
multiplied by a constant , the function is said to be the eigenfunction of the given
system, as shown in 8.1.We know that:
(8.1)
Figure 8.2: Superposition
Consider a linear system, as in 8.2. The functions and are eigen functions ofthe linear system. If sum of these two functions is input to the system, the output can be
predicted easily, by superposition theorm. Thus knowing the output to eigenfunctionshelps us in predicting output of several other functions.
Now we look at how output to sinusoidal excitations of linear circuits can be determined.
Consider or .
Note that . Thus, the phase and associated
constant changes when a sinusoid is passed through a differentiator.
Similarly, .
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Figure 8.3: RLC circuit
Now consider the RLC circuit shown in 8.3.
If i(t) is sinusoidal, say cos(wt), then
where,
the last equality follows using
, as shown in 8.4.
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Figure 8.4:
Analysis can be done simply using sin and cos terms.
But can't be further simplified using imaginary quantities
Figure 8.5:
As in the diagram shown in 8.5 ,
figure 8.6, the complex values shown are rotating with time. The actual value at any time
is the projection on the real axis.
Figure 8.6: Values rotating in the complex plane with time
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Note that and have constant separation with each other. All entities in general
will have same relative separation.
Figure 8.7: Phasors
Consider figure 8.7. Let us rotate the frame of reference (or axis) also with speed
rad/sec. Then the angles of and with respect to the axis become constants. Thefigure 8.7is a phasor diagram, showing current and voltage phasors, and the phase
difference between the two.
We show the application of phasors in circuit analysis by the circuit shown in figure8.8,
a simple inductor circuit excited by a sinusoidal voltage source.
Figure 8.8: Inductor circuit
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The associated phasor diagram is shown in figure 8.9. It can be seen that the phase
difference is radians. Voltage leads the current by radians.
Figure 8.9: Phasor diagram for inductor excitation
Figure 8.10: Resistance
Similarly, consider a resistance excited by a sinusoidal votage source, as shown in figure
8.10. Here, , and is in phase with the voltage. The
same is shown in the phasor diagram 8.11.
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Figure 8.11: Phasor for resistor excitation
Figure 8.12: Resistor and inductor in series
Now consider a resistor and an inductor in series with an AC voltage source, as in 8.12.
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where
The resulting phasor diagram is plotted in figure 8.13.
Figure 8.13: Phasor
This gives an inkling to a general result: phasors can be added/subtracted just like
vectors. Resulting magnitude and phase would come out to be the same. See the hintbelow.
In phasor terms: Voltage across inductor: , Voltage across resistor
. Now adding the two vectors,
Compairing with Ohm's law, , the previous equation , the
complex term can be taken to be similar to resitance. This is called impedance.Inverse of impedance is called admittance, complex analog of conductance. In the above
circuit,
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Similar to the above analysis, we now work with the capacitor. See figure 8.14.
Thus, lags by w.r.t. , as shown in phasor diagram8.15. The phasors are
typically written in capital letters, whereas their continuous time counterparts in small
letters. In phasor diagram, . Thus, impedance is .
Figure 8.14:
Figure 8.15:
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Figure 8.16:
Now we analyse circuit shown in in figure 8.16, . We wish to
calculate and .
(phasor in rectangular coordinates x and y)
for first loop: ...(*)
for second loop: ...(**)
From (**): From (*) :
Solving these two for and , we get:
which after rationalization, gives:
For sinusoidal forcing functions, we can use the same techniques, but with complex
variables
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A sinusoid passed through a linear system with transfer function , the
output would be .
Thus, for a sum of sinusoids of different frequencies, using superposition principle, the
output for would be:
Power Supply
Many electronic applications such as radio sets, toys, walkmans etc. require a d.c. owersupply (usually 6V or 3V). One way to achive it is through the use of dry cells in series.
But an economically more convenient solution would be the use of the a.c. supply togenerate the desired d.c. output. Power supplies are used to achieve precisely this result.
Let us first state the problem at hand. We are given a 50 Hz, 230 V r.m.s (i.e.
V peak ) a.c. supply and our objective is to design a circuit which would take this as
input and give as output a constant d.c. voltage, say 6 V.
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In order to be able to use our common circuit elements (which run on small voltages), we
first reduce the amplitude of the input to say 6 V through the use of a transformer.
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Figure 9.1: The First Step
Figure 9.2: A transformer
The output of an ideal transformer shown above is governed by the following equations:
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where, both the input and the output are a.c. We denote the transformer in the ciruit asfollowing.
Figure 9.3: A transformer
The next step is to use this small a.c. voltage to generate the required d.c. The simplest
manner in which this task is accomplished is by the use of a diode in a circuit known as
Half wave rectifier. The figure is shown below. The working of the circuit is as follows.The diode can conduct only ion one direction, i.e. only when the voltage applied to the
circuit is such that the current flows in the forward direction. Otherwise, the diode
simply blockes the current. Now, when the load is simply a resistor , the equation for
the output current should be proportional to the output voltage and therefore, the outputvolatage is zero for half of the cycle and equal to the input voltage for the other half of
the cycle.
Figure 9.4: Half wave rectifier
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Figure 9.5: Output of the half wave rectifier
Now, suppose that instead of the resistor, we have an inductor as the load. In this case,
the output voltage at any time will not be proportional to the current at the time. Recall
that for an inductor, . Therefore, the output voltage can go negative in thiscase as long as the current is not negative. After all, diode prevents only negative
currents and not negative voltages. So, as long as the diode conducts (due to non-zero
forward current), the input voltage is transferred to the output. So, barring the transients
which occur due to the initial values of the voltage and current through the inductor,eventually the diode will conduct at all times with the output voltage being equal to the
input and the current being phase shifted from the input by 90 degrees with a d.c.
component added to make it positive valued at all times. The figures below two different
cases, one in which the is and the other in which it is . The initial
current through the inductor is assumed to be zero in both the cases.
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Figure 9.6: The inductive loadFigure: Output of the half wave rectifier when the input is
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Figure: Output of the half wave rectifier when the input is
In case the load is purely capacitive, once the capacitor is charged to its maximum value,not forther charging takes place. Also, as the current cannot be negative the discharge
also doesn't take place. The output is therefore a pure d.c.
Figure 9.9: The capacitive load
Full Wave rectifier
While in the Half wave rectification, we got an output only in one of the half cycles, inthe full wave, we get it for both the half cycles. This is achieved through the circuit
shown below.
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Figure 9.10: The full wave rectifierFigure 9.11: The output of a full wave rectifier
This is achieved by the use of two diodes instead of one as now, one of the two diodes
remains in conduction in both of the half cycles. Note that we require a center tapped
transformerto give us two shifted sinusoids so that exactly one of the waveforms ispositive at one time.
As the output is not the desired pure d.c., we introduce a measure of the quality of the
output known as theRipple Factordefined as:
We would ideally require the ripple factor to be zero. In the case of the half wave
rectification shown below,
Figure 9.12: Half wave rectification
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For the full wave rectifier, similarly we can calculate the average voltage to be volts.In both the cases, the difference of maximum and minimum voltages is V. Therefore,
ripple factor
Half wave rectifier :
Full wave rectifier :
Full wave rectifier without center tapped
transformer
Figure 9.13: Full wave rectification without the center tap
We can do away with the center tap and therefore use a single a.c. supply to the circuitby the use of a slightly more complicated circuit invloving four dioded as shown above.
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The diode D2 and D3 conduct in the positive half cycle while D1 and D4 in the negative
half cycle. when the load is purely resistive. The output is the same as center tapped
transformer based full wave rectifier.
Figure 9.14: Output
We started with the objective of getting a ripple free waveform at the output. We notice
that in the circuits that we have discussed so far, this aim is not achieved and the primaryreason for that is the change in output voltage as the input voltage changes. We
overcome this shortcoming by the use ofEnergy Storage Elements whose function is to
absorb energy at higher voltages and release it at lower voltages, thereby reducing the
ripple factor..
Examples of such elements are inductors and capacitors. The circuit below shows the
configuration of a full wave rectifier with a capacitor.
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Figure 9.15: Full Wave Rectifier with a capacitor
Without any load, the capacitor once charged remains charges and therefore the ripplefactor become zero.
Figure 9.16: Output without any load
Now,if a load is connected, some amount of discharging of the capacitor takes placein each half cycle. The magnitude of the ripple factor therefore depends on the and
.
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Figure 9.17: The effect of load on output
Neglecting the voltage discharge that takes place after the completion during the next
cycle, i.e. from the point onwards, we get, at , , where
. Therefore,
Neglecting the square and higher terms for , we get,
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From the figure above, the average value of the voltage can be approximated to be
. Therefore,
When ,
Next, we will consider the diode current calculations.
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In the period P, the diode current, is given bym
Note that the peak diode current, , increases with reduction in or increase in or.
We see that as reduces, R.F. increases.But it cannot become zero for finiteresistances. A way to achieve a better (smaller) ripple factor is through the use of a
Zener Diode
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Figure 9.18: The circuit with a zener diode
The zener diode when connected in parallel with the load makes the load voltage
approximately equal to the zener voltage ( )as long as it is reverse biased. This
happens if and only if the voltage across the capacitor is greater than the zener voltage.
Figure 9.19: The effect of the zener diode on the output
For this condition to be met, we must have
When , and when , .
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For the figure above, slope = . When discharge rate is higher so that at some
point, becomes less than , then, goes below as shown below
Figure 9.20: The effect of capacitor discharge on output
When the capacitor voltage is less than the input voltage, the diodes are input dioded are
in cutoff and the capacitor sees the following discharge circuit for the case when
.i.e. . In this case,
Note that when is lesser, output is not constant.
In the above case,
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Now, if this t is greater than the half time period, then no ripples will be seen ever.
Therefore, we must have,
Example: If volts, , and mF, we must have
V. Conversely, for a given , one can find a range of for no ripples.
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LM 317: Regulator
The trouble with zener diode driven power supply is that one needs a zener of the samevoltage as the desired voltage output. We can overcome this using a voltage regulator
such as LM 317
Figure 9.21: A power supply using voltage regulator
This regulator maintains a constant voltage of 1.25 volts across two of its
terminals. So, connecting it in the above configuration and neglecting the , we have
when , . For V, if we fix to be ,
we get to be .
The next thing we need is the value of required. Suppose the load is such that
mA. The current thorugh and is mA. Therefore,
mA. For no ripple, the capacitor should be able to supply this current without the voltagedropping below 15 V. Now, taking the worst possible instant of time, we have,
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On the other hand, for a 1mF capacitor, volts.
Bipolar Junction Transistor
A bipolar junction transistor (BJT) has three operating regions:
1. Cut off ( for NPN BJT)
2. Active region ( for NPN)
3. Saturated ( for NPN)
In active region, for silicon BJT, and for Germanium BJT.
In saturated region, .
Common realizations of BJT are shown in 10.1
Figure 10.1: Realizations of BJT
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In active region:Three configurations in the active region are shown in figure10.2. For active region, the
specified biasing condition is satisfied.
Figure 10.2: Configurations of BJT
When transistor is used for switching purposes, it works in either cut-off or saturationmode.
In active region, the base and collector currents satisfy the condition (DC
Current gain. Ratio of absolute values). is a constant for a particular transistor, which
varies from to for different transistors.Note that this condition does NOT hold
for saturation and cut-off operations of the BJT.
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Figure 10.3: Sample circuit for design problem
Now we address the problem of circuit design, in which we find appropriate values ofresistances and voltages in figure 10.3to ensure BJT in active region. The problem
assumes importance as many transistor applications are those in which it is in active
region.
In cut-off, , as . If becomes less than , the transistor is insaturation. We need to ensure that the BJT is not in these states.
In active region, as ,
The last equation shows that the transistor, in this mode (active), is basically a current
amplifier.
Let . Then, . Suppose the BJT has .
.
Also, we need to ensure , so that BJT is not in saturation. In the limiting
case, , just when the BJT is entering saturation from active region. (In
active region, ).
Thus, . That is, for ensuring BJT in
active region.
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Suppose we increase to . Then, . Thus, the
current gain .
Cut off and saturation are used in switching application. For the circuit shown in figure10.4, we find conditions for operating BJT as a switch.
Figure 10.4: BJT as a switch
When , , , and , since BJT is in cut-off.
Now find such that the BJT is in saturation.
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Thus, we get:
Thus, for , the BJT is in active region.
Figure 10.5: Vs for the design of BJT as a switch
Two different biasing strategies are shown in figure 10.6and10.7.
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Figure 10.6: Fixed bias circuit
Figure 10.7: Voltage divider bias
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CE Characteristics
We have two independent variables here and . For different value of , the
input characteristics as a function of is as follows.
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Similarly, for different values of , the vs. characteristic is shown below. The
line passing through and is known as the load line and its intersection
with the curve determines the quiscent point or operating point Q. Note that in
the active region, is almost independent of (i.e. nearly constant) and depends
mostly on . The ratio is a constant for the active region and is known as .
In the common emitter circuit shown above,
The above is the equation of the load line. Q is the operating point for A. In
the active region, is approximately 0.7 V.
For the cutoff region, and V.
In the saturation region, V and .
We will denote the operating point by and .
The fact that in the active region, variations in result in proportional varitions in
and hence forms thefundamental principle of amplifier. For the trabsistor to remain
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in the active region throughout this variation, variations in should be maximum
A.
In the CE configuration above, with the change in temperature, changes and hence, so
does Q. is an increasing function of T and therefore as T increases, increases
causing further heating of the transistor and thereby further increasing . This is known
as thermal runaway. To avoid this, we stabilize the circuit my introducing an emitter
resistance.
Now, as T increases, increases and so does . This increases and therefore
reduces as the base voltage increases. This decrease in results in decrease of ,
thereby compensating the effect of temperature and stabilization of the operating point.
Constant current source
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In the above circuit, the current is a constant independent of provided the
transistor if in the active region, as in the active region, is determined by . is
assumed to be 1K .
Further, we also want the maximum power to be less than a certain value, say, 1 Watt.We have,
Therefore, for the circuit to work, we must have,
We would obviously like to increase the range for which this current source works. In the
same circuit, if we now take , we get with similar calculations,
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This is a much better situation.
Constant voltage source
We can also have a constant voltage source whose output voltage would be more or less
independent of the load . See the above figure. The output voltage would be
as long as the transistor is not cutoff. The output voltage is therefore
dependent upon .
We must ensure that the transistor is in the active region, whence, volts.Therefore,
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Therefore, the above circuit works as a constant voltage source for .
Digital Circuits
Boolean Operators:
Single Input Single Output: Operation A and B take binary (0,1) values.
eg. NOT operation 12.1.
Figure 12.1: A NOT gate
Multiple Inputs Single Output:
Eg 1. OR operation 12.2.
if either of ``or'' is
The truth table is as follows:
A B C
0 0 0
0 1 1
1 0 1
1 1 1
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Truth table for OR gate
Figure 12.2: An OR gate
Eg 2. AND operation is shown in figure 12.3
Figure 12.3: An AND gate
A B C
0 0 0
0 1 0
1 0 0
1 1 1
Truth table for AND gate
These were basic gates which are implemented using transistor and other devices.
The transistor implementation is shown if figure 12.4
Figure 12.4: Implementation using a BJT
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IC based gates are shown in figure 12.5
Figure 12.5: IC based gates
Other functions
NAND: Not + AND
Figure 12.6: NAND gate
A B C
0 0 1
0 1 1
1 0 1
1 1 0
Truth table for NAND gate
NOR gate
Not+OR gate
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Figure 12.7: NOR gate
A B C
0 0 1
0 1 0
1 0 0
1 1 0
Truth table for NOR gate
X-OR gate
Exclusive-OR gate
Figure 12.8: X-OR gate
A B C
0 0 0
0 1 1
1 0 1
1 1 0
Truth table for X-OR gate
X-NOR gate
Exclusive NOR
Figure 12.9: X-NOR gate A B C
0 0 1
0 1 0
1 0 0
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1 1 1
Truth table for X-NOR gate.
Using NAND gatesNOT
Figure 12.10: Realizing a NOT gate using a NAND gate
OR The following statements are calledDeMorgan's Theorems and can be easilyverified and extended for more than two variables.
(12.1)
(12.2)
(12.3)
(12.4)
In general:(12.5)
Thus :(12.6)
Now it is easy to see that , which can be checked from the truth tableeasily. The resulting realization of OR gate is shown in 12.11
Figure 12.11: Realization of OR gate by NAND gates
AND gate
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Figure 12.12: Realization of AND gate by NAND gates
X-OR gate
(12.7)
Clearly, this can be implemented using AND, NOT and OR gates, and hence can be
implemented using universal gates.
Figure 12.13: X-OR gate
X-NOR gate
(12.8)
Again, this can be implemented using AND, NOT and OR gates, and hence can be
implemented using universal gates, i.e., NAND or NOR gates.
Figure 12.14: X-NOR gate
Boolean Expressions
A general realization of a Boolean expression is shown in12.15
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Figure 12.15: Realization of a Boolean Expression: shown as a black box
Example:
In a car, we have the following components:
A
Day-night sensor: Day-1, Night-0
BLamps on: On-1, Off-0
C
Ignition on: On-1, Off-0DWarning light for lamps-on
In this case, the truth table for the logic D would be
A B C D
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 1
1 1 1 1
Therefore,
, which can be written as in the sum of product form. We arrive at this bylooking at the combinations when the outout is one.
We can alternatively, express this in the product of sums form by looking at the
combinatins when the outout is low as
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Using SOP and POS, it can be implemented as follows:
Next, we will try to reduce the number of gates by combining terms suitably.
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We can get the above by clubbing the s in the k-map shown.
Now, if we club the zeroes together in the k-map,
Check that we get the same expression by simplifying the product of sums expression (by
using (X+Y)(X+Z)=X+YZ)
Multiplexer
The truth table for the multiplexer is as follows:
0 0
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0 1
1 0
1 1
Multiplexers (MUX)
For logic function realizations, instead of logic gates, Multiplexers can also be used
Consider a boolean function f={1,2,6,7}. Here input variables are A,B,C.
Multiplexer schematic for multiplexer is shown in figure13.1
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Figure 13.1: ( ) multiplexer implementation of logic function
Depending on the contorl input combination specfic input is connected to the single
output of multiplexer.
(13.1)
When multiplexer is used to implement the above function. We connect boolean
logic '1' at the inputs corresponding to control inputs ABC= 1, 2, 4, and 6. For all other
input boolean logic '0' is connected.
In case we take a multiplexer we can make as control input and then determine
what should be connected at the inputs of multiplexer as shown below.
(13.2)
(13.3)
(13.4)
(13.5)
The realization is shown in figure 13.2 using a Mux.
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Figure 13.2: Multiplexer ( ) Implementation
Flip-Flops and Latches
An SR latch is shown in figure 13.3. The latch Truth table is shown in the following table.
The two inputs, S and R denote ``set'' and ``reset'' respectively. The latch has memory,
and the present output is dependent on the state of the latch. Thus the output at
instant, denoted by is dependent on output at instant, denoted by .
Figure 13.3: Construction of a latch from NOR gates
Students should verify the veracity of the truth table from the figure13.3.
S R
1 0 1 0
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0 1 0 1
1 1 0 0
0 0
Note that in state, both and are 0, which seems absurd. Thus,
conventionally, the state is said to be ``not allowed''.
A similar latch, known as latch is constructed using NAND gates (as opposed to
NOR gates for latch). The students should again check that the working of the latch
coheres with that of the truth table.
Figure 13.4: Construction of a latch from NAND gates
0 1 1 0
1 0 0 1
0 0 1 1
1 1
To avoid ``race'' between the inputs, to have a control on when the input affects the latch,the circuit13.5 is often implemented.
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Figure 13.5: Circuit to avoid ``race'' condition
The inputs have an effect on the latch only when , otherwise, the previous state is
maintained. The input may be a clock, so that whatever transitions in and takeplace before the clock changes to do not affect the outputs, and only when the inputs
have become stable is the system affected.
Sequential circuits
In the above circuit, we have the problem of multiple tranistions when the clock is active.
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Master Slave Flip-Flop (S-R)
When , , and are both 1. Therefore, it is an undefined condition. Thiscan be eliminated by proper feedback.
for the above circuit, the truth table is
1 1
0 1 0
1 0 1
0 0
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0 0
1 1
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Lab
schedule
Week Experiment
1 Familiarization of CRO and function
generator
2 Charactersticks of passive circuit elements
(R, L and C)
3 Verification of network theorms
4 Time and Frequency response of RC, RLcircuits.
5 Some electronic components and their
charactersticks: diode, zener diode, LED,
photodetector, microphone
6 DC power supply
7 Bipolar junction transistor (BJT) circuits
8 Voltage amplifiers using operationalamplifiers
9 Waveshaping and waveform generation
using Op-amps
10 Basic combinatorial circuits
11 Logic design using multiplexers and basic
sequential circuits
12 Synchronou