Intro to Cad Tools 2012

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    INTRODUCTION TO CAD TOOLS

    EE 4325 / 6325 VLSI DESIGN

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    Outline

    • VLSI design flow• Basics of UNIX / Linux

    • CADENCE• HSPICE

    – WAVEFORM VIEWER

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    VLSI Design Flow

    DESIGNIMPLEMENTATION & SYNTHESIS

    Verilog/Vhdl simulatorSynopsys DesignVision

    STANDARD CELL LIBRARY DESIGNCadence/synopsys

    AUTOMATIC PLACE AND ROUTE

    Encounter

    DESIGN VERIFICATIONHspice/NCX/PrimeTime

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    STANDARD CELL LIBRARY DESIG

    Design Flow for A Cell• Create Views (by Cadence)

    – Schematic View – Layout View (DRC/LVS/PEX) – Symbol View – Abstract View

    • Simulation (by Synopsys Hspice)

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    UNIX / Linux commands I

    File Commands• ls – list contents of the directory• ls -al – formatted listing with hidden files• cd - change directory todir• cd – change to home• pwd – show current working directory• mkdir – create a directorydir• rm –f – delete file• cp file1 file2 – copy file1to file2• cp -r dir1 dir2 – copy dir1to dir2 ; create dir2 if it doesn't exist• mv file1 file2 – rename or movefile1to file2iffile2is an existing directory, movesfile1into

    directoryfile2

    Process Management• ps – display your currently active processes• Kill %%-- Kills the current process• kill pid – kill process id pid• killall proc – kill all processes named proc *• bg – lists stopped or background jobs; resume a stopped job in the background

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    UNIX / Linux commands II

    Shortcuts• Ctrl+C – halts the current command• Ctrl+Z – stops the current command, resume with• fg in the foreground orbg in the background• Ctrl+D – log out of current session, similar toexit• Ctrl+W – erases one word in the current line• Ctrl+U – erases the whole line• Ctrl+R – type to bring up a recent command• !! - repeats the last command• exit – log out of current session

    Help for all the commands can be obtained on the terminal using• man

    Servers you can use for VLSI – Apache, Jupiter

    Please go to TA’s tutorial website for learning UNIX / Linux

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    MOS Transistors

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    Side View of Transistors

    Image Source: Apple Computer www.apple.com

    • What they really look like -a 130nm transistor from the IBM G5 processor:

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    TOP View of Transistors

    S

    NMOS

    D S

    PMOS

    D

    N-well

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    Cadence – Layer Selection Window (LSW)

    Active layer

    Instances / Pins selectable

    Visibility & selection controls for all layers AV: All layers visible & selectableNV: All layers invisible & unselectable AS: All visible layers selectableNS: All visible layers unselectableNote: invisible layers are always unselecable

    Layer listClick with LEFT mouse button to select the layer asthe ACTIVE layerClick with MIDDLE mouse button to switchVISIBILITY of the layerClick with RIGHT mouse button to switchSELECTABILITY of the layer

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    IBM 130nm Design Rules

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    Design Rule Check (DRC) Errors

    Error showing that the minimum space between two adjacent M1 layers should be>=0/16um

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    Layout Versus Schematic (LVS) Errors I

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    Layout Versus Schematic (LVS) Errors II

    Alternatively, you can go to "View->LVS Error Report (Current Cell)" to bring up the net list of errorsand then you can select the names to highlight the mismatches on both the schematics and layout.

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    Pitch Size (IO Pin Spacing)

    0.48um

    For our project design, in the cell library design, the distance between pins should be0.48 n (n=1, 2, 3…) um. And the distance between the GRLogic and its adjacent pin should be0.24+0.48*n (n=0, 1, 2, 3…) um.

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    Cadence Shortcuts I Key Function

    Display/View/Zoomz Zoom in (box)

    Ctrl-z Zoom in by 2

    Shift-z Zoom out by 2

    f Fit in window

    Ctrl-r Redraw

    k Create ruler

    Shift-k Delete all rulers

    Create

    r Create rectangle

    p Create path

    Shift-p Create polygon

    l Create label

    i Create instance

    Ctrl-p Create pin

    Key Function

    EditF4 Switch selection mode (Full/Partial)

    u Undo

    Shift-u Redo

    m Move

    s Stretch

    c Copy

    Shift-r Rotate

    del Delete

    q Properties

    Ctrl-a Select all

    Ctrl-d Select none

    Hierarchy

    Shift-x Descend into cell (new window)

    x Descend into cell (edit in place)

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    Cadence Shortcuts II

    Please go to TA’s tutorial website for learning Cadence Tools • Inverter layout tutorial• Layout tips for IBM 130nm technology• DRC, LVS and PEX(parasitic extraction)

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    HSPICE

    TO RUN HSPICE:1. Source

    . /proj/cad/startup/profile.synopsys

    2. Type: hspice

    3. Youcan check the output log if there’s any warning orerror. After it said " jobconcluded ", your simulation waveform result is stored inspi_file_name.tr0

    4. If there are no errors then the outputs can be viewed by waveform viewers.

    5. Use Cosmoscope or waveviewer to view the waveforms by typingscope& or wv &

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    HSPICE Example I

    * first line must be a comment or empty line

    * HSPICE is case in-sensitive and will convert all to lower case and so inv.sp == INV.sp* Transistor model file.include“/home/cad/kits/IBM_CMRF8SFLM013/IBM_PDK/cmrf8sf/relLM/HSPICE/models/model013.lib_inc“

    .include inv.sp * the netlist for INV gate.

    .OPTIONS POST = 1Xinv in out inv *INV gate with input (in) output (out) (Please follow the port order in inv.sp) .param VDD = 1.2V * Parameter definitions vdd! vdd! gnd 1.2V * Power supplies Vin in GND PWL (0ns VDD 4ns VDD 4.5ns 0 8ns 0 8.5n VDD )* input voltage source.tran 10ps 10ns * Run the transient simulations for 10ns with a step size of 10ps* Propagation Delay Measurements.measure tran Tphl_out trig v(in) val='VDD/2' rise=1 + targ v(out) val='VDD/2' fall=1.measure tran Tplh_out trig v(in) val='VDD/2' fall=1 + targ v(out) val='VDD/2' rise=1* Average Power Measurement.measure tran AvgPower avg p(VVdd).END

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    HSPICE Vector Input Example I

    * The vector file that has the inputs in a digital format. The file name is case in-sensitive.

    ; VECTOR PATTERN DEFINITIONS; Radix -- number of bits associated with each vector (e.g. 1 4 => one 1-bit and one 4-bit vectors); Vname -- name of each vector; IO -- determines inputs, outputs or bidirectional; Tunit -- indicates time unit for the tabular data

    ; Period -- Used for periodic data to define period for one vector; Trise -- Rise time for signals; Tfall -- Fall time for signals; Vih -- Logic "1" voltage (VDD is defined in the netlist); Vol -- Logic "0" voltage;===========================================================; DEFINING TABULAR DATA; Tabular data is provided in chronological order. In this example since "Period" is defined, the first; column corresponding to"time“ is not needed. However, for non-periodic tabular data "time" is; needed in the first column. If outputs are provided in the tabular data, then Hspice will compare the; actual and expected outputs

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    HSPICE Vector Input Example II ;======================== Example ======================================

    .VEC Nand2.vecRadix 1 1 * number of bits associated with each vectorVname NAND2_A NAND2_B * name of each vector IO I I * inputs, outputs or bidirectional

    Tunit ns * time unit for the tabular data Period 10 * period for one vector Trise 0.1 * Rise timeTfall 0.1 * Fall timeVih VDD * Logic "1" voltage

    Vil 0.0 * Logic “0"voltage* Tabular data00

    01

    10

    11

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    HSPICE Waveform Viewers

    Available viewers:• WaveView• CosmosScope

    Please go to TA’s tutorial website for using Waveform Viewers