Integral University, Lucknow

M.Tech (Electronics Circuit & System) Part Time I Semester S.No Code Subject Periods Evaluation L T P Sessional Examination Total

Subject 1 GEC 102 VLSI Devices & Circuits 3 1 0 50 100 150 2 GEC 103 Microelectronics & Technology 3 1 0 50 100 150 Total 6 2 0 100 200 300 II Semester S.No Code Subject Periods Evaluation L T P Sessional Examination Total

Subject 1 GEC 101 Semiconductor Device Modeling

& circuits simulation 3 1 0 50 100 150

2 GEC 104 Advanced Mathematics 3 1 0 50 100 150 3 GEC 151 Device Modeling & Circuit

Simulation Lab 0 0 3 50 50 100

Total 6 2 0 150 250 400 III Semester S.No Code Subject Periods Evaluation L T P Sessional Examinatio

n Total

Subject 1 GEC 201 VLSI Design 3 1 0 50 100 150 2 GEC 202 Analog MOS Circuits 3 1 0 50 100 150 Total 6 2 0 100 200 300 IV Semester S.No Code Subject Periods Evaluation L T P Sessional Examination Total

Subject 1 GEC 203 ASIC Design & FPGA 3 1 0 50 100 150 2 GEC 204 Fault Modeling & Testing of

Electronics Circuits 3 1 0 50 100 150

3 GEC 251 VLSI Design Lab 0 0 3 50 50 100 Total 6 2 0 150 250 400

V Semester S.No Code Subject Periods Evaluation L T P Sessional Examination Total

Subject 1 GEC 301 Elctive-I (Advanced D.S.P.) 3 1 0 50 100 150 2 GEC 302 Elctive-II (Current Mode VLSI) 3 1 0 50 100 150 3 GEC 303 Seminar 3 - - 50 50 4 GEC 351 Project/M.Tech. -

- 6 100 - 100

Total 9 2 6 250 200 450

VI Semester S.No Code Subject Periods Evaluation L T P Sessional Examination Total

Subject 1 GEC 451 Project/M.Tech. -

- 12 200 200 400

Total - - 12 200 200 400

Grand Total =2250

GEC-101 Semiconductor Device Modeling and Circuit Simulation

L T P 3 1 3

Unit 1:

Compound semiconductors, Lattice structures, Carrier drift, Direct and indirect semiconductors Scattering, Recombination, Mean life time, Continuity equation

8

Unit 2:

PN junction characteristics, Current components in diode, Equivalent circuits of diode, BJT characteristics, Second order effects in BJT: Thermal runaway, Base width modulation, Kirk effect, Band gap narrowing, Small signal analysis.

7

Unit 3:

Eber’s moll model, Hybrid pi model, Figure of merit, approximate model and complete equivalent model of BJT, Charge control model, Gummel poon model, SPICE model of BJT, Simulation of BJT 9

Unit 4:

N-channel, P-channel MOS characteristics and features, Enhancement and depletion mode: second order effects of MOS: Body effect, Channel length modulation, Subthreshold conduction, DIBL, Hot carrier effect, Mobility degradation, Velocity saturation, CMOS latch up, MOS parasitic capacitances and resistances. 8

Unit 5:

Circuits models for MOSFET: small signal, SPICE models, BSIM model, Simulation and Layout design DC, AC and Transient analysis of linear and non linear circuits, logic and timing simulations 8

Text Books:

1. Baker, Li, Boyce “ CMOS Layout, Design and simulation”, PHI publication 2. Rabaey Jan M, Chandrakasan Anantha, Nikolic Borivoje “ Digital Integrated Circuits” PHI publication 3. Kanno Kannan “ Semiconductor Devices and Physics” Wiley publication 4. Sze S.M. “ Semiconductor Physics” MacGraw Hill publication

Reference Books:

1. Millman, Halkias “ Electronic Devices and Circuits” TMH publication 2. Kamins Muller “ Device Electronics for Integrated Circuis” Wiley publication

VLSI Devices and Circuits (GEC-102) L T P

Unit 1: 3 1 0

Properties of digital systems, regenerative property, NMOS, PMOS, pull up and pull down networks, strong 1 and strong 0, NAND/NOR, EX-OR, Decoder, MUX,Micron and Sub-micron devices: Scaling, Short channel effects 8

Unit 2:

Standard CMOS circuits, Pseudo NMOS, Pass Transistor Logic (PTL), types of PTL, advantages and disadvantages of PTL, Level restorer, Transmission gate Adder/ Substractor, Design of Combinational circuits and Sizing of MOSFETs

8

Unite 3:

Dynamic CMOS and Domino CMOS, Complex gates, Sequential Circuits: Latches & Flip-flops, Problems of race, race around and 1’s catching

7

Unit 4:

Standard cells, Circuit implementation using PAL and PLA, FPGA, Look up tables (LUTs), Importance of FPGA 8

Unit 5:

RAM, ROM, basic cells of SRAM and DRAM, 6T RAM, 3T RAM, 1T RAM, GaAs MESFET, its characteristics and applications, Bi-CMOS: features, inverter, conventional and full swing BiCMOS circuits 9

Text books:

1. Rabaey Jan M, Chandrakasan Anantha, Nikolic Borivoje “ Digital Integrated Circuits” PHI publication 2. Hodges, Jackson, Saleh “ Analysis and Design of Digital Integrated Circuits” McGraw Hill publication 3. Kang Sung-Mo, Leblebici Yusuf “CMOS Digital Integrated Circuits” Tata McGraw Hill publication

Reference Books:

1. Sedra ,Smith “ Microelectronic Circuits” Oxford Publication 2. Islam S.S “Semiconductor Devices and Physics” Oxford Publication

Microelectronics Technology (GEC-103)

L T P 3 1 0

Unit 1 Introduction: Basic structure of BJT, NMOS, CMOS, BiCMOS Devices Crystal Growth & Silicon wafer preparation: Introduction, Structure of Semiconductor, Electron- Grade Silicon, CZ Crystal Growth, Silicon Shaping, Processing considerations Epitaxy: Introduction, Vapour-Phase Epitaxy, Molecular beam Epitaxy, Silicon on Insulator, Epitaxial Evaluation 8 Unit 2 Oxidation: Introduction, Growth Mechanism and Kinetics, Thin oxidation, Oxidation Technique and System, Oxidation Properties, Redistribution of Dopants at interface, Oxidation of Polysilicon, Oxidation Induced Defects. Dielectrics and Polysilicon Film Deposition: Introduction, Deposition Process, Polysilicon, Silicon Dioxide, Silicon Nitride, Plasma Assisted Deposition.

9 Unit 3 Lithography: Introduction, Optical Lithography, Electron Lithography, X-ray Lithography, Ion Lithography Etching: Wet and Dry Chemical Etching, Reactive Plasma Etching Diffusion: Introduction, Model of diffusion, in solid, Diffusivities of B, P, As and Sb, Measurement Techniques 8 Unit 4 Ion Implantation: Introduction, Range Theory (Jon Stopping, Range Distribution, Damages, Channeling), Annealing, Shallow Junction, High Energy Implantation. Metallization: Chemical Vapour Deposition (CVD), Physical Vapour Deposition (PVD), Evaporation technique, sputtering technique.

8 Unit 5 Fabrication steps of IC: Bipolar IC, MOS IC, BiCMOS IC, Fault Detection and Characterization Technique 7 Text Books

1. SZE S M (SE) “VLSI Technology”, Mc Graw Hill International 2. Gandhi S,“VLSI fabrication principles” ,Wiley Publication

Reference Books

1. Campbell S A, “The Science and Engineering of Microelectronics fabrication” Oxford University press 2. Geiger Randall L, Allen Phillip E, Stader Noel R, “VLSI Design Technique for Analog and Digital Circuits”,

Mc Graw Hill International

VLSI Design (GEC-201)

L T P

3 1 0

Unit I Traditional CMOS Design: System approach to VLSI design. Pseudo NMOS logic, Transistor equivalency,

CMOS logic and Gate design, Transmission Gate logic design, Delay of MOS circuits, Basics of Low Power

Design, Layout design rules and stick diagram.

7 Unit II Advance CMOS Logic Design: Domino CMOS logic, NORA CMOS logic, Single Phase Dynamic logic,

Differential CMOS, Dynamic Differential Logic, Design of Adders/Subtractor and

Multiplexers/Decoder/Encoder/Multiplier.

8

Unit III Sequential Circuit Design: Synchronous and Asynchronous Systems, CMOS clock Latches, D,SR,JK,T Flip

Flops, CMOS flip flop design, Synchronous design Techniques, Mely and Moore Machines, FSM design, Design

of MOS SRAM, DRAM,CMOS PROMs, EPROMs, EEPROMs and Flash Memories.

9 Unit IV Bipolar and BiCMOS logic Gate: Emitter coupled logic gate, Current mode logic, BiCMOS logic gate,

Alternatives BiCMOS approaches and circuits

Gallium Arsenide Digital Circuits: MESFET second order effects, Logic design with MESFET, Capacitively

enhanced logic and Heterojunction Bipolar Technology.

9

Unit V Design of Programmable modules: Standard cells, PLA, PAL, PLDs, FPGA, Fused based FPGA, Mixed

Analog/Digital System design, Implementation using Verilog HDL/VHDL.

7

Text Books:

1. Jan.M.Rabaey, Anitha Chandrakasan, Borivoje Nikolic, "Digital Integrated Circuits", PHI, Second Edition

2. Neil H.E Weste, Kamran Eshraghian, "Principles of CMOS VLSI Design", 2nd Edition, Pearson, 1998

3. Ken Martin “Digital Integrated Circuit Design” Oxford Indian edition

4. Sung-Mo Kang, Yusuf Leblebici, "CMOS Digital IC- Analysis and Design", 3rd Edition, TMH

Reference Books:

1. Douglas A Pucknell, Kamaran Eshragian, “ Basic VLSI design”, 3rd edition, PHI, 1994.

2. Wayne Wolf “Modern VLSI Design” 2nd Edition Prentice Hall 1998.

Analog MOS Circuits (GEC-202)

L T P

Unit I 3 1 0

Single Stage MOS Amplifiers: Common source stage with resistive load, Diode connected load and Source degeneration, Source follower, Common gate stage, Cascode stage

Differential Amplifiers: Quantitative and qualitative analysis of basic differential amplifier, Common mode response, Differential pair with MOS Loads

8

Unit II

MOS Current Mirrors: Basic current mirrors, Cascode current mirrors, Active current mirrors

Frequency Response of Amplifiers: Miller effect, Poles and zeroes, Analysis of CS, CD, CG stage, Cascode stage and Differential pair

8

Unit III

Noise: Statistical Characteristics of Noise, Thermal noise, Flicker noise, Representation of noise in circuits, Noise in CS, CD, CG stage, Cascode stage and Differential pair

Feedback: Properties of Feedback, Feedback topologies, Effect of loading in Feedback, Effect of feedback on noise 8

Unit IV

Oscillators: Oscillation criterion, Ring Oscillators, LC oscillators, Voltage controlled oscillators

Phase-Locked Loop: Simple PLL, Charge-Pump PLL, Delay locked loop

7

Unit V

Operational Amplifiers: Performance parameters, One stage and two stage OpAmps, Gain boosting, Common mode feedback, Slew rate, Power supply rejection, Noise in OpAmp, Stability and Frequency compensation in OpAmp

Switched Capacitor Circuits: MOS as a switch, Different switched capacitors circuits, Applications as Amplifiers, Filters, Integrators and ADC/DAC

9

Text Book:

Razavi Behzad ”Design of analog CMOS Integrated Circuits” Tata McGraw-Hill Edition,2002

Reference Book:

Gregorian R , Temes G.C. ”Analog MOS Integrated Circuits for Signal Processing” J. Wiley & Sons,1986

Fault Modeling and Testing of Electronic Circuits (GEC-204)

LTP 3 1 0

Unit-1 Fundamentals of silicon crystal structures, orientation planes and their effects, nature and effects of impurities like carbon, oxygen etc., Parametric problems and effects in fabrication, circuit sensitivities 8

Unit-2 Yield, Yield loss, failure and models of failure analysis, Gate level testing’s and their fault models, chip level testing and their fault models

8

Unit-3 Introduction to five valued logic, truth table generation of standard gates, Boolean algebra, its use and testing, Stuck-at faults

8

Unit-4 CMOS test methods, Functionality and manufacturing test principles, ATPG, Fault grading, delay fault testing, Statical fault analysis design strategies

8

Unit-5 Functional testing, Adhoc scan based testing, self testing and IDDQ Testing, Chip level & system level testing examples 8

Text Books:

1. Lala P.K.”Fault Tolerant and Fault Testable Hardware Design” BS Publication 2. Sze S.M. “VLSI Technology” TMH Publication 3. Weste Neil H.E., Eshraghian Kamran “Principle of CMOS VLSI Design” 2nd ed Pearson 4. Hurst Stanley Leonard “VLSI Testing” IEEE Circuits and Devices Series

Advance Digital Signal Processing (GEC-301) L T P 3 1 0

Unit 1

Discrete time signals and systems, Characterization & Classification of signals, Time domain characterization of

LTI Discrete –Time systems, Discrete –Time Fourier Transform, Discrete Fourier Transform, Fast Fourier

Transform, Z-Transform .

8

Unit 2 Design of IIR filters from Analog filters: Approximation of derivatives, Design of IIR filter using impulse invariance

technique, Design of IIR filter using bilinear transformation, matched z-transform.

Realization of Digital Filters: Direct form I and II realization, signal flow graph, Cascade form and Parallel form

structure.

8

Unit 3 Design of FIR Filters using windows: Rectangular window, Triangular window, Hanning window, Hamming

window, Blackman window and Kaiser window .

Realization of FIR Filters: Transversal structure, Linear phase realization and Polyphase realization of FIR filter.

8

Unit 4 Multirate Signal Processing: Introduction Down Sampling, Spectrum of the Down Sampled Signal, Upsampling,

Spectrum of the Up-sampled, Transversal Structure for Decimator and Interpolator, Multistage Implementation of

Sampling Rate Conversion.

8

Unit 5 Statistical Digital Signal Processing: Introduction,Statistical Properties of Random Signal, mean, mean square,

variance, autocorrelation of random process, autocovariance of random process, Crosscorrelation of random

processes and Crosscovariance of random processes, Power Density Spectrum.

8

Reference Books:

1. Sanjit K.Mitra,’’Application DSP a Computer based approach’’,TMH

2. Allan Y.Oppenhem & Ronald W.Schater,’’Digital Signal Processing’’,PHI

3. S.Salivahanan,A.Vallavaraj & C.Gnanapriya,’’Digital Signal Processing,TMH

Current Mode VLSI Circuits & Applications (GEC-302)

(Elective-II)

L T P 3 1 0

Unit I

Voltage Mode/Current Mode Overview: Comparison of Digital & Analog principles & systems, Voltage Mode /Current

Mode circuit principles,Comparison, Advantages of current mode circuits, BJT, MOSFET and their analog models,

power and fT considerations.

7

Unit II

Current mode operations: Current Mirror, Its Types(Simple cascade, high swing, regulated) and thier performances,

Translinear principle in BJT and MOS (Subthreshold and ohmic regions), Analog switches, Differential pair and its

DC/AC characteristics, Logic function realization & latches, Multipliers.

8

Unit III

Transcondutance Amplifiers: Differential pair gm cell, fixed gain gm cell, linearized gain gm cell, multiple differential pair

gm cell, CMOS gm cell, Ohmic transistor gm cell, fixed and variable bias gm cells, Active transistor gm cell, OTA

structures and its applications.

8

Unit IV

Current conveyors(CC): Classification and generations of CCs, characteristic features, CC as analog building block,

design considerations with CC, circuit realization of CC’s, Translinear CC, I order BJT CCI, class AB CCI, CMOS CCI,

CMOS CCII, differential pair based CC cells, ±CC circuits, MOCC, multi-X/multi-Y CCs, CCIII realization, UCC,

GCC, Fully differential CMOS CCII, CC applications.

9

Unit V

Switched current techniques and applications: Switched capacitor and switched current techniques, switched current (SI)

principle, SI building blocks: Switch, Current copier, Current comparator, I and II order integrators, Bilinear integrator,

Memory cell, Multiplier applications.

8

Text Books:

1. Liu, Kramer,Indeveri,Delbruck,Douglas“Analog VLSI: Circuits and Principles”, Pearson, Education India

2. Ananda Mohan “Current Mode VLSI Analog Filters” Springer, Anne Books, India

3. Giuseppe Ferri, Nicola Carlo Guerrini “Low-voltage low-power CMOS current conveyors” Springer

Reference Books

1. M Ismail and Terri Fiez “Analog VLSI: Signal and Information Processing” McGraw Hill.

2. R.J.Baker “CMOS: Circuit Design, Layout, and Simulation” 3rd Ed, Wiley, IEEE Press

3. C.toumazou, F.J.Lidgey, D.G.Haigh“Analog IC design: the current mode approach” IEE circuits and systems

series-2

4. Edgar Sánchez-Sinencio, Andreas G. Andreou “Low-voltage/low-power integrated circuits and systems: low-

voltage mixed-signal circuits” IEEE Solid-State Circuits Society