Innovation PCB (INNO PCB) Schematic Design for Excellence ...

Confidential. Not to be reproduced. ©2021 Music Tribe Global Brands Ltd. All rights reserved.

We Empower. You Create.

FACE-CI-PH1_Template_Guidelines_2021-07-12_Rev.0

Innovation PCB (INNO PCB)Schematic Design for Excellence (DFx)

Guidelines

Confidential. Not to be reproduced. ©2021 Music Tribe Global Brands Ltd. All rights reserved. 2

Table of Contents

R&R (Roles and Responsibilities)

Why, Who, How

What

Objective

Scope

Terms and Definition

Ownership

Applicable Documents

Component Selection

Schematic Creation

Schematic Directives

Safety and Mechanical Requirements

Adding Special Instructions

Checking and Finalizing

Appendix – Variant Guidelines

4

5

6

6

6

8

8

9

11

29

34

37

42

46



Confidential. Not to be reproduced.

Why (Why Do We Exist?)

*Obsession = The domination of one’s thoughts or feelings by a persistent idea, image or desire.

©2021 Music Tribe Global Brands Ltd. All rights reserved.

We Empower. You Create.We at Music Tribe believe that our sole purpose is to empower you to become the most creative you can be.

We believe in obsessively* empowering you through our Brand Tribes – Midas, Klark Teknik, Lab Gruppen, Lake, Tannoy, Turbosound, TC Electronic, TC Helicon, Behringer, Aston Microphones, Bugera and Coolaudio.

Empowering you to create and receive appreciation is the key to our happiness.

That’s why we exist.

Uli Behringer

3


Why, Who

R&R (Roles and Responsibilities)

Members The Triber(s) who actually carries out the work and takes full responsibility for his/her respective area

INNO PCBINNO SYST

Owner The Triber(s) who makes the final decision and has the ultimate authority

INNO PCB: Chyll Amarille

Customer The Division and its representative who we deliver the service for

Music Tribe: Uli Behringer


Why, Who, How

Why (Why Do We Exist?)

Our Innovation Tribe Purpose

We at INNO PCB believe that delivering life-changing PCB Engineering through self-service tools related to Schematic Design,will empower our Customers as well as Music Tribe.

We further believe that relentlessly and consistently measuring and improving our services, will lead to appreciation and Customer Advocacy.

Who (Who Are Our Customers We Obsessively Serve?)

• Customers

• Music Tribe

How (How Do We Serve Our Customers?)

• Objective

• Scope

• Terms and Definition

• Ownership

• Applicable Documents

• Component Selection

• Schematic Creation

• Schematic Directives

• Safety and Mechanical Requirements

• Adding Special Instructions

• Checking and Finalizing

• Appendix – Variant Guidelines


What (What Services Do We Deliver to Our Customers?)

Objective

The objective of this document is to define rules and guidelines for creating schematics in the Altium Software across the Music Tribe community. Modifications or deviation to these guidelines are acceptable but must be properly coordinated with the responsible department or groups as follows:

• INNO SYST – For circuit concerns

• INNO PCB – For layout concerns

Scope

This guideline applies to all schematic designs produced by Music Tribe using the Altium Designer Tool.


1. Design for Excellence (DFx) – In Engineering, refers to design for all desirable attributes (Design for Manufacturing, Design for Assembly, Design for Test, etc.).

2. Library Parts Request (LPR) – A request process where a non-vault component will be added in the MT vault.

3. Electrical Rules Check (ERC) – Are sets of checks to validate the circuit to ensure no violations are present.

4. Starpoint Topology – Connections from different modules are connected to one point, just like a multi-pointed star.

5. Design Directives – Are objects that are placed on the schematic during design capture, providing a way of specifying instructions to be passed to the PCB designer.

6. Connection Matrix – Presentation of all possible wiring connection checks between combinations of pins, ports, and sheet entries, as well as testing for unconnected entities.




7. End of Life (EOL) – Is a product at the end of the product lifecycle, indicating that the product is at the end of its useful life. When a device reaches EOL status, the company ends official support, no longer providing technical help or repairs.

8. Hierarchical Design – Or block design, is where different schematic designs are represented by block symbols on the top sheet of the main design.

9. FFC – Refers to any type of electrical cable which is flexible and flat. It consist of multiple flat conductors insulated with a flexible plastic film that is laid out with straight conductors.

10. FPC – Flexible Printed Circuit. Flexible and foldable printed circuits that consist of a layer or multiple layers of copper traces with a polyester base layer. FPCs can have electronic components mounted to its traces and have overlapping traces.

11. Altium Variants – The Variants feature, as the name implies, creates variations of the original, or “base,” PCB design. Once this base design has been established, Variants are established in the variant manager by configuring the board components.

12. Multi-Partition Components – A symbol divided into two or more symbols to show much simpler representation of the component especially for high-pin count parts.

13. Refdes – Shortcut for reference designator. The reference designator usually consists of one or two letters followed by a number.



Ownership

It shall be the responsibility of INNO PCB to ensure that this specification always reflects current practices and requirements.

Applicable Documents

• Altium Learning Guides

• Hierarchical Design Guidelines

• INNO SYST Altium Guidelines

• INNO Compliance Global

https://library.musictribe.com/library/academy/INNO?file=1057&div=9



Component Selection

• Use components that are available in the MT Vault only. If the part is not present, request it to be added through the LPR process

• Do not use obsolete components. This will ensure that all parts will be readily available from the market during assembly. If EOL is known, use the part with longest life span available

• Prioritize using 0402 packages for chip components as a default size. This is now the most extensively used passive chip size inelectronic industries. This is also the most widely available package in the market

Imperial

Size

Metric

Resistor Case Code

Approx.Length

(in)

Approx.Width

(in)

Power(W)

Resistor Case Code

Approx.Length(mm)

Approx.Width(mm)

Power(W)

01005 0.016 0.008 0.031 0402 0.4 0.2 0.031

0201 0.02 0.010.03 1/20(0.05) 0603 0.6 0.3 1/20

(0.05)

0402 0.04 0.02 1/16(0.062) 1005 1.0 0.5 1/16

(0.062)

0603 0.06 0.03 1/10(0.10) 1608 1.6 0.8 1/10

(0.10)

0805 0.08 0.05 1/8(0.125) 2012 2.0 1.25 1/8

(0.125)

1206 0.125 0.06 1/4(0.25) 3216 3.2 1.6 1/4

(0.25)



Component Selection

• In selecting the type of connectors, consider the applications below:

‒ Power Circuits – Use through-hole hole type connectors especially for high power rating designs

‒ Data Circuits – Use surface mount devices (SMD) like FFC/FPC types

‒ SMD type connectors are preferred especially for connections that will not require unmounting

• Place functional Test Points (TPs) for Debug areas or wherever applicable. TPs usual pad diameter sizes are between 1 mm – 1.5 mm (40 mils - 60 mils). But for BGA ICs that will require access points, smaller sized TPs can be used, and the size will be determined by the SYSTEMS engineer and PCB designer depending on the space availability


Schematic Creation

• During schematic creation, it is recommended to use the hierarchical way of schematic design especially when there are multi-channels or digital blocks with many bus connections. Take note that only schematic pages with electrical signals can haveschematic blocks. This will ensure compliance with IRIS (International Repair Information System) requirements

• For simple circuits (3 pages and below) – A flat schematic can be used

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Schematic Blocks

Schematic Circuits


Schematic Creation

• All schematics are required to have at least 1 variant. Please refer to Appendix about Variants step-by-step guide as well as other things to note about variant creation

• It is preferred that the number of schematic pages is as few as possible. Compress the circuits and utilize free spaces in your schematic sheets

• Each page of the schematic diagram is as clear as possible while being as compact as possible. Below are some preferred itemsduring schematic creation:

‒ The schematic diagram is placed on the left side (top-most)

‒ Observe overall horizontal and vertical alignment for modules and component

• Draw the schematic neatly to make it easy to read. It is recommended to avoid unnecessary long and overlapping lines. Utilize Ports, Net Labels and Offsheet Connectors for this purpose while maintaining the intended connectivity. It is the circuit designer’s prerogative which signals needs to be physically wired and which ones to utilize these – maybe due to signal criticality

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Schematic Creation

Port – Used to make an electrical connection between one schematic sheet and another sheet, or sheet symbol in a design using multiple sheets. Using a port is recommended to make connections from one hierarchical block to another. In a hierarchical design, use one port per signal per hierarchical block to avoid errors (two identical port in a hierarchical block) in a schematic.

Altium Schematic Ports

Use the Altium’s default color settings for the PORT symbol. Font will be Calibri; text size will be 8 and will be aligned to the left.



Schematic Creation

Net Labels – Or net identifiers, allow the user to connect signals on the same schematic sheet. Net labels are preferred instead of unnecessarily long and/or crossing lines.

• It is recommended to add net labels to all remaining signals (signals that do not have either port, net label or offsheet connectors). This will ease debugging the board later since it will be easier to search a particular net name. If it is not possible due to an overcrowded schematic, at least apply this on critical signals only

Net labels

Net names will contain only upper-case letters, numbers, decimal points and underscore characters. It should be descriptive of their function (e.g. MAC_I2C_SDA instead of just M_PB27). In areas where only generic signal names were applied, a note describing thefunction must be provided (M_PB27 => MAC_I2C_SDA).



Schematic Creation

• Font will be Calibri and text size will vary from 7-10 depending on the density of the schematic circuits. Make sure to use only 1 size throughout the schematic

• Special Characters to be avoided are: ~ ! @ # $ % ^ & * ( ) ? | : ; / \ [ ] { } < >

• No blank spaces between texts

Offsheet Connector – Used to connect points/nodes across schematic sheets. This is often used in flat schematic designs.

Altium Offsheet Connectors


Schematic Creation

• For Power signals, utilize the default Altium symbols to denote them. For other supply signals not available in the default menu, edit the text to have a customized value

16


• Same with Ground symbols, make sure to use the Altium default symbols – do not use a signal name. Below are some of the recommended symbols that can be used. You can rename any of these ground for special or other type of Ground (like BGND, PGND, etc.)

Preferred GND symbol to use

• For uniformity purposes, use Text Style and Font size below for all components including the Power and GND symbols. This must beapplied to old library components as well that are not yet following these text formats

Text Style = Calibri Text Size = 10



Schematic Creation

• Directions of positive supplies are always pointing up while negative supplies and ground symbol directions are pointing down

• Consequently, positive supplies must always be on the left side while negative supplies are always placed on the right side

• In cases where multiple grounds are used then they will need to merge on some point – there are multiple ways to connect them like using zero-ohm resistors, jumper wires, etc. Final decision on which to use will be reliant on the Systems engineer since this will depend on board application and the criticality of the circuit



Schematic Creation

• Just like in PCBs, place critical components as near as possible to where it should connect. Like ESD part/components that are near the ingress. Other examples below:

‒ Chip components for bypass caps

‒ Chip components that act as termination resistors

‒ Crystal component

‒ Thermistors

• In cases where space is not enough to place them all in the same page, additional notes and instructions maybe necessary to convey this requirement to the PCB designer



Schematic Creation

• Follow the standard grid when placing components and adding wires (100 mils only). Take note that ERC will not capture errors of OFF-GRID components and wires

• Make sure to attach the line properly to avoid unconnected traces. Align the schematic objects whenever possible

• Avoid doing 4-way junction connections – offset the other two traces instead. To achieve this, go to preferences and tick the box for “Convert Cross-Junctions” under Schematic > General options



Schematic Creation

• For “one-grid-point” requirements, see guidelines below:

‒ Line to Line – Preferred is a 2-point grid while a 1-point grid is accepted for lines coming out from the components

‒ Component to Component – A 4-point grid is preferred but a 3-point grid is also acceptable

‒ Nodes, ports, power and ground signals – 1-point grid

‒ Special consideration for wires with net labels – Provide a space such that the text will be readable will not overlap with other items such as refdes, values, nodes, etc.



Schematic Creation

• For reference designators, use the Altium Vault standards. MT Vault Libraries are already in-line with the standard reference designations (refer to page 22 for more details). Below are the preferred component texts orientations and placements:

‒ Horizontal Components – Texts directions go up

‒ Vertical Components – Texts directions go to the right

‒ Component refdes text is placed on the Left (vertical component) or above (horizontal component) the symbol

‒ Component values are placed on the Right (vertical component) or below (horizontal component) the symbol

• For space constraints (only for dense circuit), below is the recommended refdes and value placements. Refdes are placed on the left (horizontal components) or below (vertical components) while the value is place on the right (horizontal components) or upper part (vertical components). Make sure no overlapping of text and are readable



Schematic Creation

• Other component parameters can be shown depending on the requirement – Locate those parameters in clear areas making sure they are readable. Arrange them to follow the same orientation with that of the component

• For irregular components such as transistors – See below recommendations.

Note: Component refdes must always be placed above the value/PN.



Schematic Creation

• Refer to below table for the list of Component Type and their corresponding Designator

Designator Component Type

ASeparable assembly or sub-assembly (e.g. printed circuit assembly)

AT Attenuator or Isolator

BT Battery

C Capacitor

CN Capacitor Network

D Diode, Bridge Rectifier

DL Delay Line

DS Display, LED’s

F Fuse

FB Ferrite Bead

FD Fiducial

FL Filter

G Generator or Oscillator

GN General Network

H Hardware (e.g. screws, nuts, washers)

HK Circulator or Directional Coupler

JP Jumper (Link)

K Relay or contractor

L Inductor or coil or ferrite bead

LS Loudspeaker or buzzer

M Motor

MK Microphone

Designator Component Type

MPMechanical part (including screw and fasteners)

MOD Board Module

LOGO All Logos

PS Power Supply

Q Transistor (all types)

R Resistor

RN Resistor Network

RT Thermistor

RV Varistor

S Switch (all types, including buttons, encoders)

T Transformer

TC Thermocouple

TP Test Point

TUN Tuner

UIntegrated Circuit (IC) including Voltage Regulator (package dependent)

V Vacuum Table

VRVariable Resistor (potentiometer or rheostat), Fader, Trimmer

X All types of connector (Male and Female)

Y Crystal or Oscillator



Schematic Creation

• For multi-channel schematic – Use Board Level Annotation (e.g. C1A, C1B, C1C, etc.)



Schematic Creation

• Enable and properly show pin numbers/names of parts especially components with polarity (show unused pins also). For common parts like non-polarized chip components, basic transistor, diodes, etc., it will be the discretion of the circuit owner if needed

• Pin Numbers for multi-partition components “must” be shown to avoid duplication and wrongly used channel



Schematic Creation

• For uniformity purposes, schematic wire color will be red

‒ Hex Color Code (#FF0000)

‒ RGB: 255_0_0

• To set red as the default color for all the wires, go to Preferences and edit there. This will become your default color for allschematic projects moving forward. See below:



Schematic Creation

• If there is Starpoint Topology Requirement, it should be implemented in the schematic entry where all nodes meet at a certain area. This is an exception from using offsheet, ports or signal names. This will prompt the PCB layout designer on how to deal with the signal during PCB design

• In cases where space will not permit to draw this type of connection (some of the connecting lines are in the other pages), a note can be placed beside the signal stating it will connect to the Starpoint connection

Sample Starpoint Topology Connection



Schematic Creation

• Using Signal Harness – Used to group signals that are part of the same bus; usually signals with common functions. Using this function will help organize the wirings at the top-level schematic especially if those signals will be connected on multiple blocks later. Take note that the default color of the port for Signal Harness is different to distinguish them from the normal ports being used in the schematic




Adding directives is creating net classes and PCB rules from the schematics, conveying layout intent for the PCB and will serve as design layout requirements.

Below directives “must” be implemented in the schematic (whenever present in the circuit):

• Differential Pair – Depending on the application and final board layer, it is recommended that schematic owner to advise the impedance requirement. Due to Altium Software limitation and for this to be properly executed in the layout, _N and _P must be added at the end of the signal name. Follow below naming as standard rule:

B_Z100_PB_Z100_N




In addition, it is also recommended to set the impedance values in the Rules under the Parameter option with 10% tolerance (after board fabrication tolerance).

Use Zo as parameter name for impedance

Note: Add Net Class Name, this will instruct in the PCB layout in which class the differential pair belongs to especially if there aremultiple diff pairs with the same values.




Controlled Impedance for single-ended signal – same with the differential pair requirement, impedance requirement for the signalmust also be set in the directives by adding a parameter set. Follow below parameter set naming as a standard rule:

Set the impedance values as well in the Rules under the Parameter option with 10% tolerance (after board fabrication tolerance).

• Generic No ERC – This directive is an indication that a particular pin is not connected to any net. Use this for all unused pins in the schematic. This will eliminate ERC errors for unconnected pins

Use Zo as parameter name for impedance

B_Z100_P

B_Z100_N

BCM_Z75




• Trace thickness specification – Special trace widths not the same with the common traces throughout the board. This is applicable especially for High Voltage or High Current traces

• Trace width spacing – Required spacing needed; commonly implemented for noise sensitive signals




• Parameter Setting – Use this setting to define different rules to be implemented by the PCB designer to the layout. Below are all the rules that can be set

Parameter Set text can be edited to properly define the parameter being set.




• Indicate voltage region and specific gap requirement. Refer to INNO Compliance Global for EMC consideration and Power Schematic recommendation (page 153-154):





• Symbols can be used to indicate that a specific component shall be replaced only with the exact same component

• Protective earthing circuits shall not contain switches or fuses

• The fuse shall be placed after the AC socket and/or main switch before other parts (X and Y capacitor, and line filter, discharge resistors) and only placed on the L polarity

• One resistor needs to be added between the high voltage current and the pin of the IC opto-couple to limit the short circuit current, decrease the creepage distance and prevent the IC from bursting when the device short circuits




• For heatsink that will touch the PCB – Include the Mechanical Part number. Place it on the lower right corner of the schematic(as a note) indicating where it will specifically be used

• Board fiducial requirement – Minimum of 2 for small boards and maximum of 3 for medium and large boards (for 1-side only). Take note that during component placement, another set of fiducials can be added if components will also be placed on the other side of the board. Placed them on the last page of the schematic together with other non-critical items

• Quantity of mechanical support holes should be equal on Mechanical 3D Assembly file. Placed them on the last page of the schematic together with other non-critical items




• Add notes/text for instructions on critical items or special functions if there are any (on the same page where the instruction is being referred to). Below are some of the critical items that needs to be noted:

‒ Exposed Copper

‒ Antenna and RF Lines

‒ VCO, VCF and LFO layout requirements

‒ Placement prioritization notes for critical parts. This will give heads-up to designer on how to properly place the components in the layout

‒ Add details of reference board; eval board of the part (if available). This will give idea to the PCB Layout Engineer on how to properly apply it to the board

• Function names of Single turn/Multiturn trimmers

Text Style = CalibriText Size = 14

Function Name




• Part function names of fixed components shown in the PDI/MID must be properly and clearly indicated. This will serve as guide tothe designer how to place these fixed components later

Text Style = CalibriText Size = 18

• Follow the standard schematic naming convention, also making sure to complete the title block details (as per latest format)




• For schematic revisions, note the main changes (highlights only) in Altium version control

• Revision History Blocks Details:

Initial Revision (Rev A)

Succeeding Revisions (Rev B and up)

Where ECO number is in accordance with the revision.

Engineer Name will be spelled-out.




• P1 properties must be updated

‒ Add on the first function block page of the schematic (not the Title Block)

‒ Type will be Mechanical (which will be included in the BOM but not shown in the layout)

‒ PLM Number as well as Date Code entries are updated based on standard format




• Notes and Text Settings:

‒ Font Type: Calibri, All Capital Letters

‒ Text Size: All added texts must be readable and not overlapping any other texts, wires, etc. Size must be proportional to thespace available but use only one size all throughout the schematic

• Make sure to add notes and text as concise and precise as possible – Just enough to convey the instruction needed. Avoid adding too much information that may reveal intellectual property of the company

• Adding tables, pictures or snapshots can be done in Altium especially if this aids the end-user in better interpreting the schematic. Take note that this must be properly coordinated to the systems engineer if necessary

• For space constraints, it is recommended to dedicate a schematic page where the summary of all the Design Placement Notes andDesign Layout Instructions were listed




• Check the Item Manager

‒ No obsolete components

‒ All components under “Revision Status” should be “up to date”

‒ Make sure that all components of “From” status must all be “Music Tribe Vault”

Note: Revision Status, Lifecycle Status and From columns may not be included in the default view of the item manager so make sure to add them first.




• Validate the schematic – Ensure all errors are properly confirmed and cleared. Under the project options – Although there is already a default Altium setting for the Error Reporting Mode and Connection Matrix, it is strongly advisable to check and set them accordingly depending on the schematic needs. This will ensure that all critical checks are implemented on the schematic




• Check the Options Tab and make sure the “Allow Ports to Name Nets” button is ticked. This will ensure that signal name will get the Port net name and not a system generated signal name

• Compilation must be successful (like below) to further ensure no errors on the schematic are created. If warnings are present, make sure those items are thoroughly checked and remaining ones are valid warnings only




• Comparator results during PCB update must also detect no differences. The snapshot below shows a successful comparator result

• After all these checks are done, saved the latest file in MT Vault

• Then accomplished the Pre-layout Checklist. Use below link to access the updated Checklist:

(https://library.musictribe.com/library/academy/INNO?file=1027&div=9)





• Project Variants – To cater different product configurations using a single base design, variants are to be used. Variants enables the designer to configure each component from the design if it is to be fitted, not-fitted or replaced by compatible components in the design assembly files. If the design requires such flexibility, Altium Design variants should be implemented. See sample implementation below:

• Follow the steps on the next slides to create a variant of a project




Step 1: Once all components and connections are already entered in the schematic, go to Project>Variants to open the Variant Management window.

Note: It’s recommended to always use the Variant function if you wish some component to be existing in the PCB layout but will not be mounted in the Assembly (Not-Fitted or Do Not Populate) instead of manually editing the BOM output or changing any component parameters such as Agile PN to NOT REQUIRED. This is to avoid confusion in the design phase.




Step 2: Click Add Variant, enter the description then click ok. Make sure to check “Allow variation of fabrication outputs.”

Note: The variant description will be the Variant name and should follow the standard naming conventions for Projects since Variantoutputs will be considered as Project output as well. The first variant should always be the same as the project name.




Step 3: From the Variant Management window, select the components that you wish to modify by clicking the 3 dots as shown in the image below:




Step 4: In the Component Edit Variation tab, select the Variation kind.

Types of Variations:

• Fitted – the default state of a component before any variations are applied – if it is Fitted, then it is not varied. All components default to Fitted when a new variation is created in the Variant Management dialog which represents a Fitted component state as an empty cell





• Not Fitted - when a component is set to Not Fitted it still exists on the schematic and will be transferred to the PCB (so the footprint can be placed), but it is removed from the appropriate output documentation, such as the BOM. This is the same as Do Not Populate/Install. For Drawing Style of Not Fitted components, please follow the settings below:





• Alternate Part – A variation can also be set to an entirely different component, as an Alternate Part. When the compiled tab is selected in the schematic editor, the alternate part will be shown when changing between Variants. For this type of variation, the alternate part must share the same set of schematic pins, placed in the same locations, as the base part

Two Ways an Alternate Part is Reflected in the PCB:

• If the footprint is the same – if the chosen Alternate Part has the same footprint name as the base part, then only one instance of that footprint will be transferred to the PCB. As multiple footprints can be assigned to a component, you should ensure that thecorrect footprint is selected in the Variant Management dialog for each variant

• If the footprint changes – if the chosen Alternate Part has a different footprint name from the base part, then both footprints are transferred to the PCB. You must then decide how to position the two footprints on the PCB. Note that both footprints will have the same designator, as only one or the other component is ever fitted

Changing the Type of Component

The ability to select an alternate part is not restricted to choosing the same type of component, so you can, for example, have a base component that is a resistor, then define an alternate part that is a capacitor. It is important to be aware of the consequences of this type of alternate part:

• Designator - there is only one designator for each logical, base component, and it is this designator that is used for all variants. If a resistor is swapped for a capacitor for example, you might want to consider using a special designator prefix to indicate this, such as R_C, or R-C

• Pins - the alternate component must have the same number of pins as the base component, and these pins must be in the same location and of the same electrical type. A warning will appear if these conditions are not met




Here is a sample of a variant with Alternate Part:




Step 5: Once the Component Variation for each component has been assigned, click “Ok” in the Variant Management window and the set of variants created can now be seen in the project window.




Rules for Project Variants

• All Projects that will be uploaded in Team Center must have at least 1 variant defined. The Variants are where Team Center will port the BOM that will be used in Production

• The first product that will be designed shall have the Model Item ID in the Altium Project Files

• The first variant name should have the same details as the project name +”BOM-X”. X is the BOM revision or Variant version

• Always update the Variant version to the latest and only maintain one Variant Version per product. All BOM revision data can be obtained in Team center

• The BOM on the variant must match the one from the Team Center BOM to avoid any mismatch with the Team Center and Altium Data. The BOM changes should be handled by the INNO SYST Engineer using the Altium data. Refer to Team Center and Altium Project Implementations on the latter part of this document for more details




Sample:

• First Product for Development MT Model Item ID : 0762-AAN

• Model Name: Duplicator

• Board Name; UI

• Board number : 2 ; Rev A;

• Second product that will use the same Board MT Model Item ID : 0726-AAB

• Model Name: Harmony Singer 2

• Altium Project Filename: TH_ 0762-AAN _02-UI_RevA.PrjPcb

• Altium PCB Filename: TH_ 0762-AAN _02-UI_RevA.PcbDoc

• Altium SCH Filename: TH_ 0762-AAN _02-UI_RevA_Input.SchDoc (“Input” here is just an example of the name of the circuit block)

• Variant 1 Name: TH_0762-AAN _02-UI_RevA_BOM-A; Next BOM Revision: TH_0762-AAN _02-UI_RevA_BOM-B

• Variant 2 Name: TH_0726-AAB_02-UI_RevA_BOM-A; Next BOM Revision: TH_0726-AAB_02-UI_RevA_BOM-B




Special Rules for MCU IC and EEPROM Data in Variants

• For the Schematic Entry purposes the main schematic must use the PLM number for the MCU IC only. Do not use the PLM number of the MCU with EEPROM data

• Use the PLM Number of the MCU + EEPROM data in each Variant. Do this by manually adding the PLM number of the MCU + EEPROM in the Variant Management. See image Below:

Note: Note that the image shown above is only for demonstration. The PLM number might change according to the correct application. The Agile Part number is the same as the PLM number for this example. PLM is also the same as the MT DM Item ID in Team Center.




Project Naming Convention




Standard PCB File Naming Convention

Name the PCB according to our file naming convention:

<Brand Code>_<MT Model Item ID>_<XX-Board Name>_RevX.PcbDoc

e.g., For PCB filename BE_ 0722-AAQ _01-Main_RevA.PcbDoc

See sample project created below:




Team Center and Altium Project Implementations (planned)

Variant implementations play a vital role in ensuring that the Projects we are working on will be uploaded on Team center without issues. In this sections we will provide scenarios and how it should be implemented both on Altium projects and Team center. Please refer to the details below for the possible implementation of projects when Team Center process is already considered. A temporary Team Center ID will be used in the examples; in each case you will be required to create a new ID that is different from the last release.

Case 1. New Project From a Single Product

• New PCB Project

• No other product will use the same Board

Sample Recommended Altium Project Implementation: Sample Recommended Team Center Implementation:




Case 2. New Project from Multiple Products

• New PCB Project

• There are other products that will use the same Board but with different BOM

Sample Recommended Altium Project Implementation:

Note that MT Model Item ID: 0722-AAQ is the Base Variant and the Owner of the Project. MT Model Item ID: 0726-AAB will use the same board but will have a different BOM than 0722-AAQ.

Sample Recommended Team Center Implementation:




Case 3. Board Reuse

• New PCB Project

• There are other products that will use the same Board. Same BOM implementation


The implementation will be the same as Case 1. The other product will just use the same BOM PN as the Base Product.


The implementation will be the same as Case 1. The other product will just use the same BOM PN as the Base Product.

Case 4. Update to Add/Remove Components from BOM

• Old PCB Project

• Need to remove or add components from the list for a new BOM configuration from one of the products

• There are other product that will use the same board but don’t need to change the BOM configuration from last release


The BOM configuration was changed. The BOM revision must be updated.

For this case since the only change was under product 0722-AAQ. The BOM for 0762-AAB will remain the same.





Make sure to uncheck this so that the data that will be transferred to TC is only for the modified Product BOM

This is the Product BOM that was changed.

Since Part of the CAD file was changed, this needs to be included on the transfer. There will be no change in filename and MT DM Item ID.

The Altium project that contains the updated BOMs should be included as this is the one who contain the CAD data for the BOM.Note that the Altium project is not the PCB item that needed to be included on the BOM. In Team Center, this is merely a container and should only be used as reference. Latest CAD files should always be saved and archived in Altium Vault.

Case 5. Update using Alternate Part with same package from BOM

• Old PCB Project

• With component value or type change but will not require the PCB to be modified

• Footprint of the alternate part must be the same from the parts to be replaced


The implementation will be the same as Case 4. This will use Alternate part function in Project Variants .


The implementation will be the same as Case 4. The BOM to be generated will use the alternate part.




Case 6. New Revision from Multiple Products

• PCB Project Revision


• Board Layout must be modified


Since this is already a revision and a new release for the new board must be implemented. All BOM under this project will need to be updated, the BOM revision will need to be reset to BOM-A. A reset is needed for every revision.





Case 7. PCB Layout Update Only

• PCB Project Revision


• Board Layout must be modified

• No Schematic Changes

Sample Recommended Altium Project Implementation: Same implementation as Case 6.

The New Board PN will still need to be reflected on the schematic via the P1 component’s PLM number. Although technically there was no change in circuit, the Variants will still depend on the data that the schematic has to generate in the BOMs.

Sample Recommended Team Center Implementation: Same implementation as Case 6.

Cases 1-5 will retain the design filename Revision as is. The project name, schematic, PCB and all related documents except the affected variant will have the same name and revision in the filenames. Currently, Team center does not allow the reuse of same Item ID even for small changes so we will still have to create a new Item ID every time we are going to upload EDA items in TC.

Cases 6-7 will cause the design to have a new Revision ID. The project name, schematic, PCB and all related documents including the all the variants will have the new name and revision in the filenames. Team center Item ID should also be changed.




Team Center Identifier on EDA Files

To properly document the identity of the EDA files on Team center and reflect that identity on the EDA files, Project and Variants need to have a parameter that will contain the Team center Identity. See image below:

Innovation PCB (INNO PCB) Schematic Design for Excellence ...

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