TIME-DELAY FEED ARCHITECTURES FOR ACTIVE SCANNED ARRAYS

T. C. CHESTON AND J. B . L. RA0 NAVAL RESEARCH LABORATORY, WASHINGTON, DC 20375

INTRODUCTION

Phased arrays are inherently narrow band antennas where the scan-angle changes as a function of frequency. This characteristic is exploited in frequency scanned arrays, but with phased arrays it restricts the use of bandwidth which is needed to enhance radar capabilities and performance. The narrow bandwidth of phased arrays is due to phase being controlled for the antenna aperture excitation rather than time-delay, and steered beams will scan towards broadside as the frequency is increased, and thus move off the target [l]. For frequency independent beam-steering, the electrical pathlengths (and hence time-delays) from the feed to each radiating element and from there to the desired equiphase front, has to be the same. with time-delay steering, the only bandwidth limitation is that the spacing between elements should not exceed about h/2 at the highest frequency to avoid grating lobes. Other bandwidth limitations are due to components and matching.

The architectures described here make multiple use of switched digital time-delay circuits and thereby significantly reduce the complexity of a system. Various possible methods are discussed and a figure of merit is derived which is the factor by which the total switchable time-delay is reduced from that of a conventional time- delay system. The methods of making multiple use of switched time-delays introduce losses and are therefore mainly applicable to active arrays, where the losses can be compensated by amplification of both t r ansmi t t ed and received signals.

TIME-DELAY SERIES FEED ARCHITECTURE

Fig. 1 shows the architecture for a simple time- delay series beamformer for a linear array. Each time- delay circuit shown gives a delay that can be switched from 0 to 2d/c where d is the inter-element spacing and c the velocity of light. At the highest frequency the elements are spaced by A 1 2 to avoid grating-lobes and the time-delay corresponds to 3600 of phaseshift (as with a normal phaseshifter) . The time-delay circuits are similar to those of a diode phaseshifter with switched line-lengths, and are reciprocal. When the time-delays

are set half way, to d/c, then the various lines feeding the elements at the aperture have fixed bias delays as shown, making them all equal in length: that setting will therefore give a broadside beam, independent of frequency. With large arrays there are many time-delay circuits in series with correspondingly large insertion loss to the outer elements. This loss can be overcome to some extent by amplification and also by removing the smaller bits of the time-delays and including them in the solid-state modules of Fig. 1. Alternately, time-delay subarrays can be formed as shown in Fig. 2 to reduce insertion loss.

TIME-DELAY CORPORATE FEED ARCHITECTURE

Fig. 3 shows an active parallel or corporate feed network with switchable digital time-delays. In comparison with the series architecture, it requires longer switchable time-delays but has much smaller insertion loss.

FIGURE OF MERIT

A figure of merit (FOM) can be derived to assess the total switched time delay of a system:

Total time-delay for conventional system

Total time-delay for proposed system - FOM =

The total time-delay is the sum of the maximum values of all switchable time-delays. The conventional system is a configuration where each radiating element has its own unique switchable time-delays. They vary from a/c at the edge to zero at the center, for array aperture "a". FOM's for various configurations are shown in Fig. 4. A large FOM indicates small switched time-delays and is desirable because it results in less complexity, cost and weight.

TIME-DELAY HYBRID FEED ARCHITECTURE

Corporate feed networks can be combined with series feeds in the form o f subarrays. Any combinations can be used in a two dimensional configuration with monopulse.

CONCLUSIONS

Time-delay feed architectures for active, scanned, antenna arrays are described. They make multiple use of short switched time-delay circuits to significantly reduce the complexity of time-delay beamsteering. A figure of merit is derived comparing the total switchable time-delays w i t h those of a convent-ional system.

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-+d+

Level Time Delay

m 0 - 9 m - 1 O - Z ~

m - t 0 - 4 g I

I I I I I

0 - Time Delay

0 - Solid State Module Where N = Zm

FIG. 3. TIME-DELAY CORPORATE FEED ARCHITECTURE

16

14

12 n g 10 Y

8 P ' G 6 E! s 4 ii

2

2 10 20 30 40 50 60 Number of Elements N

FIG. 4. FIGURE OF MERIT OF DIFFERENT ARCHITECTURES

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REFERENCES

[l] Skolnik, M.I. (ed): Radar Handbook, 2nd edition, McGraw-Hill Book Co., New York, 1990, Section 7.7

0 0

0 0

Time Delay \ I 0 "v" 0 - q

FIG. 1. TIME-DELAY SERIES FEED ARCHITECTURE

&

Total Number of Elements=

a=Array Aperture

FIG. 2. SERIES FEED ARCHITECTURE WITH SUB-ARRAYS

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