[IEEE 2011 69th Annual Device Research Conference (DRC) - Santa Barbara, CA, USA...

2
High-Resolution Temperature Sensing with Source-Gated Transistors R. A. Sporea, J. M. Shannon, S. R. P. Silva Advanced Technolo Institute, FEPS, Universi ojSurrey, Guildjor Surrey, GU2 7X UK. email: r.a.sporea@surrey.ac.uk;phone: +441483686083 Source-gated transistors (SGTs) [1] are three-terminal devices in which the cuent is controlled by a potential barrier at the source. The gate voltage is used primarily to modulate the effective height of the source baier. These devices have a number of operational advantages over conventional field-effect transistors, including a potentially much smaller saturation voltage d very low output conductance in saturation, which lead to low power operation and high intrinsic gain [2]. Thin-film SGTs with Schottky source barriers have been fabricated on glass, in a self-aligned, back-gate polysilicon process. A microphotograph of a typical SGT is shown in Figure 1, while Figure 2 shows schematically the cross-sectional structure of a device (processing described in [2]). Electrical measurements (Figure 3) reveal on/off ratios in excess of 105 and typical SGT behaviour: small change in saturation voltage with gate potential and flat output characteristics in the saturation regime up to relatively high drain voltages. These devices seem to be well suited for signal amplification applications and as active loads in large area electronic circuits, and represent the experimental basis of the current study. A feature of devices containing Schottky baiers in general and of the Schottky SGTs in particular is the temperature dependence of the drain current; high Schottky briers produce a large variation of drain current against temperature, which is undesirable in most applications. In order to keep the current variation with temperature small, low barrier heights have to be used. However, the very large activation energy which can be obtained by designing the SGT with a high Schottky barrier can be exploited for highly sensitive temperature measurements. In order to act as a temperature sensor, the SGT can be operated at a constant gate voltage, to produce an exponentially temperature-dependent drain current, or at constant drain current in a feedback loop, leading to a avo 1 ( ts B (C j + Cs) J change in gate voltage with temper@ure given by: : - Va - Vr - , where ts is the aT T a C j semiconductor thickness, a is the barrier lowering constant, B is the height of the source barrier at zero applied bias, Vr is the threshold voltage, Cj and Cs are the capacitances per unit area of the gate insulator and semiconductor, respectively. The constant Va operation can be applied to a sensing scheme such as [3] and can make use of the high intrinsic gain of the SGT [2], while a (linearly) temperature dependent gate voltage scheme can be integrated into a sensor of the type described in [4]. Figure 4 shows the change of Va with temperature for two devices (low and high baier) operated at constant current. A simulation of a similar structure with a high baier (Figure 5) reveals a liT dependence of Va. From both the measurements and the simulation it can be concluded that devices with high barriers exhibit a very strong sensitivity of Va to temperature (several 100mVPC), which is far more than that of typical p-n junctions used in integrated temperature sensors (�2mVC) and could translate into greatly improved resolution when measuring small chges in temperature. Figure 6 describes the measured linear dependence between sensitivity and gate voltage which is in accordance with the equation above. As the threshold of the SGT can be set during the design phase [2], highly sensitive SGTs can be made which have a very negative Vr and operate at low Va to meet the requirements of low voltage systems. Source-gated transistors are inherently very stable under electrical stress, as has been described in [5]. Figure 7 shows the excellent stability of the drain cuent over a number of days in a fabricated polysilicon SGT, together with the very small threshold shiſt due to stress. This behaviour, together with the low saturation voltage and high output conductance is very desirable for low power, sensor matrices where power supply ripple rejection, uniformity of signals across a wide area, sensitivity and power are important design considerations. The versatility of the SGT concept is extended by the possibility of realizing, in principle, of an SGT structure in any semiconductor or fabrication process as long as a reliable potential barrier can be fabricated at the source. The authors would like to acknowledge the contributions to the design and fabrication of the polysilicon SGTs by Dr. Nigel Young and Dr. Michael Trainor om Philips Research. The work of R. A. Sporea is supported by EPSRC, U.K. [1] J. M. Shannon and E. G. Gerstner, IEEE Electron Dev. Lett., 24, no. 6, pp. 405-407, 2003; [2] R. A. Sporea et aI., IEEE Trans. Electron. Devices, 57, iss. 6, Oct. 2010; [3] A. Nakashima, Y. Sagawa and M. Kimura, IEEE Sensors Joual, 11, iss. 4, pp. 995-99, 2011; [4] A. Bakker, J. H. Huijsing, IEEE J Solid-State Circuits, 31, iss.7, pp. 933-937, 1996; [5] J. M. Shannon, Appl. Phys. Lett., 85, no. 2, pp. 326-328, 2004. 978-1-61284-244-8/11/$26.00 ©2011 IEEE 61

Transcript of [IEEE 2011 69th Annual Device Research Conference (DRC) - Santa Barbara, CA, USA...

Page 1: [IEEE 2011 69th Annual Device Research Conference (DRC) - Santa Barbara, CA, USA (2011.06.20-2011.06.22)] 69th Device Research Conference - High-resolution temperature sensing with

High-Resolution Temperature Sensing with Source-Gated Transistors R. A. Sporea, J. M. Shannon, S. R. P. Silva

Advanced Technology Institute, FEPS, University ojSurrey, Guildjord, Surrey, GU2 7XH, U.K. email: [email protected];phone: +441483686083

Source-gated transistors (SGTs) [1] are three-terminal devices in which the current is controlled by a potential barrier at the source. The gate voltage is used primarily to modulate the effective height of the source barrier. These devices have a number of operational advantages over conventional field-effect transistors, including a potentially much smaller saturation voltage and very low output conductance in saturation, which lead to low power operation and high intrinsic gain [2].

Thin-film SGTs with Schottky source barriers have been fabricated on glass, in a self-aligned, back-gate polysilicon process. A microphotograph of a typical SGT is shown in Figure 1, while Figure 2 shows schematically the cross-sectional structure of a device (processing described in [2]). Electrical measurements (Figure 3) reveal on/off ratios in excess of 105 and typical SGT behaviour: small change in saturation voltage with gate potential and flat output characteristics in the saturation regime up to relatively high drain voltages. These devices seem to be well suited for signal amplification applications and as active loads in large area electronic circuits, and represent the experimental basis of the current study.

A feature of devices containing Schottky barriers in general and of the Schottky SGTs in particular is the temperature dependence of the drain current; high Schottky barriers produce a large variation of drain current against temperature, which is undesirable in most applications. In order to keep the current variation with temperature small, low barrier heights have to be used. However, the very large activation energy which can be obtained by designing the SGT with a high Schottky barrier can be exploited for highly sensitive temperature measurements.

In order to act as a temperature sensor, the SGT can be operated at a constant gate voltage, to produce an exponentially temperature-dependent drain current, or at constant drain current in a feedback loop, leading to a

avo 1 ( tstPB (Cj + Cs) J change in gate voltage with temperature given by: -- ::::: - Va - Vr - , where ts is the aT T aCj

semiconductor thickness, a is the barrier lowering constant, tPB is the height of the source barrier at zero applied

bias, Vr is the threshold voltage, Cj and Cs are the capacitances per unit area of the gate insulator and semiconductor, respectively. The constant Va operation can be applied to a sensing scheme such as [3] and can make use of the high intrinsic gain of the SGT [2], while a (linearly) temperature dependent gate voltage scheme can be integrated into a sensor of the type described in [4]. Figure 4 shows the change of Va with temperature for two devices (low and high barrier) operated at constant current. A simulation of a similar structure with a high barrier (Figure 5) reveals a liT dependence of Va. From both the measurements and the simulation it can be concluded that devices with high barriers exhibit a very strong sensitivity of Va to temperature (several 100mVPC), which is far more than that of typical p-n junctions used in integrated temperature sensors (�2mV/°C) and could translate into greatly improved resolution when measuring small changes in temperature. Figure 6 describes the measured linear dependence between sensitivity and gate voltage which is in accordance with the equation above. As the threshold of the SGT can be set during the design phase [2], highly sensitive SGTs can be made which have a very negative Vr and operate at low Va to meet the requirements of low voltage systems.

Source-gated transistors are inherently very stable under electrical stress, as has been described in [5]. Figure 7 shows the excellent stability of the drain current over a number of days in a fabricated polysilicon SGT, together with the very small threshold shift due to stress. This behaviour, together with the low saturation voltage and high output conductance is very desirable for low power, sensor matrices where power supply ripple rejection, uniformity of signals across a wide area, sensitivity and power are important design considerations. The versatility of the SGT concept is extended by the possibility of realizing, in principle, of an SGT structure in any semiconductor or fabrication process as long as a reliable potential barrier can be fabricated at the source.

The authors would like to acknowledge the contributions to the design and fabrication of the polysilicon SGTs by Dr. Nigel Young and Dr. Michael Trainor from Philips Research. The work of R. A. Sporea is supported by EPSRC, U.K.

[1] J. M. Shannon and E. G. Gerstner, IEEE Electron Dev. Lett., 24, no. 6, pp. 405-407, 2003; [2] R. A. Sporea et aI., IEEE Trans. Electron. Devices, 57, iss. 6, Oct. 2010; [3] A. Nakashima, Y. Sagawa and M. Kimura, IEEE Sensors Journal, 11, iss. 4, pp. 995-99, 2011; [4] A. Bakker, J. H. Huijsing, IEEE J. Solid-State Circuits, 31, iss.7, pp. 933-937, 1996; [5] J. M. Shannon, Appl. Phys. Lett., 85, no. 2, pp. 326-328, 2004.

978-1-61284-244-8/11/$26.00 ©2011 IEEE 61

Page 2: [IEEE 2011 69th Annual Device Research Conference (DRC) - Santa Barbara, CA, USA (2011.06.20-2011.06.22)] 69th Device Research Conference - High-resolution temperature sensing with

--�

Drain 2 @] (Q)

. t-

.--:::: ---

Gate Poly-Si island

SiN. Drain 1 'insulator

Self-aligned n+ drain implant

SiD, insulator

Source window

I� (Q)t Source I+------------.:::::.J.. Polysilicon I-.:-.....I ••••••• I:::::=:J- Gate contact

-

Fig. 1. Micrograph of self-aligned polysilicon SGT. �-----------� Glass

Width W=50flm, source length S=2flm, source­drain separation d=lOflm.

Fig. 2. Cross-section of the self-aligned structure.

10-5

1.2x10·6 VG step =5V

10.6

1.0x10·6

10.7 � ::: 8.0x10·7

10-8 c:

� <3 6.0x10·7

10.9 c:

� 4.0xlO·7 10.10

- VD=10V

2.0x10·7 II 10.11

• • • • VD=20V

0.0 10.12 f-,,..-,-�-.-....--y--.--.--, o 5 10 15 20 -50 -40 -30 -20 -10 0

Drain Voltage (V) Gate voltage (V)

Fig. 3. Output characteristics (left) and corresponding transfer curve (right) for an SGT with high source barrier and W=50flm, S=2flID, d=6flm.

.... 1=20uA 24 - 1=50uA

--- -- - - -1=100uA � 22 ---2:-� 20 � -(5 18 >

2 <0 16 C>

14 ....... . .

30 ...

25 ...

... ...

20

15

10

5

... ... ...

- 1=3uA .... 1=5uA - - -1=10uA

...

30 40 50 60 70 80 90 100 30 40 50 60 70 80 90 100 Temperature (0C) Temperature (0C)

-0.10

-0.15

-0.20 G � -0.25

I-� -0.30 C> > '0 -0.35

-0.40

\ \

-- 1=3uA - - '1=5uA .... 1=10uA

\ \

\ \

5 10 15 20 25 Gate voltaae (V)

Fig. 6. Measured dependence of dV ddT on V G as temperature changes.

s}:�t::-_, __ ,_ a� 10-4

�10·5

� 10.6 OJ

5 10.7 o

.S 10.8 � 010.9

10.10

10.11

o 20 40 60 80 Stress time (h)

b)

-- Oh - - - 0.5h .... 2h _.- 72h

Fig. 4. Measured variation of the gate voltage with temperature for SGTs with low (left) and high (right) barriers operated at constant current.

1 0.12 +--.-�--.-�---.� -40 -30 -20

VG(V)

25

�20 G. � 15 � � 10 2 <0 C> 5

Fig. 7. a) Stability of drain current to prolonged electrical stress for polysilicon SGTs; b) Change of transfer characteristic during stressing period.

Fig. 5. Simulation of change in gate voltage with temperature for a Schottky barrier SGT operated at

O������������������ 280 300 320 340 360 380 400 constant current. Left to right: ID=3nA, lOnA,

Temperature (K) 30nA, lOOnA, 300nA, lflA, 3flA.

978-1-61284-244-8/11/$26.00 ©2011 IEEE 62