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IBM III-V workshop 2010
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Transcript of IBM III-V workshop 2010
Electrical properties of III-V/oxide interfaces
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD
interfaces
G. Brammertz, H.C. Lin, A. Alian, S. Sioncke, L. Nyns, C. Merckling, W.-E. Wang, M.Caymax, M. Meuris., M. Heyns., T. Hoffmann
Outline
• Introduction: interface states
• Electrical interface state characterization techniques:
• Conductance method
• Terman method
• Berglund method
• Combined high and low frequency method
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD
• Full simulation of electrostatics
• GaAs/oxide interface properties
• In0.53Ga0.47As/oxide interface properties
• InP/oxide interface properties
• Electrostatic effect of interface states on MOS-HEMT devices
• Conclusions
2
Interface states
Interface states arise from the sudden disruption of the lattice structure, which creates carrier energy levels different from the usual energy band structure.
DOSDerived mainly
from Gawavefunctions
Derived mainly from As
wavefunctions
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD 3
~1015 cm-2 broken bonds
EV EC Energy
EV EC Energy
DOS
~1015 cm-2 interface states
Donors Acceptors
Charge trapping/emission at the interface
Interface defects are small localized potential wells at the surface of the material,if their energy level lies within the bandgap.
EC
EV
Eg∆E
EC
EV
Eg∆E
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD 4
Charge trapping
EV
Charge emission
EV
(((( ))))ct
eNσv
kT
∆Eexp
Eτ
====∆∆∆∆ct
tNσv
1τ ====
• The charge trapping time τt depends only on the capture cross section of the trap (σ), the thermal velocity (vt) and the density of states (Nc).
• The charge emission time also depends exponentially on the trap depth ΔE.
0 0.4 0.8 1.2 1.6 2 2.4 2.8 3.2
10-20
10-16
10-12
10-8
10-4
100
104
108
Energy in bandgap (eV)
Ch
ara
cte
ris
tic t
rap
fre
qu
en
cy (
Hz)
0 0.2 0.4 0.6 0.8 1 1.2 1.4
10-2
100
102
104
106
108
1010
Energy in bandgap (eV)
Ch
ara
cte
ris
tic
tra
p f
req
ue
ncy
(H
z)
0 0.2 0.4 0.6 0.8 1 1.2
10-2
100
102
104
106
108
1010
Energy in bandgap (eV)
Ch
ara
cte
risti
c t
rap
fre
qu
en
cy
(H
z)
10
Ch
ara
cte
risti
c t
rap
fre
qu
en
cy (
Hz)
10
Ch
ara
cte
ris
tic
tra
p f
req
ue
nc
y (
Hz)
10
Ch
ara
cte
ris
tic t
rap
fre
qu
en
cy
(H
z)
Characteristic frequenciesσ σ σ σ =10-14 cm2
GaN InP
Si In Ga As InAs
GaAs
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD
0 0.2 0.4 0.6 0.8 1
10-2
100
102
104
106
108
1010
Energy in bandgap (eV)
Ch
ara
cte
ris
tic
tra
p f
req
ue
nc
y (
Hz)
0 0.2 0.4 0.6
10-2
100
102
104
106
108
1010
Energy in bandgap (eV)
Ch
ara
cte
ris
tic
tra
p f
req
ue
nc
y (
Hz)
0 0.2
10-2
100
102
104
106
108
1010
Energy in bandgap (eV)
Ch
ara
cte
ris
tic t
rap
fre
qu
en
cy
(H
z)
5
Si In0.53Ga0.47As InAs
The characteristic trap frequency varies strongly with the energy level of the trap in the bandgap, such that with typical AC measurement frequencies only small parts of the bandgap can be measured.
0 0.4 0.8 1.2 1.6 2 2.4 2.8 3.2
10-20
10-16
10-12
10-8
10-4
100
104
108
Energy in bandgap (eV)
Ch
ara
cte
risti
c t
rap
fre
qu
en
cy
(H
z)
0 0.2 0.4 0.6 0.8 1 1.2
10-2
100
102
104
106
108
1010
Energy in bandgap (eV)
Ch
ara
cte
ris
tic
tra
p f
req
uen
cy (
Hz)
10
Ch
ara
cte
ris
tic t
rap
fre
qu
en
cy (
Hz)
10
Ch
ara
cte
ris
tic t
rap
fre
qu
en
cy
(H
z)
10
Ch
ara
cte
risti
c t
rap
fre
qu
en
cy (
Hz)
Characteristic frequenciesσ σ σ σ =10-16 cm2
GaN InP
Si In Ga As InAs
0 0.2 0.4 0.6 0.8 1 1.2 1.4
10-2
100
102
104
106
108
1010
Energy in bandgap (eV)
Ch
ara
cte
risti
c t
rap
fre
qu
en
cy
(H
z)
GaAs
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD
0 0.2 0.4 0.6 0.8 1
10-2
100
102
104
106
108
1010
Energy in bandgap (eV)
Ch
ara
cte
ris
tic t
rap
fre
qu
en
cy (
Hz)
0 0.2 0.4 0.6
10-2
100
102
104
106
108
1010
Energy in bandgap (eV)
Ch
ara
cte
ris
tic t
rap
fre
qu
en
cy
(H
z)
0 0.2
10-2
100
102
104
106
108
1010
Energy in bandgap (eV)
Ch
ara
cte
risti
c t
rap
fre
qu
en
cy (
Hz)
6
Si In0.53Ga0.47As InAs
The characteristic trap frequency varies strongly with the energy level of the trap in the bandgap, such that with typical AC measurement frequencies only small parts of the bandgap can be measured.
0 0.4 0.8 1.2 1.6 2 2.4 2.8 3.2
10-20
10-16
10-12
10-8
10-4
100
104
108
Energy in bandgap (eV)
Ch
ara
cte
risti
c t
rap
fre
qu
en
cy (
Hz)
10
Ch
ara
cte
ris
tic t
rap
fre
qu
en
cy
(H
z)
10
Ch
ara
cte
ris
tic t
rap
fre
qu
en
cy (
Hz)
10
Ch
ara
cte
ris
tic
tra
p f
req
ue
nc
y (
Hz)
0 0.2 0.4 0.6 0.8 1 1.2
10-2
100
102
104
106
108
1010
Energy in bandgap (eV)
Ch
ara
cte
ris
tic t
rap
fre
qu
en
cy
(H
z)
0 0.2 0.4 0.6 0.8 1 1.2 1.4
10-2
100
102
104
106
108
1010
Energy in bandgap (eV)
Ch
ara
cte
ris
tic
tra
p f
req
uen
cy (
Hz)
Characteristic frequenciesσ σ σ σ =10-18 cm2
GaN InP
Si In Ga As InAs
GaAs
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD
0 0.2 0.4 0.6 0.8 1
10-2
100
102
104
106
108
1010
Energy in bandgap (eV)
Ch
ara
cte
ris
tic t
rap
fre
qu
en
cy
(H
z)
0 0.2 0.4 0.6
10-2
100
102
104
106
108
1010
Energy in bandgap (eV)
Ch
ara
cte
ris
tic t
rap
fre
qu
en
cy (
Hz)
0 0.2
10-2
100
102
104
106
108
1010
Energy in bandgap (eV)
Ch
ara
cte
ris
tic
tra
p f
req
ue
nc
y (
Hz)
7
Si In0.53Ga0.47As InAs
The characteristic trap frequency varies strongly with the energy level of the trap in the bandgap, such that with typical AC measurement frequencies only small parts of the bandgap can be measured.
Outline
• Introduction: interface states
• Electrical interface state characterization techniques:
• Conductance method
• Terman method
• Berglund method
• Combined high and low frequency method
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD
• Full simulation of electrostatics
• GaAs/oxide interface properties
• In0.53Ga0.47As/oxide interface properties
• InP/oxide interface properties
• Electrostatic effect of interface states on MOS-HEMT devices
• Conclusions
8
• Interface states induce an additional capacitance and loss contribution in the MOS structure, represented by Cit and Rit in parallel with the depletion capacitance.
• The capacitance and resistance of the interface traps will be measured only if the measurement frequency is equal to the characteristic trap frequency at the Fermi level position.
Ef
M O S
eVG
Conductance method
α D
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD 9
• In the example case, at Vg=1V, the Fermi level at the semiconductor surface passes through the trap level with a characteristic frequency of 1 kHz.
f = 1 kHz
Cox
Cd
Rs
Cit Rit
α Dit
Conductance method: pitfalls*
1. Depending on the size of the bandgap of the material, only small portions of the bandgap can be measured with the conductance method. Performing measurements at lower and higher temperatures might help for characterizing larger parts of the bandgap(Beware of weak inversion effects!).
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD
2. The amplitude of the measured interface state conductance is limited by the oxide capacitance, such that the largest Dit that can be extracted is of the order of Cox/q. Dit values that approach this value will be strongly leveled off.
10
*K. Martens et al., TED 55 (2), 547, 2008
Conductance method: pitfalls*
3. Weak inversion responses, due to interactions of minority carriers with interface states, do behave similarly to majority carrier interface state responses. This can lead to overestimation of the Dit, if one applies equations that only take majority carriers into account.
frequencies shown
1kHz → 1MHz
300K
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD
4. Flatband voltage determination for energy-voltage relationship extraction can be very problematic if large frequency dependent flatband voltage shift is present.
11
*K. Martens et al., TED 55 (2), 547, 2008
0.7
0.6
0.5
0.4
0.3
0.2Cap
aci
tan
ce (
µF
/cm
2)
-3 -2 -1 0 1 2 3
Gate voltage (V)
1 MHz
100 Hz
Terman method (high frequency CV)
High frequency CV-curve meaning in this case:
1. Interface states do not respond to the measurement frequency and do not add any capacitance.
• If there is a large density of fast interface states at the band edges or even inside the conduction band of III-V semiconductors, this condition for application of the method is not verified.
• f.ex. in the InGaAs case there is typically a large density of very fast Dit close to the valence band as well as inside the conduction band. -2
100
102
104
106
108
1010
Ch
ara
cte
risti
c t
rap
fre
qu
en
cy
(H
z)
In0.53Ga0.47As
(((( )))) (((( ))))ss
g
soxsit C
dV
dCC ψψψψ
ψψψψψψψψ −−−−
−−−−
====
−−−−
1
1Comparison of high frequency CV curve to theoretical CV curve without interface states:
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD 12
2. Interface states do respond to the bias sweep, which leads to stretch out of the CV-curve.
to the valence band as well as inside the conduction band.
• If there is a large density of very slow interface states inside the III-V semiconductor bandgap, this condition for application of the method is not verified.
• f.ex. in the GaAs case there is typically a large density of very slow Dit close to mid-gap, which does not respond to the bias sweep.
0 0.2 0.4 0.6
10-2
Energy in bandgap (eV)
Ch
ara
cte
risti
c t
rap
fre
qu
en
cy
(H
z)
EV EC
0 0.2 0.4 0.6 0.8 1 1.2 1.4
10-2
100
102
104
106
108
1010
Energy in bandgap (eV)
Ch
ara
cte
ris
tic
tra
p f
req
ue
nc
y (
Hz)
GaAs
For pretty much all III-V/oxide interfaces, at least one of the conditions is not verified, such that this method will in most cases lead to errors in the derived Dit values.
Berglund method (low frequency CV)
Low frequency CV-curve meaning in this case:
1. Interface states fully respond to the measurement frequency and add capacitance to the CV.
2. Interface states do respond to the bias sweep, which leads to stretch out of the CV-curve.
• If there is a large density of very slow interface states inside the III-V semiconductor bandgap, this condition for application of the method is not verified.
106
108
1010
Ch
ara
cte
ris
tic
tra
p f
req
ue
nc
y (
Hz)
GaAs
s
oxLF
it CCC
C −−−−
−−−−====
−−−−1
11Comparison of low frequency CV curve to theoretical CV curve without interface states:
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD 13
Due to low conduction band density of states the theoretical Energy-Voltage curves are more complicated than in the Si case:
is not verified.• f.ex. in the GaAs case there is typically a large density of very slow Dit close to mid-gap, which does not respond to the bias sweep, unless very slow sweep is used.
• Not a limitation, just a complication that can be addressed by using the correct theoretical model including Fermi-Dirac statistics for carrier concentrations.
0 0.2 0.4 0.6 0.8 1 1.2 1.4
10-2
100
102
104
10
Energy in bandgap (eV)
Ch
ara
cte
ris
tic
tra
p f
req
ue
nc
y (
Hz)
For low bandgap materials (In0.53Ga0.47As, InAs, InSb,...) these conditions are typically verified, BUT: slow oxide traps can also introduce stretchout, which could falsify the results.
Combined high-low frequency method
High and low frequency CV-curves need to verify the conditions of the Terman and Berglund method respectively, which makes this method very restrictive.
11
1111−−−−−−−−
−−−−−−−−
−−−−====
oxHFoxLF
itCCCC
CDerivation of Dit from both high and low frequency CV curves.
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD 14
For pretty much all III-V/oxide interfaces, at least one of the conditions is not verified, such that this method will in most cases lead to errors in the derived Dit values.
Solution of the Poisson equation,
Including the correct carrier concentrations for degenerate semiconductors, including Fermi-Dirac statistics.
Full simulation of electrostatics
s
x
dx
d
εεεε
ρρρρ )(V(x)2
2
−−−−====
In thermal equilibrium (Similar to Berglund method)
• For low bandgap materials (In0.53Ga0.47As, InAs, InSb,...) these conditions are typically verified, BUT: slow oxide traps can also introduce stretchout, which could falsify the
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD
VfbEv EcEi
15
stretchout, which could falsify the results.
10-2
100
102
104
106
108
1010
Tra
p r
esp
on
se
fre
qu
en
cy (
Hz)
0.60.40.20.0
Trap energy within bandgap (eV)
Electrons Holes
AC-CV
QS-CV
In0.53Ga0.47As
Full model*Integrating the Poisson equation:
( )
s
ad xnxpNNe
xdV
xdExE
dx
xVd
ε
)()(
)(
)()(
)(2
2 −+−−==
( )( )
∫−+−
−=)('
)())(())((
)(2)('xV
s
ads
B
xdVxVnxVpNNe
VSignxVEψ ε
( )( )
( )∫
∞
−+
−=
CE kTxVE
CC dE
e
EEN
kTxVn
/))((
2/1
2/31
2)(
π
sss QE ε/−= ( )∫ −+−−−=Vs
adssssB
xdVxVnxVpNNeVSignVQψ
ε )())(())(()(2)(
( )V+∞
,where
yields:
• Applying Gauss’ theorem from the bulk to the surface of the semiconductor gives:
and accordingly:
• The semiconductor and interface state capacitances can be written as:
.
.
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD 16
s
ssss
dV
VdQVC
)()( −=
)()(
11
)(
1
sitssoxstot VCVCCVC ++=
( )s
V
V
AitDit
sitdV
dEDdEDdVC s
s
∫ ∫+∞
∞−−
=,,
)(
ox
sit
ox
sssmsG
C
VQ
C
VQVV
)()(−−−+= φφ
and respectively.
• Finally, gate voltage and surface potential are related through:
.
.
• The total capacitance of the MOS structure:
* G. Brammertz et al., APL 95, 202109 (2010)
OR, full self-consistent numerical solution of the Poisson equation for more complicated semiconductor heterostructures
Outline
• Introduction: interface states
• Electrical interface state characterization techniques:
• Conductance method
• Terman method
• Berglund method
• Combined high and low frequency method
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD
• Full simulation of electrostatics
• GaAs/oxide interface properties
• In0.53Ga0.47As/oxide interface properties
• InP/oxide interface properties
• Electrostatic effect of interface states on MOS-HEMT devices
• Conclusions
17
Dit distribution of GaAs with Al2O3 (S-pass. and FGA)*
p-type
25°C 150°Cn-type
25°C150°C0.8
0.7
0.6
0.5
0.4
0.3
Capacitance (
µF
/cm
2)
-3 -2 -1 0 1 2
Gate voltage (V)
0.7
0.6
0.5
0.4
0.3
0.2
Cap
acita
nce (
µF
/cm
2)
-2 -1 0 1 2
Gate voltage (V)
0.7
0.6
0.5
0.4
0.3
0.2
0.1
Ca
pa
cita
nce
(µ
F/c
m2)
3210-1-2Gate voltage (V)
0.7
0.6
0.5
0.4
0.3
0.2Ca
pacita
nce
(µ
F/c
m2)
-2 -1 0 1 2
Gate voltage (V)
100Hz
1MHz
100Hz
1MHz
100Hz
1MHz
100Hz
1MHz
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD 18
*G. Brammertz et al., APL 93, 183504 (2008)
Measuring n- and p-type GaAs at both 25°C and 150°C shows the interface state distribution in the complete bandgap.
Dit distribution of GaAs-amorphous oxide interfaces
GaAs-Gd2O3 (MBE) GaAs-Al2O3 (ALD)GaAs-HfO2 (ALD)
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD 19
Not shown here, but also measured and showing similar interface state distribution:• GaAs-Al2O3 (MBE)• GaAs-Ge-GeO2-Al2O3 (MBE)• GaAs-LaAlO3 (MBE)• GaAs-ZrO2 (ALD)• GaAs-In-In2O3-Al2O3 (MBE)
The interface state distribution of the GaAs-amorphous oxide interface depends rather little on the nature and the deposition condition of the oxide.
Physical identity of GaAs interface states: Dangling bond states*
Which defect peak corresponds to what physical defect?
GaAs-Al2O3 before FGA GaAs-Al2O3 after FGA
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD 20
As dangling bonds Ga dangling bonds
EV EC EV EC
As dangling bonds
passivatedGa dangling bonds
passivated
*G. Brammertz et al., APL 93, 183504 (2008)
H passivates dangling bond states.
Physical identity of GaAs interface states:Oxygen bond states*
Which defect peak corresponds to what physical defects?
GaAs-Al2O3 after FGA Ga 3+ not detectableGa 3+ detectable
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD 21
EVEC
Ga 3+
* C. Hinkle et al., APL 94, 162101 (2009).
Remaining defects close to the conduction band seem to be due to Ga3+ oxidation state (Hinkle et al.).
Physical identity of GaAs interface states:Vacancies (Ga-Ga, As-As bonds)*
Which defect peak corresponds to what physical defects?
GaAs-Al2O3 after FGA
Donor
Acceptor
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD 22
EVEC
As vacancy (Ga-Ga bond)
*W. E. Spicer et al., JVST 16(5), 1422 (1979).
Ga vacancy (As-As bond)
The dominating mid-gap peaks, one donor-like, one acceptor-like, are likely due to structural defects at the interface (vacancies)*
GaAs/oxide interfaces that diverge considerably from this picture
GaAs-Ga2O-GGO1
25°C 1.0
0.8
0.6
0.4
0.2Ca
pacita
nce (
µF
/cm
2)
2.01.00.0-1.0V (V)
GaAs-aSi-HfO22
25°C
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD 23
150°C
1 M. Passlack et al., EDL 30 (1), 2 (2009).M. Passlack et al., accepted by TED (2010).
VG (V)
1.0
0.8
0.6
0.4
0.2
Cap
acita
nce (µ
F/c
m2)
2.01.00.0-1.0VG (V)
1 J. De Souza et al., APL 92, 153508 (2008).C. Marchiori et al., JAP 106, 114112, (2010).
150°C
Outline
• Introduction: interface states
• Electrical interface state characterization techniques:
• Conductance method
• Terman method
• Berglund method
• Combined high and low frequency method
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD
• Full simulation of electrostatics
• GaAs/oxide interface properties
• In0.53Ga0.47As/oxide interface properties
• InP/oxide interface properties
• Electrostatic effect of interface states on MOS-HEMT devices
• Conclusions
24
0.7
0.6
0.5
0.4
Capacitance (
µF
/cm
2)
-3 -2 -1 0 1
Gate voltage (V)
0.7
0.6
0.5
0.4
0.3
Cap
aci
tan
ce (
µF
/cm
2)
3210-1-2
Gate voltage (V)
Dit distribution of In0.53Ga0.47As with Al2O3 (S-pass.) :Conductance method*
77°K 300°K 77°K300°K
100Hz
1MHz
100Hz
1MHz
0.7
0.6
0.5
0.4
0.3
0.2Cap
acitan
ce
(µ
F/c
m2)
-3 -2 -1 0 1 2 3
Gate voltage (V)
0.7
0.6
0.5
0.4
0.3
0.2
Cap
acitan
ce (
µF
/cm
2)
-2 -1 0 1 2
Gate voltage (V)
0.7
0.6
Capa
citan
ce (
µF
/cm
2)
180°K0.6
Ca
pa
cita
nce (
µF
/cm
2)
210°K
p-In0.53Ga0.47As-Al2O3-Pt n-In0.53Ga0.47As-Al2O3-Pt
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD 25
0.6
0.5
0.4
0.3
0.2Capa
citan
ce (
µF
/cm
3210-1-2
Gate voltage (V)
0.5
0.4
0.3
0.2
Ca
pa
cita
nce (
µF
/cm
-3.0 -2.0 -1.0 0.0
Gate voltage (V)
* H.C. Lin et al., Microelectronic Engineering 86, 1554 (2009)
Analysis of the trap properties:
Gp/Aωq-f of p-InGaAs at 25°C Schematic band diagram
0
EC
EV
EFVg = 0.5 V
Dit distribution of In0.53Ga0.47As with Al2O3 (S-pass.):Conductance method
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD 26
+
0
EC
EV
EFVg = 0.1 V
Band bending fluctuations increase as the Fermi level approaches the valence band => donor-like interface states.
n-In0.53Ga0.47As-Al2O3-Pt p-In0.53Ga0.47As-Al2O3-Pt
Dit distribution of In0.53Ga0.47As with Al2O3 (S-pass.):Full electrostatic simulations*
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10
10
20
30
40
E-Ev (eV)
Dit (
10
12/e
Vc
m2)
Acceptor Dit
Donor Dit
27
Large acceptor-like Dit peak in the conduction band allowsgood fit of experimental quasi-static C-V data
EcEv
* G. Brammertz et al., APL 95, 202109 (2010)
0
5
10
15
20
25
30
35
40
Dit (
10
12/e
Vcm
2)
Dit from electrostatic simulations
Dit from conductance method
Comparison:Conductance method – electrostatic simulation*
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD
0 0.2 0.4 0.6 0.8 10
E-Ev (eV)
28
Within the error margins there is good agreement between the electrostatic simulation model and the conductance data
EcEv
* G. Brammertz et al., APL 95, 202109 (2010)
Conductance method Electrostatic simulations
Horizontal errors arise from: Capture cross section uncertainty Gate metal work function uncertainty
Vertical errors arise from: Cox limitation of conductance Cox limitation of capacitance
Uncertainty on Cox value Uncertainty on Cox value
Non-parabolic conduction band
Charge quantization
Dit distribution of In0.53Ga0.47As-amorphous oxide interfaces
InGaAs-Al2O3 (ALD) InGaAs-Al2O3 (MBE)InGaAs-HfO2 (ALD)
Not shown here, but also measured and showing similar interface state distribution:
0 0.2 0.4 0.6 0.8 10
5
10
15
20
25
30
35
40
E-Ev (eV)
Dit (
10
12/e
Vcm
2)
Acceptor Dit
Donor Dit
0 0.2 0.4 0.6 0.8 10
5
10
15
20
25
30
35
40
E-Ev (eV)
Dit (
10
12/e
Vc
m2)
Acceptor Dit
Donor Dit
0 0.2 0.4 0.6 0.8 10
5
10
15
20
25
30
35
40
E-Ev (eV)
Dit (
10
12/e
Vcm
2)
Acceptor Dit
Donor Dit
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD 29
Not shown here, but also measured and showing similar interface state distribution:• InGaAs-Al2O3 (ALD, O3)• InGaAs-LaAlO3 (ALD, O3)• InGaAs-Ge-GeO2-Al2O3 (MBE)• InGaAs-GdAlO3 (ALD)• InGaAs-ZrO2 (ALD)
The interface state distribution of the In0.53Ga0.47As-amorphous oxide interface depends rather little on the nature and the deposition conditions of the oxide.
Nevertheless, Hf- and Zr-based oxides usually show higher Dit at the conduction band edge energy as compared to Al-, Gd- and La-based oxides.
Effect of ALD precursor H2O vs O3
n-In0.53Ga0.47As with HCl-clean and 10 nm ALD Al2O3
H2O ALD precursor O3ALD precursor
-3 -2 -1 0 1 2 30
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
Cap
acit
an
ce (
µµ µµF
/cm
2)
-3 -2 -1 0 1 2 30
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
Ca
pa
cit
an
ce
(µµ µµ
F/c
m2)
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10
5
10
15
20
25
30
35
40
E-Ev (eV)
Dit (
10
12/e
Vc
m2)
Acceptor Dit
Donor Dit
30
O3-based ALD increases the Dit at the conduction band edge energy as compared to H2O-based ALD
-3 -2 -1 0 1 2 3
Gate voltage Vg (V)
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10
5
10
15
20
25
30
35
40
E-Ev (eV)
Dit (
10
12/e
Vc
m2)
Acceptor Dit
Donor Dit
-3 -2 -1 0 1 2 3
Gate voltage Vg (V)
-3 -2 -1 0 1 2 30
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
Ca
pa
cit
an
ce
(µµ µµ
F/c
m2)
-3 -2 -1 0 1 2 30
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
Cap
acit
an
ce
(µµ µµ
F/c
m2)
Effect of forming gas anneal
n-In0.53Ga0.47As with (NH4)2S-clean and 10 nm ALD Al2O3
No FGA with FGA
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD
-3 -2 -1 0 1 2 3
Gate voltage Vg (V)
-3 -2 -1 0 1 2 3
Gate voltage Vg (V)
31
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10
5
10
15
20
25
30
35
40
E-Ev (eV)
Dit (
10
12/e
Vc
m2)
Acceptor Dit
Donor Dit
Forming gas anneal reduces the Dit over the full bandgap.80% of the improvement is a thermal effect and not related to H (not shown).
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10
5
10
15
20
25
30
35
40
E-Ev (eV)
Dit (
10
12/e
Vcm
2)
Acceptor Dit
Donor Dit
-3 -2 -1 0 1 2 30
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
Cap
acit
an
ce
(µµ µµF
/cm
2)
Effect of (NH4)2S clean
n-In0.53Ga0.47As with 10 nm ALD Al2O3 and FGA
HCl clean (NH4)2S clean
-3 -2 -1 0 1 2 30
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
Ca
pa
cit
an
ce
(µµ µµ
F/c
m2)
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD
-3 -2 -1 0 1 2 3
Gate voltage Vg (V)
32
(NH4)2S cleaned samples are better than HCl (10%) cleaned samples.The difference between the two interfaces is rather small though.
-3 -2 -1 0 1 2 3
Gate voltage Vg (V)
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10
5
10
15
20
25
30
35
40
E-Ev (eV)
Dit (
10
12/e
Vcm
2)
Acceptor Dit
Donor Dit
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10
5
10
15
20
25
30
35
40
E-Ev (eV)
Dit (
10
12/e
Vcm
2)
Acceptor Dit
Donor Dit
Effect of oxide scaling
n-In0.53Ga0.47As with (NH4)2S-clean, ALD Al2O3 and FGA
5 nm Al2O3 10 nm Al2O3
-3 -2 -1 0 1 2 30
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
Gate voltage V (V)
Ca
pa
cit
an
ce
(µµ µµ
F/c
m2)
-3 -2 -1 0 1 2 30
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
Gate voltage V (V)
Ca
pac
ita
nc
e (
µµ µµF
/cm
2)
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD 33
Dit profile does not change much when the Al2O3 is thinned to 5 nm
Gate voltage Vg (V)
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10
5
10
15
20
25
30
35
40
E-Ev (eV)
Dit (
10
12/e
Vcm
2
Acceptor Dit
Donor Dit
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10
5
10
15
20
25
30
35
40
E-Ev (eV)
Dit (
10
12/e
Vcm
2)
Acceptor Dit
Donor Dit
Gate voltage Vg (V)
Comparison to literature results
0.7
0.6
0.5
0.4
0.3
0.2Cap
aci
tan
ce (
µF
/cm
2)
-3 -2 -1 0 1 2 3
Gate voltage (V)
0.7
0.6
0.5
0.4
0.3
0.2
Cap
acitan
ce (
µF
/cm
2)
-2 -1 0 1 2
Gate voltage (V)
p-type n-type
ALD Al2O3
Kim et al., APL 96,
012906 (2010)
ALD Al2O3
Shin et al., APL 96,
152908 (2010)
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD 34
MBE LaAlO3
Goel et al., APL 91,
091507 (2007)
Sputtered HfO2
Kim et al., APL 93,
062111 (2008)
Sputtered HfO2
Kim et al., APL 93,
062111 (2008)
ALD ZrO2
Koveshnikov et al., APL 92,
222904 (2008)
Sputtered Si-HfO2
Zhu et al., ESL 12 (4),
H131 (2009)
ALD HfO2
O’Connor et al., APL 92,
022902 (2008)
ALD AlN-HfO2
Shahrjerdi et al., EDL 29,
558 (2008)
ALD Al2O3
Xuan et al., EDL 28,
935 (2007)
MBE HfO2
Hwang et al., APL 96,
102910 (2010)
There does not seem to be any In0.53Ga0.47As/oxides interface in literature that diverges considerably from this picture
Outline
• Introduction: interface states
• Electrical interface state characterization techniques:
• Conductance method
• Terman method
• Berglund method
• Combined high and low frequency method
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD
• Full simulation of electrostatics
• GaAs/oxide interface properties
• In0.53Ga0.47As/oxide interface properties
• InP/oxide interface properties
• Electrostatic effect of interface states on MOS-HEMT devices
• Conclusions
35
0.40
0.35
0.30
0.25
0.20
0.15
0.10Capacitance (
µF
/cm
2)
-3 -2 -1 0 1 2
Gate voltage (V)
0.7
0.6
0.5
0.4
0.3
0.2Capacitance (
µF
/cm
2)
3210-1
Gate voltage (V)
0.6
0.5
0.4
0.3
0.2
0.1
Capacitance (
µF
/cm
2)
3210-1
Gate voltage (V)
0.6
0.5
0.4
0.3
0.2
0.1
Capacitance (
µF
/cm
2)
3210-1
Gate voltage (V)
77Kn-type
180Kn-type
300Kn-type
300Kp-type
Dit distribution of InP with Al2O3 (S-pass.) :Conductance method
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD 36
InP presents very large Dit in the lower half of the bandgap that is impossible to measure as the Fermi level pins well before reaching that part of the bandgap.Dit close to the conduction band edge energy is low, similar to InGaAs.
Outline
• Introduction: interface states
• Electrical interface state characterization techniques:
• Conductance method
• Terman method
• Berglund method
• Combined high and low frequency method
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD
• Full simulation of electrostatics
• GaAs/oxide interface properties
• In0.53Ga0.47As/oxide interface properties
• InP/oxide interface properties
• Electrostatic effect of interface states on MOS-HEMT devices
• Conclusions
37
MOS implant-free quantum-well transistor
Transistor geometry:
1. Highly doped n+ source and drain are in-situ grown and etched on top of the channel.
2. After surface clean, ALD Al2O3 oxide is grown followed by gate metal deposition.
3. Source and Drain areas are opened and contacted with a metal.
SI-InP substrate
100 nm ud-In0.53Al0.47As
30 nm ud-In0.53Ga0.47As
SiO2
Al2O3Gate metal
n+InGaAs
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD
0 20 40 60 80 100 120-1.5
-1
-0.5
0
0.5
Position (nm)
Po
ten
tial
(eV
)
38
SI-InP substrate
0 20 40 60 80 100 120-1.5
-1
-0.5
0
0.5
1
Position (nm)
Po
ten
tia
l (e
V)
Band diagrams: Off On
0
0.2
0.4
0.6
0.8
1
Su
rfa
ce
po
ten
tial
(V)
10-2
100
102
Se
mic
on
du
cto
r c
harg
e (
10
12/c
m2)
1D electrostatic device simulation: In0.53Ga0.47As/oxide interface
Device: - 4 nm EOT oxide.- Metal gate (Φm = 4.7 eV).- Dit distribution as measured on capacitors.
Off On
~3 1012 cm-3
mobile carriersin channel
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD
-1.5 -1 -0.5 0 0.5 1 1.5-0.2
Gate voltage Vg (V)
-1.5 -1 -0.5 0 0.5 1 1.510
-4
Gate voltage Vg (V)
Se
mic
on
du
cto
r c
harg
e (
10
39
Off On
On
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10
5
10
15
20
25
30
35
40
E-Ev (eV)
Dit (
10
12/e
Vc
m2
-
~2 1012 cm-3
fixed charges
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10
5
10
15
20
25
30
35
40
E-Ev (eV)
Dit (
10
12/e
Vcm
2
~1012 cm-3
fixed charges
Off
+
SS ~ 110 mV/dec.
Influence of Dit on the electrostatics of the device is relatively limited.
Gate oxide: 8 nm ALD Al2O3
Pretreatment: HCl + (NH4)2S
Channel: 30nm ud-InGaAs (53%)
FGA @ 370C,15min
10 µm gate length device:
Comparison to experimental data1
SI-InP substrate
100 nm ud-In0.53Al0.47As
30 nm ud-In0.53Ga0.47As
SiO2
Al2O3
Gate metal
n+InGaAs
CET 3.8 nm
S.S. 115 mV/dec
Low field mobility 1600 cm2/Vs
*
2
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD
30
20
10
0
gm
(m
S/m
m)
-3 -2 -1 0 1 2 3VG (V)
Vd
2.1V1.6V1.1V
0.6V0.1V
50
40
30
20
10
0
I d (
mA
/mm
)
2.52.01.51.00.50.0Vd (V)
Vg2V1.5V1V
0.5V
10 µm gate length device:
1A. Alian et al., submitted to Microelectronic Engineering (2010).2 H. Zhao et al., JVST B 27 (4), 2024 (2009).
Experimental subthreshold slope in agreement with measured Dit values
40
0
0.5
1
1.5
Su
rfa
ce
po
ten
tial
(V)
10-2
100
102
Sem
ico
nd
uc
tor
ch
arg
e (
10
12/c
m2)
Device: - 1 nm EOT oxide (1.6 nm CET).- 2 nm InP top layer – In0.53Ga0.47As channel.- Metal gate (Φm = 4.9 eV).- Dit distribution as measured on capacitors.
Off On
~3 1012 cm-3
mobile carriersin channel
* M. Radosavljevic et al., IEDM 2009.
*1D electrostatic device simulation: InP/oxide interface
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD
-0.2 0 0.2 0.4 0.6 0.8 1 1.2 1.40
10
20
30
40
50
Ef-E
v (eV)
In
terf
ac
e s
tate
de
nsit
y D
it (
10
12/e
Vc
m2)
Acceptor Dit
Donor Dit
-1.5 -1 -0.5 0 0.5 1 1.5
0
Gate voltage Vg (V)
-1.5 -1 -0.5 0 0.5 1 1.510
-4
Gate voltage Vg (V)
Sem
ico
nd
uc
tor
ch
arg
e (
10
41
Off On
~1012 cm-3
fixed charges
Off
+
SS ~ 90 mV/dec.
Influence of Dit on the electrostatics of the device is relatively limited.
-0.2 0 0.2 0.4 0.6 0.8 1 1.2 1.40
10
20
30
40
50
Ef-E
v (eV)
In
terf
ac
e s
tate
de
nsit
y D
it (
10
12/e
Vc
m2)
Acceptor Dit
Donor Dit
On
~ no fixed charges
ConclusionsSchematic representation of different III-V/amorphous oxide Dit profiles.
1
1.2
1.4
1.6
(eV
)
Acceptor D
it
Donor Dit
0.6
0.8
1
1.2
1.4
1.6
E-E
v (
eV
)
Acceptor Dit
Donor Dit
0.4
0.6
0.8
1
E-E
v (
eV
)
Acceptor Dit
Donor Dit
GaAs InP In0.53Ga0.47As
?
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD
1011
1012
1013
1014
0
0.2
0.4
0.6
0.8
E-E
v (
eV
)
Dit (1012/eVcm2)
1011
1012
1013
1014
0
0.2
0.4
Dit (1012/eVcm2)
10
1110
1210
1310
140
0.2
0.4
E-E
Dit (1012/eVcm2)
Despite high Dit in most parts of the bandgap, nMOS devices based on InP and InGaAs interfaces move the surface potential in an energy region close to the
FLSE with relatively low Dit, which makes close to ideal device operation possible.
42
Acknowledgements
European Commission for financial support in the DualLogic project no. 214579.
© IMEC 2010 / CONFIDENTIAL G. Brammertz, PT/LDD 43
IMEC core partners within the IIAP on Logic-DRAM.