Hong Xiao, Ph. D. k.htm 1 Chapter 2 Introduction of IC Fabrication Hong Xiao, Ph. D....
Transcript of Hong Xiao, Ph. D. k.htm 1 Chapter 2 Introduction of IC Fabrication Hong Xiao, Ph. D....
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Chapter 2Introduction of IC
Fabrication Hong Xiao, Ph. D.
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Objectives
• Define yield and explain its importance • Describe the basic structure of a cleanroom.• Explain the importance of cleanroom protocols• List four basic operations of IC processing• Name at least six process bays in an IC fab• Explain the purposes of chip packaging• Describe the standard wire bonding and flip-chip
bump bonding processes
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Wafer Process Flow
Materials
Design
Masks
IC Fab
Test
Packaging
Final Test
Thermal Processes
Photo-lithography
Etch PR strip
Implant PR strip
Metallization CMPDielectric deposition
Wafers
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Fab Cost
• Fab cost is very high, > $1B for 8” fab
• Clean room
• Equipment, usually > $1M per tool
• Materials, high purity, ultra high purity
• Facilities
• People, training and pay
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Wafer Yield
total
goodW Wafers
WafersY
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Die Yield
total
goodD Dies
DiesY
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Packaging Yield
total
goodC Chips
ChipsY
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Overall Yield
YT = YWYDYC
Overall Yield determines whether a fab is making profit or losing money
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How Does Fab Make (Loss) Money
• Cost: – Wafer (8”): ~$150/wafer*
– Processing: ~$1200 ($2/wafer/step, 600 steps)– Packing: ~$5/chip
• Sale:– ~200 chips/wafer– ~$50/chip (low-end microprocessor in 2000)
*Cost of wafer, chips per wafer, and price of chip varies, numbers here are choosing randomly based on general information.
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How Does a Fab Make (Loss) Money
• 100% yield: 150+1200+1000 = $2350/wafer• 50% yield: 150+1200+500 = $1850/wafer• 0% yield: 150+1200 = $1350/wafer
• 100% yield: 20050 = $10,000/wafer• 50% yield: 10050 = $5,000/wafer• 0% yield: 050 = $0.00/wafer
• 100% yield: 10000 2350 = $7650/wafer• 50% yield : 5000 1850 = $3150/wafer• 0% yield : 0 1350 = $1350/wafer
Cost:
Sale:
Profit Margin:
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Question
• If yield for every process step is 99%, what is the overall processing yield after 600 process steps?
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Answer
• It equals to 99% times 99% 600 times
• 0.99600 = 0.0024 = 0.24%
• Almost no yield
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Throughput
• Number of wafers able to process– Fab: wafers/month (typically 10,000)– Tool: wafers/hour (typically 60)
• At high yield, high throughput brought
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Defects and Yield
nDAY
)1(
1
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Yield and Die Size
Y = 28/32 = 87.5% Y = 2/6 = 33.3%
Killer Defects
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Illustration of a Production Wafer
Test die
Die
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Illustration of a Production Wafer
Scribe Lines
Dies
TestStructures
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Clean Room
• Artificial environment with low particle counts
• Started in medical application for post-surgery infection prevention
• Particles kills yield
• IC fabrication must in a clean room
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Clean Room
• First used for surgery room to avoid bacteria contamination
• Adopted in semiconductor industry in 1950
• Smaller device needs higher grade clean room
• Less particle, more expensive to build
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Clean Room Class
• Class 10 is defined as less than 10 particles with diameter larger than 0.5 m per cubic foot.
• Class 1 is defined as less than 1 such particles per cubic foot.
• 0.18 mm device require higher than Class 1 grade clean room.
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Cleanroom Classes
0.1
1
10
100
1000
10000
100000
Class 100,000Class 10,000Class 1,000
Class 100
Class 10Class 1
# of
par
ticle
s /
ft3
0.1 1.0 10
Particle size in micron
Class M-1
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Definition of Airborne Particulate Cleanliness Class per Fed. Std. 209E
Class
Particles/ft3
0.1 m 0.2 m 0.3 m 0.5 m 5 m
M-1 9.8 2.12 0.865 0.28
1 35 7.5 3 1
10 350 75 30 10
100 750 300 100
1000 1000 7
10000 10000 70
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Effect of Particles on Masks
Particles on Mask
Stump on +PR
Hole on PR
Film Film
Substrate Substrate
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Effect of Particle Contamination
Partially Implanted Junctions
Particle
Ion Beam
Photoresist
Screen Oxide
Dopant in PR
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Cleanroom Structure
Process Area
Equipment AreaClass 1000
Equipment AreaClass 1000
Raised Floor with Grid Panels
Return Air
HEPA Filter
Fans
Pump, RF and etc.
Process Tool
Process Tool
Makeup Air Makeup Air
Class 1
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Mini-environment
• Class 1000 cleanroom, lower cost
• Boardroom arrangement, no walls between process and equipment
• Better than class 1 environment around wafers and the process tools
• Automatic wafer transfer between process tools
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Mini-Environment Cleanroom
Class 1000
Class 1000
Raised Floor with Grid Panels
Return Air
HEPA Filter
Fans
Pump, RF and etc.
Process Tool
Makeup Air Makeup Air
Process Tool
HEPA Filter
< Class 1
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Gowning Area
Gown Racks
Benches
Shelf of Gloves, Hair and Shoe Covers Disposal Bins
Wash/Clean Stations
Storage
Shelf of Gloves
Shelf of Gloves
Entrance
To Cleanroom
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IC Fabrication Process Module
Photolithography
Thin film growth, dep. and/or CMP
Etching
PR Stripping PR Stripping
Ion Implantation
RTA or Diffusion
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Illustration of Fab FloorProcess Bays
Gowning Area
Corridor
Equipment Areas
Sliding Doors
Service Area
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Mini-environment Fab Floor
Gowning AreaEmergency Exits
Service Area
Process and metrology tools
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Wet Processes
DryDryEtch, PR strip, or clean Rinse
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Horizontal Furnace
Center Zone
Flat Zone
Distance
Temperature
Heating Coils
Quartz Tube Gas flow
Wafers
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Vertical FurnaceProcess Chamber
Wafers
Tower
Heaters
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Schematic of a Track Stepper Integrated System
Hot Plates
Prep Chamber
Chill Plates
Chill PlatesSpin Coater
Developer
Stepper
Wafer Movement
Wafer
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Cluster Tool with Etch and Strip Chambers
Transfer Chamber
PR Strip Chamber
Loading Station
Etch Chamber
PR Strip Chamber
Etch Chamber
Unloading Station
Robot
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Cluster Tool with Dielectric CVD and Etchback Chambers
Transfer Chamber
Loading Station
PECVD Chamber
O3-TOES Chamber
Unloading Station
Robot
Ar Sputtering Chamber
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Cluster Tool with PVD Chambers
Transfer Chamber
Loading Station
Ti/TiN Chamber
AlCu Chamber
Unloading Station
Robot
AlCu Chamber
Ti/TiN Chamber
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Dry-in Dry-out CMP System
Wafer Loading and Standby
Post-CMP Clean
Rinse
Dryer and Wafer Unloading
Multi-head Polisher
Polishing Pad
Clean Station
Polishing Heads
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Process Bay and Equipment Areas
Process Area
Equ
ipm
ent A
rea
Equ
ipm
ent A
rea
Process Tools
Tab
les
For
PC
and
M
etro
logy
Too
lsService Area
Sliding Doors
Wafer Loading Doors
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Test Results
Failed die
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Chip-Bond Structure
Chip (Silicon)Chip Backside Metallization
SolderSubstrate Metallization Substrate (Metal or Ceramic)
Microelectronics Devices and Circuits
Melt and Condense
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Wire Bonding
Metal Wire
Formation of molten metal ball
Bonding Pad Bonding Pad Bonding Pad
Press to make contact
Head retreat
Wire Clamp
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Wire Bonding
LeadBonding Pad Bonding Pad Lead
Lead contact with pressure and heat
Clamp closed with heat on to break the wire
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IC Chip with Bonding Pads
Bonding Pads
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IC Chip Packaging
Pins
Chip
BondingPad
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Chip with Bumps
Bumps
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Flip Chip Packaging
Chip
Bumps
Socket Pins
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Bump Contact
Chip
Bumps
Socket Pins
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Heating and Bumps Melt
Chip
Bumps
Socket Pins
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Flip Chip Packaging
Chip
Socket Pins
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Molding Cavity for Plastic Packaging
Bonding Wires IC Chip
Lead Frame
PinsChip Bond Metallization
Top Chase
Bottom Chase
Molding Cavity
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Ceramic Seal
Ceramic Cap
Bonding Wires IC Chip
Lead Frame, Layer 1
Pins
Cap Seal Metallization
Chip Bond Metallization
Layer 2Layer 2
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Summary
• Overall yield • Yield determines losing money or making
profit• Cleanroom and cleanroom protocols • Process bays• Process, equipment, and facility areas• Die test, wafer thinning, die separation, chip
packaging, and final test