Features• Compliant with specifications for IEEE- 802.3z Gigabit

Ethernet• Industry standard mezzanine height 1 x 9 package style

with integral duplex SC connector• Performance

HFBR-53A5VEMZ/FMZ:– 220 m links in 62.5/125 µm MMF 160 MHz* km cables– 275 m links in 62.5/125 µm MMF 200 MHz* km cables– 500 m links in 50/125 µm MMF 400 MHz* km cables– 550 m links in 50/125 µm MMF 500 MHz* km cables

• IEC 60825-1 Class 1/CDRH Class I laser eye safe• Single +3.3 V power supply operation with PECL

compatible logic interfaces and TTL Signal Detect• Wave solder and aqueous wash process compatible• RoHS compliant

Applications• Switch to switch interface• Switched backbone applications• High speed interface for file servers• High performance desktops

Related Products• Physical layer ICs available for optical or copper

interface (HDMP-1636A/1646A)• Quad Serdes IC available for high-density interface• Versions of this transceiver module also available for

+5 V operation (AFBR-53D5XZ/HFCT-53D5XXZ)• MT-RJ SFF fiber optic transceivers for Gigabit Ethernet

(HFBR/HFCT-5912EZ)• Gigabit Interface Converters (GBIC) Gigabit Ethernet

SX-AFBR-5601Z/LX-AFCT-5611Z

DescriptionThe HFBR-53A5VEMZ transceivers from AvagoTechnologies allow the system designer to implementa range of solutions for multimode Gigabit Ethernetapplications.

The overall Avago transceiver product consists ofthree sections: the transmitter and receiver opticalsubassemblies, an electrical subassembly, and thepackage housing which incorporates a duplex SCconnector receptacle.

Transmitter SectionThe transmitter section of the HFBR-53A5VEMZ/FMZconsists of an 850 nm Vertical Cavity Surface EmittingLaser (VCSEL) in an optical subassembly (OSA), whichmates to the fiber cable. The OSA is driven by acustom, silicon bipolar IC which converts differentialPECL compatible logic signals into an analog laserdiode drive current. The high speed output lines areinternally ac-coupled and differen-tially terminate witha 100 Ω resistor.

Receiver SectionThe receiver of the HFBR-53A5VEMZ/FMZ includes aGaAs PIN photo-diode mounted together with a custom,silicon bipolar transimpedance preamplifier IC in anOSA. This OSA is mated to a custom silicon bipolarcircuit that provides post-amplification andquantization.

The post-amplifier also includes a Signal Detect circuitwhich provides a TTL logic-high output upon detectionof a usable input optical signal level. The high speedoutput lines are internally ac-coupled.

HFBR-53A5VEMZ/HFBR-53A5VFMZ3.3 V 1 x 9 Fiber Optic Transceivers forGigabit Ethernet Low Voltage

Data Sheet

2

Package and Handling InstructionsFlammabilityThe HFBR-53A5VEMZ/FMZtransceiver housing is made ofhigh strength, heat resistant,chemically resistant, and UL94V-0 flame retardant plastic.

Recommended Solder and WashProcessThe HFBR-53A5VEMZ/FMZ iscompatible with industry-standard wave or hand solderprocesses.

Process PlugThis transceiver is supplied witha process plug (HFBR-5000) forprotection of the optical portswithin the duplex SC connectorreceptacle. This process plugprevents contamination duringwave solder and aqueous rinse aswell as during handling, shippingand storage. It is made of a high-temperature, molded sealingmaterial that can withstand 80°Cand a rinse pressure of 110 lbsper square inch.

Recommended Solder FluxesSolder fluxes used with theHFBR-53A5VEMZ/FMZ should bewater-soluble, organic fluxes.Recommended solder fluxesinclude Lonco 3355-11 fromLondon Chemical West, Inc. ofBurbank, CA, and 100 Flux fromAlpha-Metals of Jersey City, NJ.

Recommended Cleaning/DegradingChemicalsAlcohols: methyl, isopropyl,isobutyl.Aliphatics: hexane, heptane.Other: soap solution, naphtha.

Do not use partially halogenatedhydrocarbons such as 1,1.1trichloroethane, ketones such asMEK, acetone, chloroform, ethylacetate, methylene dichloride,phenol, methylene chloride, orN-methylpyrolldone. Also, Avago

does not recommend the use ofcleaners that use halogenatedhydrocarbons because of theirpotential environmental harm.

Regulatory Compliance(See the Regulatory ComplianceTable for transceiverperformance)The overall equipment design willdetermine the certification level.The transceiver performance isoffered as a figure of merit toassist the designer in consideringtheir use in equipment designs.

Electrostatic Discharge (ESD)There are two design cases inwhich immunity to ESD damageis important.

The first case is during handlingof the transceiver prior tomounting it on the circuit board.It is important to use normal ESDhandling precautions for ESDsensitive devices. These pre-cautions include using groundedwrist straps, work benches, andfloor mats in ESD controlledareas. The transceiver perform-ance has been shown to provideadequate performance in typicalindustry productionenvironments.

The second case to consider isstatic discharges to the exteriorof the equipment chassiscontaining the transceiver parts.To the extent that the duplex SCconnector receptacle is exposedto the outside of the equipmentchassis it may be subject towhatever system-level ESD testcriteria that the equipment isintended to meet. The transceiverperformance is more robust thantypical industry equipmentrequirements of today.

Electromagnetic Interference (EMI)Most equipment designs utilizingthese high-speed transceiversfrom Avago will be required tomeet the requirements of FCC inthe United States, CENELECEN55022 (CISPR 22) in Europeand VCCI in Japan. Refer to EMIsection (page 4) for more details.

ImmunityEquipment utilizing thesetransceivers will be subject toradio-frequency electromagneticfields in some environments.These transceivers have goodimmunity to such fields due totheir shielded design.

Eye SafetyThese laser-based transceiversare classified as AEL Class I (U.S.21 CFR(J) and AEL Class 1 perEN 60825-1 (+A11). They areeye safe when used within thedata sheet limits per CDRH. Theyare also eye safe under normaloperating conditions and underall reasonably forseeable singlefault conditions per EN60825-1.Avago has tested the transceiverdesign for compliance with therequirements listed below undernormal operating conditions andunder single fault conditionswhere applicable. TUV Rheinlandhas granted certification to thesetransceivers for laser eye safetyand use in EN 60950 and EN60825-2 applications. Theirperformance enables thetransceivers to be used withoutconcern for eye safety up tomaximum volts transmitter VCC.

3

Regulatory ComplianceFeature Test Method PerformanceElectrostatic Discharge MIL-STD-883C Class 1 (>1500 V).(ESD) to the Method 3015.7Electrical PinsElectrostatic Discharge Variation of IEC 61000-4-2 Typically withstand at least 15 kV without(ESD) to the damage when the duplex SC connectorDuplex SC Receptacle receptacle is contacted by a Human Body

Model probe.Electromagnetic FCC Class B Margins are dependent on customer board andInterference (EMI) CENELEC EN55022 Class B chassis designs.

(CISPR 22A)VCCI Class I

Immunity Variation of IEC 61000-4-3 Typically show no measurable effect from a10 V/m field swept from 80 to 1000 MHz appliedto the transceiver without a chassis enclosure.

Laser Eye Safety US 21 CFR, Subchapter J AEL Class I, FDA/CDRHand Equipment Type per Paragraphs 1002.10 HFBR-53A5V*MZ Accession #9720151Testing and 1002.12

EN 60825-1: 1994 + A1 + A2 AEL Class 1, TUV Rheinland of North AmericaEN 60825-2: 2000 HFBR-53A5V*MZ:EN 60950: 2000 Certificate #R72040311

Protection Class III

Component Underwriters Laboratories and UL File E173874Recognition Canadian Standards Association

Joint Component Recognitionfor Information TechnologyEquipment Including ElectricalBusiness Equipment.

RoHS Compliance Reference to EU RoHSDirective 2002/95/EC

CAUTION:There are no user serviceable partsnor any maintenance required forthe HFBR-53A5VEMZ/FMZ. Alladjustments are made at thefactory before shipment to ourcustomers. Tampering with ormodifying the performance of theHFBR-53A5VEMZ/FMZ will resultin voided product warranty. Itmay also result in improperoperation of the HFBR-

53A5VEMZ/FMZ circuitry, andpossible overstress of the lasersource. Device degradation orproduct failure may result.

Connection of theHFBR-53A5VEMZ/FMZ to anonapproved optical source,operating above the recom-mended absolute maximumconditions or operating theHFBR-53A5VEMZ/FMZ in a

manner inconsistent with itsdesign and function may result inhazardous radiation exposure andmay be considered an act ofmodifying or manufacturing alaser product. The person(s)performing such an act isrequired by law to recertify andreidentify the laser product underthe provisions of U.S. 21 CFR(Subchapter J).

4

data duty factor), then the outputoptical power will graduallychange its average output opticalpower level to its pre-set value.

The receiver section is internallyac-coupled between the pre-amplifier and the post-amplifierstages. The actual Data and Data-bar outputs of the post-amplifierare ac-coupled to their respectiveoutput pins (pins 2, 3). SignalDetect is a single-ended, TTLoutput signal that is dc-coupledto pin 4 of the module. SignalDetect should not be ac-coupledexternally to the follow-oncircuits because of its infrequentstate changes.

Caution should be taken toaccount for the proper intercon-nection between the supportingPhysical Layer integrated circuitsand this HFBR-53A5VEMZ/FMZtransceiver. Figure 3 illustrates arecommended interface circuitfor interconnecting to a dc PECLcompatible fiber-optictransceiver.

Eye Safety CircuitFor an optical transmitter deviceto be eye-safe in the event of asingle fault failure, the transmit-ter must either maintain normal,eye-safe operation or be disabled.

In the HFBR-53A5VEMZ/FMZthere are three key elements tothe laser driver safety circuitry: amonitor diode, a window detectorcircuit, and direct control of thelaser bias. The window detectioncircuit monitors the averageoptical power using the monitordiode. If a fault occurs such thatthe transmitter DC regulationcircuit cannot maintain the presetbias conditions for the laseremitter within ± 20%, thetransmitter will automatically be

APPLICATION SUPPORTOptical Power Budget and LinkPenaltiesThe worst-case Optical PowerBudget (OPB) in dB for a fiber-optic link is determined by thedifference between the minimumtransmitter output optical power(dBm avg) and the lowestreceiver sensitivity (dBm avg).This OPB provides the necessaryoptical signal range to establish aworking fiber-optic link. The OPBis allocated for the fiber-opticcable length and the corre-sponding link penalties. Forproper link performance, allpenalties that affect the linkperformance must be accountedfor within the link optical powerbudget. The Gigabit EthernetIEEE 802.3z standard identifies,and has modeled, thecontributions of these OPBpenalties to establish the linklength requirements for 62.5/125 µmand 50/125 µm multimode fiberusage. Refer to the IEEE 802.3zstandard and its supplementaldocuments that develop themodel, empirical results and finalspecifications.

Data Line InterconnectionsAvago’s HFBR-53A5VEMZ/FMZfiber-optic transceiver is designedfor compatible PECL signals. Thetransmitter inputs are internallyac-coupled to the laser drivercircuit from the transmitter inputpins (pins 7, 8). The transmitterdriver circuit for the laser lightsource is an ac-coupled circuit.This circuit regulates the outputoptical power. The regulated lightoutput will maintain a constantoutput optical power providedthe data pattern is reasonablybalanced in duty factor. If thedata duty factor has long, con-tinuous state times (low or high

disabled. Once this has occurred,only an electrical power reset willallow an attempted turn-on of thetransmitter.

Signal DetectThe Signal Detect circuit providesa deasserted output signal thatimplies the link is open or thetransmitter is OFF as defined bythe Gigabit Ethernet specificationIEEE 802.3z, Table 38.1. TheSignal Detect threshold is set totransition from a high to low statebetween the minimum receiverinput optional power and –30 dBmavg. input optical powerindicating a definite optical fault(e.g., unplugged connector for thereceiver or transmitter, brokenfiber, or failed far-end transmitteror data source). A Signal Detectindicating a working link isfunctional when receivingencoded 8B/10B characters. TheSignal Detect does not detectreceiver data error or error-rate.Data errors are determined bySignal processing following thetransceiver.

Electromagnetic Interference (EMI)One of a circuit board designer’sforemost concerns is the controlof electromagnetic emissionsfrom electronic equipment.Success in controlling generatedElectromagnetic Interference(EMI) enables the designer topass a governmental agency’sEMI regulatory standard; andmore importantly, it reduces thepossibility of interference toneighboring equipment. The EMIperformance of an enclosureusing these transceivers isdependent on the chassis design.Avago encourages using standardRF suppression practices andavoiding poorly EMI-sealedenclosures.

5

Recommended Operating Conditions

Parameter Symbol Min. Typ. Max. Unit ReferenceAmbient Operating Temperature TA 0 70 ˚CCase Temperature TC 80 ˚C 2Supply Voltage VCC 3.14 3.3 3.47 VPower Supply Rejection PSR 100 mVP–P 3Transmitter Differential Input Voltage VD 0.4 1.6 VData Output Load RDL 50 ΩTTL Signal Detect Output Current IOL 1.0 mATTL Signal Detect Output Current IOH –400 µA

Absolute Maximum RatingsStresses in excess of the absolute maximum ratings can cause catastrophic damage to the device. Limits apply to eachparameter in isolation, all other parameters having values within the recommended operating conditions. It should notbe assumed that limiting values of more than one parameter can be applied to the product at the same time. Exposureto the absolute maximum ratings for extended periods can adversely affect device reliability.

Parameter Symbol Min. Typ. Max. Unit ReferenceStorage Temperature TS –40 +100 ˚CSupply Voltage VCC –0.5 5.0 V 1Transmitter Differential Input Voltage VD 2.2 VRelative Humidity RH 5 95 %TTL Signal Detect Current – Low IOL, MAX –5 mATTL Signal Detect Current – High IOH, MAX 4.0 mA

Process Compatibility

Parameter Symbol Min. Typ. Max. Unit ReferenceHand Lead Soldering Temperature/Time TSOLD/tSOLD +260/10 ˚C/sWave Soldering and Aqueous Wash TSOLD/tSOLD +260/10 ˚C/s 4

Notes:1. The transceiver is class 1 eye safe up to VCC = 5.0 V.2. Case temperature measurement referenced to the center top of the internal metal transmitter shield.3. Tested with a 100 mVP–P sinusoidal signal in the frequency range from 10 Hz to 2 MHz on the VCC supply with the recommended power supply

filter in place. Typically less than a 1 dB change in sensitivity is experienced.4. Aqueous wash pressure < 110 psi.

6

Receiver Electrical Characteristics(TA = 0˚C to +70˚C, VCC = 3.14 V to 3.47 V)

Parameter Symbol Min. Typ. Max. Unit ReferenceSupply Current ICCR 80 135 mAPower Dissipation PDISR 0.26 0.47 WData Output Voltage – Peak to Peak VOPP 0.4 1.20 V 2 DifferentialData Output Rise Time tr 0.40 ns 3Data Output Fall Time tf 0.40 ns 3Signal Detect Output Voltage – Low VOL 0.6 V 4Signal Detect Output Voltage – High VOH 2.2 V 4Signal Detect Assert Time tSDA 100 µsSignal Detect Deassert Time tSDD 350 µs

HFBR-53A5VEMZ/FMZ, 850 nm VCSELTransmitter Electrical Characteristics(TA = 0˚C to +70˚C, VCC = 3.14 V to 3.47 V)

Parameter Symbol Min. Typ. Max. Unit ReferenceSupply Current ICCT 55 75 mAPower Dissipation PDIST 0.18 0.26 WLaser Reset Voltage VCCT–reset 2.5 2.0 V 1

Notes:1. The Laser Reset Voltage is the voltage level below which the VCCT voltage must be lowered to cause the laser driver circuit to reset from an

electrical/optical shutdown condition to a proper electrical/optical operating condition. The maximum value corresponds to the worst-casehighest VCC voltage necessary to cause a reset condition to occur. The laser safety shutdown circuit will operate properly with transmitter VCClevels of 2.5 Vdc ≤ VCC ≤ 5.0 Vdc.

2. These outputs are compatible with 10 K, 10 KH, and 100 K ECL and PECL inputs.3. These are 20-80% values.4. Under recommended operating conditions.

7

Receiver Optical Characteristics(TA = 0°C to +70°C, VCC = 3.14 V to 3.47 V)Parameter Symbol Min. Typ. Max. Unit ReferenceInput Optical Power PIN –17 0 dBm avg. 7Stressed Receiver Sensitivity 62.5 µm –12.5 dBm avg. 8

50 µm –13.5 dBm avg. 8Stressed Receiver Eye 201 ps 6, 9Opening at TP4Receive Electrical 3 dB 1500 MHz 10Upper Cutoff FrequencyOperating Center Wavelength λC 770 860 nmReturn Loss 12 dB 11Signal Detect – Asserted PA –17 dBm avg. 12Signal Detect – Deasserted PD –30 dBm avg. 12Signal Detect – Hysteresis PA – PD 1.5 dB 12

Notes:1. The maximum Optical Output Power complies with the IEEE 802.3z specification, and is class 1 laser eye safe.2. Optical Extinction Ratio is defined as the ratio of the average optical power of the transmitter in the high (“1”) state to the low (“0”) state.

Extinction Ratio shall be measured using the methods specified in TIA/EIA.526.4A. This measurement may be made with the node transmitting a36A.3 data pattern. The Saturation Ratio is measured under fully modulated conditions with worst case reflections. A36A.3 data pattern is arepeating K28.7 data pattern which generates a 125 mHz square wave.

3. These are unfiltered 20-80% values.4. Laser transmitter pulse response characteristics are specified by an eye diagram (Figure 1). The characteristics include rise time, fall time, pulse

overshoot, pulse undershoot, and ringing, all of which are controlled to prevent excessive degradation of the receiver sensitivity. Theseparameters are specified by the referenced Gigabit Ethernet eye diagram using the required filter. The output optical waveform complies with therequirements of the eye mask discussed in section 38.6.5 and Fig. 38-2 of IEEE 802.3z.

5. CPR is measured in accordance with EIA/TIA-526-14A as referenced in 802.3z, section 38.6.10.6. TP refers to the compliance point specified in 802.3z, section 38.2.1.7. The receive sensitivity is measured using a worst case extinction ratio penalty while sampling at the center of the eye.8. The stressed receiver sensitivity is measured using the conformance test signal defined in 802.3z, section 38.6.11. The conformance test signal is

conditioned by applying deterministic jitter and intersymbol interference.9. The stressed receiver jitter is measured using the conformance test signal defined in 802.3z, section 38.6.11 and set to an average optical power

0.5 dB greater than the specified stressed receiver sensitivity.10. The 3 dB electrical bandwidth of the receiver is measured using the technique outlined in 802.3z, section 38.6.12.11. Return loss is defined as the minimum attenuation (dB) of received optical power for energy reflected back into the optical fiber.12. With valid 8B/10B encoded data.

HFBR-53A5VEMZ/FMZ, 850 nm VCSELTransmitter Optical Characteristics(TA = 0°C to +70°C, VCC = 3.14 V to 3.47 V)Parameter Symbol Min. Typ. Max. Unit ReferenceOutput Optical Power POUT –9.5 –4 dBm avg. 150/125 µm, NA = 0.20 FiberOutput Optical Power POUT –9.5 –4 dBm avg. 162.5/125 µm, NA = 0.275 FiberOptical Extinction Ratio 9 dB 2Center Wavelength λC 830 850 860 nmSpectral Width – rms σ 0.85 nm rmsOptical Rise/Fall Time tr/tf 0.26 ns 3, 4, Figure 1RIN12 –117 dB/HzCoupled Power Ratio CPR 9 dB 5Total Transmitter Jitter 227 ps 6Added at TP2

8

Table 1. Pinout TablePin Symbol Functional DescriptionMounting Pins The mounting pins are provided for transceiver mechanical attachment to the circuit board. They

are embedded in the nonconductive plastic housing and are not connected to the transceiverinternal circuit, nor is there a guaranteed connection to the metallized housing in the EM and FM

versions. They should be soldered into plated-through holes on the printed circuit board.1 VEER Receiver Signal Ground

Directly connect this pin to receiver signal ground plane. (VEER = VEET)2 RD+ Receiver Data Out

AC coupled – PECL compatible.3 RD– Receiver Data Out Bar

AC coupled – PECL compatible.4 SD Signal Detect

Signal Detect is a single-ended TTL output. If Signal Detect output is not used, leave itopen-circuited.Normal optical input levels to the receiver result in a logic “1” output, VOH, asserted.Low input optical levels to the receiver result in a fault condition indicated by a logic “0” outputVOL, deasserted.

5 VCCR Receiver Power SupplyProvide +3.3 Vdc via the recommended receiver power supply filter circuit.Locate the power supply filter circuit as close as possible to the VCCR pin.

6 VCCT Transmitter Power SupplyProvide +3.3 Vdc via the recommended transmitter power supply filter circuit.Locate the power supply filter circuit as close as possible to the VCCT pin.

7 TD– Transmitter Data In-BarAC coupled – PECL compatible. Internally terminated differentially with 100 Ω.

8 TD+ Transmitter Data InAC coupled – PECL compatible. Internally terminated differentially with 100 Ω.

9 VEET Transmitter Signal GroundDirectly connect this pin to the transmitter signal ground plane.

Figure 1. Transmitter optical eye diagram mask. Figure 2. Pin-out.

1 = VEER

2 = RD+

3 = RD-

4 = SD

5 = VCCR

6 = VCCT

7 = TD-

8 = TD+

9 = VEET

TOP VIEW

NIC

NIC

NIC = NO INTERNAL CONNECTION (MOUNTING PINS)

RX

TX

0.8

0.5

0.2

0 0.22 0.375 0.78NORMALIZED TIME

-0.2NO

RM

AL

IZE

D A

MP

LIT

UD

E

1.0

1.0

0

1.3

0.625

9

Figure 3. Recommended Gigabit/sec Ethernet HFBR-53A5VEMZ/FMZ fiber-optic transceiver and HDMP-1636A/1646A SERDES integrated circuittransceiver interface and power supply filter circuits.

(8X) 2.540.100

20.320.800

20.320.800

1.9 ± 0.10.075 ± 0.004

(2X) ø

Ø0.000 M A

0.8 ± 0.10.032 ± 0.004

(9X) ø

Ø0.000 M A

–A–

TOP VIEW

Figure 4. Recommended board layout hole pattern.

9

8

7

6

5

4

3

1

PECLINPUT

OUTPUTDRIVER

CLOCKSYNTHESIS

CIRCUIT

PARALLELTO SERIAL

CIRCUIT

LASERDRIVERCIRCUIT

INPUTBUFFER

CLOCKRECOVERY

CIRCUIT

SERIAL TOPARALLEL

CIRCUIT

PRE-AMPLIFIER

POST-AMPLIFIER

SIGNALDETECTCIRCUIT

TO SIGNAL DETECT (SD)INPUT AT UPPER-LEVEL-IC

50 Ω

R14

1002

C4

10µF

C3

0.1µF

3.3 VC2

0.1 µF

C1

0.1µF

C8*

10 µF*

L2

1 µH

L1

1 µH

R13150

R12150

50 Ω

50 Ω

50 Ω

+

+

+3.3 Vdc

GND

TD+

TD-

RD-

RD+

TD+

TD-

RD-

RD+

SD

VCCR

VCCT

VEET

VEER

HFBR-53A5VEMZ/FMZFIBER-OPTIC

TRANSCEIVER

HDMP-1636A/-1646ASERIAL/DE-SERIALIZER

(SERDES - 10 BITTRANSCEIVER)

NOTES:USE SURFACE-MOUNT COMPONENTS FOR OPTIMUM HIGH-FREQUENCY PERFORMANCE.USE 50 Ω MICROSTRIP OR STRIPLINE FOR SIGNAL PATHS.LOCATE 50 Ω TERMINATIONS AT THE INPUTS OF RECEIVING UNITS.

VCC2 VEE2

SEE HDMP-1636A/-1646A DATA SHEET FORDETAILS ABOUT THIS TRANSCEIVER IC.

0.1µF

100 Ω

10

Figure 5. Package outline for HFBR-53A5VEMZ.

39.6(1.56) MAX.

AREARESERVED

FORPROCESS

PLUG

12.7(0.50)

25.4(1.00)MAX.

12.7(0.50)

20.32(0.800)

20.32(0.800)

DIMENSIONS ARE IN MILLIMETERS (INCHES).ALL DIMENSIONS ARE ± 0.025 mm UNLESS OTHERWISE SPECIFIED.

9.8(0.386)MAX.

+0.1 -0.050.25

+0.004 -0.002(0.010

3.3 ± 0.38(0.130 ± 0.015)

)

20.32(0.80)

SLOT WIDTH

4.7(0.185)

23.8(0.937)

+0.18 -0.060.47

+0.007 -0.002(0.019 )

9X ∅

1.3(0.051)2X ∅

15.8 ± 0.15(0.622 ± 0.006)

+0.25 -0.051.27

+0.010 -0.002(0.050 )

2X ∅

2.0 ± 0.1(0.079 ± 0.004)

29.6(1.16)

KEY:YYWW = DATE CODEFOR MULTIMODE MODULE: XXXX-XXXX = HFBR-53xx ZZZZ = 850 nm

8X 2.54(0.100)

10.2(0.40)

1.3(0.05)

MAX.2.09

(0.08)UNCOMPRESSED

UNCOMPRESSED

XXXX-XXXX ZZZZZ LASER PROD21CFR(J) CLASS 1COUNTRY OF ORIGIN YYWW

TX RX

A

A

11

Figure 6. Suggested module positioning and panel cut-out for HFBR-53A5VEMZ.

0.43

27.4 ± 0.50(1.08 ± 0.02)

1.014

9.4(0.374)

5.35(0.25)

MODULEPROTRUSION

+ 0.02– 0.01

10.9+ 0.5– 0.25

( )

2x0.8

(0.032)2x

0.8(0.032)

A

PCB BOTTOM VIEW

12

Figure 7. Package outline for HFBR-53A5VFMZ.

39.6(1.56)MAX.

AREARESERVED

FORPROCESS

PLUG

12.7(0.50)

25.4(1.00)MAX. 12.7

(0.50)

20.32(0.800)

20.32(0.800)

+0.1 -0.050.25

+0.004 -0.002(0.010

3.3 ± 0.38(0.130 ± 0.015)

2.54(0.100)

)

20.32(0.800)

2.2(0.09)

SLOT DEPTH SLOT WIDTH

4.7(0.185)

23.8(0.937)

+0.18 -0.060.47

+0.007 -0.002(0.019 )

9x ∅

1.3(0.051)2x ∅

15.8 ± 0.15(0.622 ± 0.006)

+0.25 -0.051.27

+0.010 -0.002(0.050 )

2x ∅

2.0 ± 0.1(0.079 ± 0.004)

14.4(0.57)

29.7(1.17)A

KEY:YYWW = DATE CODEFOR MULTIMODE MODULE: XXXX-XXXX = HFBR-53xx ZZZZ = 850 nm

XXXX-XXXX ZZZZZ LASER PROD21CFR(J) CLASS 1COUNTRY OF ORIGIN YYWW

TX RX

A

DIMENSIONS ARE IN MILLIMETERS (INCHES).ALL DIMENSIONS ARE ± 0.025 mm UNLESS OTHERWISE SPECIFIED.

8x

25.8(1.02)

MAX.

1.01(0.40)

10.2(0.40)

MAX.

22.0(0.87)

AREARESERVED

FORPROCESS

PLUG

9.8(0.386)

MAX.

13

Figure 8. Suggested module positioning and panel cut-out for HFBR-53A5VFMZ.

10.82(0.426)

26.4(1.04)

1.98(0.078)

13.82(0.544)

30.2(1.19)

14.73(0.58)

KEEP OUT ZONE

BOTTOM SIDE OF PCB

DIMENSION SHOWN FOR MOUNTING MODULEFLUSH TO PANEL. THICKER PANEL WILLRECESS MODULE. THINNER PANEL WILLPROTRUDE MODULE.

12.0(0.47)

0.36(0.014)

1.27(0.05)

OPTIONAL SEPTUM

DIMENSIONS ARE IN MILLIMETERS (INCHES).ALL DIMENSIONS ARE ± 0.025 mm UNLESS OTHERWISE SPECIFIED.

1.82(0.072)

AA

Ordering Information850 nm VCSEL (SX – Short Wavelength Laser)HFBR-53A5VEMZ Extended shield, metal housing.HFBR-53A5VFMZ Flush shield, metal housing.

For product information and a complete list of distributors, please go to our website: www.avagotech.com

Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries.Data subject to change. Copyright © 2006 Avago Technologies Limited. All rights reserved. Obsoletes 5989-4379ENAV01-0386EN August 17, 2006