Fqa6n70700v N-channel Mosfet
Transcript of Fqa6n70700v N-channel Mosfet
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2000 Fairchild Semiconductor International
December 2000
Rev. A2, December 2000
FQA6N70QFETQFETQFETQFET
TM
FQA6N70700V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchilds proprietary,
planar stripe, DMOS technology.
This advanced technology is especially tailored to minimize
on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation modes. These devices are
well suited for high efficiency switch mode power supply.
Features
6.4A, 700V, RDS(on) = 1.5 @ VGS = 10 V
Low gate charge ( typical 30 nC)
Low Crss ( typical 15 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
Absolute Maximum Ratings TC = 25C unless otherwise noted
Thermal Characteristics
Symbol Parameter FQA6N70 Units
VDSS Drain-Source Voltage 700 VID Drain Current - Continuous (TC = 25C) 6.4 A
- Continuous (TC = 100C) 4.05 A
IDM Drain Current - Pulsed (Note 1) 25.6 A
VGSS Gate-Source Voltage 30 V
EAS Single Pulsed Avalanche Energy (Note 2) 600 mJ
IAR Avalanche Current (Note 1) 6.4 A
EAR Repetitive Avalanche Energy (Note 1) 15.2 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns
PD Power Dissipation (TC = 25C) 152 W
- Derate above 25C 1.22 W/C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 C
TL
Maximum lead temperature for soldering purposes,
1/8 from case for 5 seconds 300 C
Symbol Parameter Typ Max Units
RJC Thermal Resistance, Junction-to-Case -- 0.82 C/W
RCS Thermal Resistance, Case-to-Sink 0.24 -- C/W
RJA Thermal Resistance, Junction-to-Ambient -- 40 C/W
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TO-3PFQA Series
G SD
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2000 Fairchild Semiconductor International
FQA6N70
(Note 4)
(Note 4, 5)
(Note 4, 5)
(Note 4)
Rev. A2, December 2000
Electrical Characteristics TC = 25C unless otherwise noted
Notes:1. Repetitive Rating : Pulse width limited by maximum junction temperature2. L = 27.2mH, IAS = 6.4A, VDD = 50V, RG = 25 ,Starting TJ = 25C3. ISD 6.2A, di/dt 200A/s, VDD BVDSS, Starting TJ = 25C
4. Pulse Test : Pulse width 300s, Duty cycle 2%5. Essentially independent of operating temperature
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 A 700 -- -- V
BVDSS
/ TJBreakdown Voltage TemperatureCoefficient ID = 250 A, Referenced to 25C -- 0.78 -- V/C
IDSSZero Gate Voltage Drain Current
VDS = 700 V, VGS = 0 V -- -- 10 A
VDS = 560 V, TC = 125C -- -- 100 A
IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA
On CharacteristicsVGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 A 3.0 -- 5.0 V
RDS(on) Static Drain-Source
On-ResistanceVGS = 10 V, ID = 3.2 A -- 1.16 1.5
gFS Forward Transconductance VDS = 50 V, ID = 3.2 A -- 6.4 -- S
Dynamic CharacteristicsCiss Input Capacitance VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 1100 1400 pF
Coss Output Capacitance -- 125 150 pF
Crss Reverse Transfer Capacitance -- 15 120 pF
Switching Characteristicstd(on) Turn-On Delay Time VDD = 350 V, ID = 6.2 A,
RG = 25
-- 25 60 ns
tr Turn-On Rise Time -- 70 150 ns
td(off) Turn-Off Delay Time -- 55 120 ns
tf Turn-Off Fall Time -- 50 110 ns
Qg Total Gate Charge VDS = 560 V, ID = 6.2 A,
VGS = 10 V
-- 30 40 nC
Qgs Gate-Source Charge -- 6.5 -- nC
Qgd Gate-Drain Charge -- 13 -- nC
Drain-Source Diode Characteristics and Maximum RatingsIS Maximum Continuous Drain-Source Diode Forward Current -- -- 6.4 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 25.6 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 6.4 A -- -- 1.4 V
trr Reverse Recovery Time VGS = 0 V, IS = 6.2 A,
dIF / dt = 100 A/s
-- 340 -- ns
Qrr Reverse Recovery Charge -- 2.7 -- C
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FQA6N70
Rev. A2, December 2000
0.2 0.4 0.6 0.8 1.0 1.2 1.410
-1
100
101
25150
Notes :1. V
GS=0V
2. 250s Pulse Test
IDR,
ReverseDrainCurrent[A]
VSD
, Source-Drain Voltage [V]
2 4 6 8 1010
-1
100
10
1
Notes :1. V
DS= 50V
2. 250s Pulse Test
-55
150
25
ID,DrainCurrent[A]
VGS
, Gate-Source Voltage [V]10
-110
010
1
10-1
100
101
VGS
Top : 15.0 V10.0 V8.0 V
7.0 V6.5 V6.0 V
Bottom: 5.5 V
Notes :1. 250s Pulse Test2. T
C= 25
ID,DrainCurrent[A]
VDS
, Drain-Source Voltage [V]
0 5 10 15 20 25 300
2
4
6
8
10
12
VDS
= 350V
VDS
= 140V
VDS
= 560V
Note : ID
= 6.2 A
VGS,Gate-SourceVoltage[V]
QG, Total Gate Charge [nC]
10-1
100
101
0
400
800
1200
1600
2000C
iss= C
gs+ C
gd(C
ds= shorted)
Coss
= Cds
+ Cgd
Crss
= Cgd
Notes :
1. VGS= 0 V2. f = 1 MHzCrss
Coss
Ciss
Capacitance[pF]
VDS
, Drain-Source Voltage [V]
0 4 8 12 16 200
1
2
3
4
VGS
= 20V
VGS
= 10V
Note : TJ= 25
RDS(ON)[
],
Drain-SourceOn-Resistance
ID, Drain Current [A]
Typical Characteristics
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current and
Temperature
Figure 2. Transfer CharacteristicsFigure 1. On-Region Characteristics
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FQA6N70
Rev. A2, December 2000
25 50 75 100 125 1500
1
2
3
4
5
6
7
ID,DrainCurrent[A]
TC, Case Temperature []
100
101
102
103
10-2
10-1
100
101
102
10s
DC
10 ms
1 ms
100s
Operation in This Area
is Limited by RDS(on)
Notes :
1. TC
= 25oC
2. TJ= 150
oC
3. Single Pulse
ID,DrainCurrent[A]
VDS, Drain-Source Voltage [V]
1 0-5
1 0-4
1 0-3
1 0-2
1 0-1
1 00
1 01
1 0-2
1 0-1
1 00
N o t e s :
1 . Z JC
( t ) = 0 . 8 2 / W M a x .
2 . D u t y F a c t o r , D = t1/t
2
3 . TJM
- TC
= PDM
* Z JC
(t )
s i n g l e p u l s e
D = 0 . 5
0 . 0 2
0 .2
0 . 0 5
0 . 1
0 . 0 1
Z
JC(t)
,Therm
alR
esponse
t1, S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
-100 -50 0 50 100 150 2000.0
0.5
1.0
1.5
2.0
2.5
3.0
Notes :1. V
GS= 10 V
2. ID
= 3.1 A
RDS(ON),(Normalized)
Drain-SourceOn-Resistance
TJ, Junction Temperature [
oC]
-100 -50 0 50 100 150 2000.8
0.9
1.0
1.1
1.2
Notes :1. V
GS=0V
2. ID=250A
BVDSS,(Normalized)
Drain-SourceBreakdownVoltage
TJ, Junction Temperature [
oC]
Typical Characteristics (Continued)
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
Figure 11. Transient Thermal Response Curve
t1
PDM
t2
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2000 Fairchild Semiconductor International
FQA6N70
Rev. A2, December 2000
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
Charge
VGS
10V
Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50K
200nF12V
Same Type
as DUT
Charge
VGS
10V
Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50K
200nF12V
Same Type
as DUT
VGS
VDS
10%
90%
td(on)
tr
t on t off
td(off) t
f
VDD
10V
VDSRL
DUT
RG
VGS
VGS
VDS
10%
90%
td(on)
tr
t on t off
td(off) t
f
VDD
10V
VDSRL
DUT
RG
VGS
EAS = L IAS2----
2
1--------------------
BVDSS - VDD
BVDSS
VDD
VDS
BVDSS
tp
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
L
I D
tp
EAS = L IAS2----
2
1EAS = L IAS
2----2
1----2
1--------------------
BVDSS - VDD
BVDSS
VDD
VDS
BVDSS
tp
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
LL
I DI D
tp
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FQA6N70
Rev. A2, December 2000
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
VDS
+
_
Driver
RG
Same Typeas DUT
VGS dv/dt controlled by RG ISD controlled by pulse period
VDD
L
I SD
10VVGS
( Driver )
I SD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D =Gate Pulse Width
Gate Pulse Period--------------------------
DUT
VDS
+
_
Driver
RG
Same Typeas DUT
VGS dv/dt controlled by RG ISD controlled by pulse period
VDD
LL
I SD
10VVGS
( Driver )
I SD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D =Gate Pulse Width
Gate Pulse Period--------------------------D =Gate Pulse Width
Gate Pulse Period--------------------------
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2000 Fairchild Semiconductor International
FQA6N70
Rev. A2, December 2000
Package Dimensions
15.60 0.20
4.80 0.2013.60 0.20
9.60 0.20
2.00 0.20
3.00 0.20
1.00 0.20 1.40 0.20
3.20 0.10
3.
80
0.
20
13.
90
0.
20
3.
50
0.
20
16.
50
0.
30
12.
76
0.
20
19.
90
0.
20
23.
40
0.
20
18.
70
0.
20
1.50+0.150.05
0.60+0.150.05
5.45TYP
[5.45 0.30]
5.45TYP
[5.45 0.30]
TO-3P
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2000 Fairchild Semiconductor International Rev. A, January 2000
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx
BottomlessCoolFET
CROSSVOLT
E2CMOS
FACT
FACT Quiet Series
FAST
FASTr
GTO
HiSeC
ISOPLANARMICROWIRE
POP
PowerTrench
QFET
QS
Quiet Series
SuperSOT-3
SuperSOT-6
SuperSOT-8
SyncFETTinyLogic
UHC
VCX
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PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
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when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
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PRODUCT STATUS DEFINITIONS
Definition of Terms
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Advance Information Formative or In
Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary First Production This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
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