FPGA (Field Programmable Gate Array)

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FPGA (Field Programmable Gate Array) Presented By: Obaid ur Rehman Badar Hussain

description

FPGA (Field Programmable Gate Array). Presented By: Obaid ur Rehman Badar Hussain . FPGA. * A Field Programmable Gate Array (FPGA) is a Programmable Logic Device(PLD) with higher densities and capable of implementing different functions in a short period of time. - PowerPoint PPT Presentation

Transcript of FPGA (Field Programmable Gate Array)

Page 1: FPGA (Field Programmable Gate Array)

FPGA (Field Programmable

Gate Array)

Presented By:Obaid ur Rehman

Badar Hussain

Page 2: FPGA (Field Programmable Gate Array)

FPGA* A Field Programmable Gate Array (FPGA)

is a Programmable Logic Device(PLD) with higher densities and capable of implementing different functions in a short period of time.

* Topics covered:-• FPGA Overview• Logic Block• FPGA Routing Techniques• Programming Methodology• FPGA Design Flow

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HistoryProgrammable Read Only Memory (PROM) fuse programming n- address i/p can implement n i/p logic fun.Problem:Area efficiency.

Programmable Logic Array (PLA)Programmable AND plane followed by

programmable or wired OR plane.Sum of product formProblem :Two level programming adds delay

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NextProgrammable Array Logic (PAL)Programmable AND plane and fixed OR

plane.Flexible comparably.

All these PLA and PAL are Simple Programmable Logic Devices (SPLD).

Problem:Logic plane structure grows rapidly with

number of inputs

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Next -To mitigate the problemComplex Programmable Logic Devices (CPLD)programmable interconnect multiple SPLDs. Problem :Extending to higher density difficultLess flexibility

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FPGA overview2-D array of logic blocks and flip-flops with

programmable interconnections.Compact designUser can configure

Intersections between the logic blocks The function of each block

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Why do we need FPGAs?World of Integrated Circuits

Full-CustomASICs

Semi-CustomASICs

UserProgrammable

PLD FPGA

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Which Way to Go?

ASICs FPGAs

Low development cost

Short time to market

Reprogrammable

High performance

Low power

Low cost inhigh volumes

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Other FPGA Advantages

Manufacturing cycle for ASIC is very costly, lengthy and engages lots of manpower

Mistakes not detected at design time have large impact on development time and cost

FPGAs are perfect for rapid prototyping of digital circuits

Easy upgrades like in case of softwareUnique applications

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Programming Methodology

Electrically programmable switches are used to program FPGA

Properties of programmable switch determine on- resistance, parasitic capacitance, volatility, reprogram ability, size etc.

Various programming techniques are:- SRAM programming technologyFloating Gate ProgrammingAnti fuse programming methodology

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SRAM programming technology

Use Static RAM cells to control pass gates or multiplexers.1= closed switch connection

0= open For mux, SRAM determines the mux input selection process.

Advantage• Fast re-programmability• Standard IC fabrication Tech. is

used Disadvantage• SRAM volatile • Requires large area

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Why better ?FPGA programmed using electrically

programmable switchesRouting architectures are complex.Logic is implemented using multiple levels of

lower fan-in gates.Shorter time to market Ability to re-program in the field to fix bugs

FPGA DISADVANTAGE FPGAs are generally slower than their

application-specific integrated circuit (ASIC) Can't handle as complex a design, and draw

more power.

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Application Reconfigurable computing. Applications of FPGAs include DSP,

software-defined radio. The inherent parallelism of the logic

resources on the FPGA allows for considerable compute throughput.

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FPGA Design and ProgrammingTo define the behavior of the FPGA the user provides

a hardware description language (HDL) or a schematic design.

Then, using an electronic design automation tool, a technology-mapped net list is generated.

The net list can then be fitted to the actual FPGA architecture using a process called place-and-route.

The user will validate the map, place and route results via timing analysis, simulation, and other verification methodologies.

Once the design and validation process is complete, the binary file generated used to configure the FPGA.

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*THANK YOU*