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Software Engineering I 1 Formal Methods: Requirements Techniques Formal Requirements Techniques Finite State Machines Petri Nets
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Formal Methods: Requirements Techniques. Formal Requirements Techniques Finite State Machines Petri Nets. Requirements. Describe the “What” not the “How” about phenomena of the appl. domain (not the machine) Requirements documents Serve as a contract between client and developer - PowerPoint PPT Presentation

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Software Engineering I

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Formal Methods: Requirements Techniques

• Formal Requirements Techniques– Finite State Machines– Petri Nets

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Requirements

• Describe the “What” not the “How” – about phenomena of the appl. domain (not the

machine)

• Requirements documents– Serve as a contract between client and developer– Identify functional capabilities of a system– Identify non-functional and environmental constraints

• A variety of techniques can be used to develop requirements specifications– natural language, data-flow diagrams, ER diagrams,

etc...

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Finite State Machines

• A requirements technique for modeling the states and transitions of a software system

• Finite state machines are used in other contexts– automata theory and compilers, for example

• More precise than data-flow diagrams– since data-flow diagrams specify only the nature

of a system’s data flow (e.g. the what and the where)

– whereas finite state machines provide information on how a system progresses from state to state

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Formal Definition

• The definition of a finite state machine (FSM) consists of five parts– a set of states– a set of inputs– a transition function– the initial state– a set of final states

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Simple Example

• States of a combination lock for a safe– Safe has a dial with three positions (1, 2, & 3)– The dial can be turned in two possible directions

¤ At any point six possible motions• Turn left to 1 (1L)• Turn right to 1 (1R)• etc...

– Combination is 1L, 3R, 2L– The possible states include the safe being locked

and unlocked, sounding the alarm, and the steps along the combination (e.g. 1L and 3R)

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Example, cont.

• Set of States (Locked, A, B, Unlocked, Alarm)• Set of Inputs (1L, 1R, 2L, 2R, 3L, 3R)• Transition Function (next two slides)• Initial State (Locked)• Final States (Unlocked, Alarm)

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Example, cont.

alarm

locked a b unlocked1L 3R 2L

X X X

any other input

initial state

final state

X

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Transition Table

Input

1L

1R

2L

2R

3L

3R

Locked

A

Alarm

Alarm

Alarm

Alarm

Alarm

A

Alarm

Alarm

Alarm

Alarm

Alarm

B

B

Alarm

Alarm

Alarm

Alarm

Alarm

Unlocked

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Finite State Machine Wrap-Up

• More advanced examples in other textbooks – The infamous “Elevator Example” is a good one

(Schach)

• Demonstrates– The specification power of FSMs

• Typical Problem– The number of states and transitions grows rapidly in

large systems– Approach: decompose problem into smaller subsystems

• Tool support exists for this and related techniques (e.g. statecharts)

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Petri Nets

• A formal technique suited for specifying the properties of concurrent or multithreaded systems

• Typical concurrency problems– race conditions

¤ X accesses Y before Z updates it

– deadlock¤ X is waiting on Y which is waiting on X

• Petri nets can be used to help avoid ambiguity in specifications that can lead to this class of problems in multithreaded systems

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Formal Definition of Petri Nets

• A Petri net consists of four parts– A set of places– A set of transitions– An input function– An output function

• In the subsequent diagrams, the input and output functions are represented by arrows

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Petri Net Parts

Place

Transition

Token

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Firing a transition

A transition fires when it has a token at each input place; as a result a token is placed at each output place.

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Simple Example

• A server cannot send an event to a client until the client has indicated that it is ready to receive one

• Approach– Map states into places– Map events into

transitions

• Events– Generate Event– Send Event– Process Event– Notify server

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Example, cont.

Event Generator Event Waiting Event Received Event Processed

Generate Event

Send EventProcess Event

Notify Server

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Example, cont.

Event Generator Event Waiting Event Received Event Processed

Generate Event

Send EventProcess Event

Notify Server

An event gets generated

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Example, cont.

Event Generator Event Waiting Event Received Event Processed

Generate Event

Send EventProcess Event

Notify Server

An event gets processed; waiting eventmust wait since “Send Event” cannot fire.

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Example, cont.

Event Generator Event Waiting Event Received Event Processed

Generate Event

Send EventProcess Event

Notify Server

Another event gets generated

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Example, cont.

Event Generator Event Waiting Event Received Event Processed

Generate Event

Send EventProcess Event

Notify Server

The client notifies the server

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Example, cont.

Event Generator Event Waiting Event Received Event Processed

Generate Event

Send EventProcess Event

Notify Server

An event is sent...

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Example, cont.

Event Generator Event Waiting Event Received Event Processed

Generate Event

Send EventProcess Event

Notify Server

Second event is processed...

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Example, cont.

Event Generator Event Waiting Event Received Event Processed

Generate Event

Send EventProcess Event

Notify Server

The client notifies the server

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Example, cont.

Event Generator Event Waiting Event Received Event Processed

Generate Event

Send EventProcess Event

Notify Server

Final event is sent...andeventually processed

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Final State

Event Generator Event Waiting Event Received Event Processed

Generate Event

Send EventProcess Event

Notify Server

Client is ready for next event

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Petri Net Wrap-Up

• Clean notation for specifying concurrent properties

• Graphical notation hides underlying formalism– Makes it easier to understand

• Tool support and execution engines exists for this technique– The latter can help in testing how well a Petri net

specifies a property by running it on test cases

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Overview - Formal Specifications

• Introduction to Formal Methods and Formal Specification

• Types of Formal Specification• Abstract Model Specifications• State Transition Specifications• Algebraic Specifications• Axiomatic Specifications

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Specification Implementation

synthesis

analysis

modeling

What are Formal Methods?

• Formal Method (FM) =– specification language + formal reasoning

• Body of techniques supported by– precise mathematics– powerful analysis tools

• Rigorous effective mechanisms for system– modeling– synthesis– analysis

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Formal Specifications: what and why?• Use of formalisms

– e.g., logic, discrete mathematics, finite state machines• To describe systems

– e.g., system models, constraints, specifications, designs• For broad range of effects

– e.g., highly reliable, secure, safe systems and more effective production

• With varying levels of use– guidance: structuring what to say– documentation: unambiguous communication– rigor: formal specification and proofs– mechanisms: proof assistance, testing

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Formal Specification inSoftware Development• Formal specifications ground the software

development process in the well-defined basis of computer science

• Orientation goes from customer to developer• Formal specification expressed in language whose

syntax and semantics are formally defined– hierarchical decomposition– mathematical foundation– graphical presentation– accompanied by informal description

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Goals and Objectives

• Requirements Specification– clarify customer's requirements– reveal ambiguity, inconsistency, incompleteness

• System/Software Design– decomposition structural specifications of component relations

and behavioral specification of components– refinement demonstrating that next level of abstraction satisfies

higher level

• Verification– proving a realization satisfies its specification

• Validation– testing and debugging

• Documentation– communication between specifier, implementor, customer, clients

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Specification and Design

Requirements-Analysis and

Definition

Requirements-Specification Design

Increasing contractor involvementDecreasing client involvementIncreasing formalism possible

DESIGN

SPECIFICATION

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Benefits of UsingFormal Specifications and Methods• higher quality software• verifiability of implementation• insight and understanding• minimized maintenance and cost• automated assistance• simulation, animation, execution• formal analysis• guidance for testing• transformation technology• reduced liability and risks• standards satisfaction

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Formal Methods are not yet widely used• Reasons

– emerging technology with unclear payoff– little experience– lack of automated support– not especially user friendly– too many in-place techniques and tools

• Excuses– high learning curve– mathematical sophistication required– techniques not widely applicable– ignorance of advances

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Desirable Properties ofFormal Specifications• Consistency

– an implementation exists that satisfies a specification

• Complete (incrementally)– all required aspects are specified

• Unambiguous– all implementations that satisfy the specification are

• Inference– consequence relation used to prove properties about

the implementations that satisfy a specification

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Types of Formal Specifications

• Behavioral specifications describe constraints on behavior of implementation – e.g.,– functionality– safety– security– performance

• Structural specifications describe constraints on internal composition of implementation– module interconnection– uses and is-composed-of– dependence relations

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Characteristics of Specification & Support• Model-oriented specifications

– specify system behavior by constructing a model in terms of well-defined mathematical constructs

• Property-oriented specifications– specify system behavior in terms of properties that must be satisfied

• Visual specifications– specify system behavior and structure by graphical depictions

• Executable specifications– specify system behavior completely enough that specifications can

run on a computer

• Tool support– syntactic checking– model checking– proof checking

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Basic Types of Behavioral Specification• Abstract Model Specifications

– defines operations in terms of well-defined mathematical model

• Algebraic Specifications– defines operations by a collection of equivalence

relations

• State Transition Specifications– defines operations in terms of states and transitions

• Axiomatic Specifications– defines operations by logical assertions

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Formal Specification Languages:Clock Example

+ Initially, the time is midnight, the bell is off, and the alarm is disabled.

+ Whenever the current time is the same as the alarm time and the alarm is enabled, the bell starts ringing.This is the only condition under which the bell begins to ring.

+ The alarm time can be set at any time.+ Only when the alarm is enabled can it be

disabled.+ If the alarm is disabled while the bell is

ringing, the bell stops ringing.+ Resetting the clock and enabling or

disabling the alarm are considered to be done instantaneously.

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Abstract Model Specifications

• Explicitly describes behavior in terms of a model using well-defined types (sets, sequences, relations, functions) and defines behavior by showing effects on model– State is explicit in the model– Objects can be built hierarchically

• Specification includes– type: syntax of object being specified– model: underlying structure– invariant: properties of modeled object– pre/post conditions: semantics of operations

• Pros and Cons– may suggest an implementation– widely applicable because of modeling orientation

• Various notations: VDM, Z, RAISE

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Abstract Model Specifications:Process using Z• Specification using Z abstract model

specifications– 1. establish the object schemas (objects and

attributes)¤ including invariant properties of objects

– 2. establish the operation schemas¤ schema modifiability ( delta vs. E schema)¤ operation signatures (input? vs. output!)¤ state modifications (attribute vs. attribute' )

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Abstract Model Specifications:the Z Notationspecification name [generic parameters]

signature

predicate

• a Z specification is a collection of schemas• a schema introduces some entities and invariant properties• the signature may make a defined schema visible• the schema signature defines each entity's name and type

(syntax)• the predicate defines the relationships between the entities that

must always hold (semantics)• should be supported by informal description

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Abstract Model Specifications:Z Clock

BellStatus: {quiet, ringing}, AlarmStatus: {disabled, enabled}Clock

time, alarm_time: Nbell: BellStatusalarm: AlarmStatus

InitClock

Clock

(time = midnight) (bell = quiet) (alarm = disabled)

Tick

Clock

(time = succ(time)) (alarm_time = time) (alarm = enabled) => (bell = ringing)(~((alarm_time = time) (alarm = enabled)) => (bell = bell)(alarm = alarm) (alarm_time = alarm_time)

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SetAlarmTimeClocknew_time

alarm_timenew_time?)((alarm_time = time) (alarm = enabled) => (bell = ringing) (~((alarm_time = time) (alarm = enabled)) => (bell = bell)(time = time) (alarm = alarm)

EnableAlarm Clock

(alarm = disabled) => (alarm = enabled) ( (alarm_time= time) => (bell = ringing) (~(alarm_time = time)) => (bell= bell) ) (time= time) (alarm_time= alarm_time)

DisableAlarm Clock

(alarm = enabled) => (alarm = disabled) (bell = quiet) (time = time) (alarm= alarm) (alarm_time= alarm_time)

Abstract Model Specifications:Z Clock, continued

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State Transition Specifications

• Explicitly describes system behavior by a set of states and defines operations as transitions between states or observations on state

• Specification includes– states: possible values– transitions: semantics by state transformations and

observations

• Pros and Cons– free of representational details (except augmentations)– state explosion is common– extensions to minimize states and modularize– particularly applicable to control systems, languages, hardware

• Graphical as well as textual notations: StateCharts, ASLAN, Paisley,InaJo, Special

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State Transition Specifications:State Charts Clock

off

ringing

CLOCK

tick alarm

up

quiet

on

[alarm_time = time]

enabled disabled

time':= succ(time)

time' := midnight

gettime

disabled

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Algebraic Specification

• Objects specified as algebraic sorts in terms of equivalence relations between associated operations– State is concealed in objects– Objects can be built hierarchically

• Specification includes– functionality: syntax and legal constructions– relations: semantics by equivalence classes

• Pros and Cons– only pure functions described (no side effects)– supports extensibility of data abstractions– often hard to comprehend and construct

• Various notations: OBJ, Larch, Clear, Anna

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Algebraic Specifications: Process

• Specification using algebraic sorts– 1. establish the sorts (objects and attributes)– 2. establish the necessary operations

¤ constructor operations¤ access operations

– 3. establish the equivalence relations¤ rule of thumb: a relation for each access over each

constructor¤ simplified when constructors defined in terms of imports

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Algebraic Specifications:a simple notationspecification name (generic parameters)

sort name

imports list of specification names

operation signatures

relations

• an algebraic specification is a collection of sorts• a sort specifies an object class (or abstract data type)• importing specifications makes their defined sorts visible• the operation signatures define each operation's name and the

sorts of parameters and results (syntax)• the relations define the effect of applying operations (semantics)• should be supported by informal description

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Algebraic Specifications:Algebraic CLOCK

operation signatures– init: –> CLOCK– tick: CLOCK –> CLOCK– setalarm: CLOCK x TIME –> CLOCK– enable: CLOCK –> CLOCK– disable: CLOCK –> CLOCK– time: CLOCK –> TIME– alarm_time: CLOCK –> TIME– bell: CLOCK –> {ringing, quiet}– alarm: CLOCK –> {on, off}

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Algebraic Specifications:Algebraic CLOCK, continuedrelations

– time(init) –> midnight– time(tick(C)) –> time(C) + 1– time(setalarm(C,T)) –> time(C)– time(enable(C)) –> time(C)– time(disable(C)) –> time(C)

– alarm_ time(init) –> midnight– alarm_ time(tick(C)) –> alarm_ time(C)– alarm_ time(setalarm(C,T)) –> T– alarm_ time(enable(C)) –> alarm_ time(C)– alarm_ time(disable(C)) –> alarm_ time(C)

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Algebraic Specifications:Algebraic CLOCK, continuedaxioms

bell(init) –> quietbell(tick(C)) –> (if alarm_time(tick(C)) = time(tick(C)) and alarm(C) = on

then ringing else quiet)bell(setalarm(C,T)) –> (if T = time(C) and alarm(C) = on

then ringing else quiet)bell(enable(C)) –> (if alarm_time(C) = time(tick(C))

then ringing else quiet)bell(disable(C)) –> quiet

alarm(init) –> offalarm(tick(C)) –> alarm(C)alarm(setalarm(C,T)) –> alarm(C)alarm(enable(C)) –> (if alarm(C) = off then on)alarm(disable(C)) –> (if alarm(C) = on then off)

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Axiomatic Specifications

• Implicitly defines behavior in terms of [first-order] logic formulas specifying input/output assertions

• Specification includes– operation interfaces: input/output parameters– operation axioms: pre/post assertions on input/output

¤ possibly also intermediate assertions• Pros and Cons

– fairly easy to understand – widely applicable (although hard to scale up)– most widely used technique in proving (inductive assertion method)– foundation of mathematics in software development

• Many languages support this type of specification: – VDM, Anna– Extensions include various logics for specific application domains

(e.g., temporal logic: RTIL, GIL)

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Axiomatic Specifications:VDM Clock

INIT()ext wr time: N, bell: {quiet, ringing}, alarm: {disabled,

enabled}pre truepost (time = midnight) (bell = quiet) (alarm= disabled)

TICK()ext wr time: N, bell: {quiet, ringing} rd alarm_time: N, alarm: {disabled, enabled}pre truepost (time = succ(time)) (if (alarm_time = time) (alarm

= enabled) then (bell = ringing) else (bell = bell)

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Axiomatic Specifications:VDM Clock, continued

SETALARMTIME(new_time: N)ext wr alarm_time: N, bell: {quiet, ringing}rd time: N, alarm: {disabled, enabled}pre truepost (alarm_timenew_time) (if (alarm_time = time) (alarm =

enabled) then (bell = ringing) else (bell = bell)ENABLEALARM()ext wr alarm: {disabled, enabled}, bell: {quiet, ringing}rd time: N, alarm_time: Npre alarm = disabledpost (alarm = enabled) (if (alarm_time = time)

then (bell = ringing) else (bell = bell)DISABLEALARM()ext wr alarm: {disabled, enabled}, bell: {quiet, ringing}pre alarm = enabledpost (alarm = disabled) (bell = quiet)

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Axiomatic Specifications:GIL ClockInitialization: initially the alarm is disabled and the bell is off

Won’t Ring: the bell is off from disabled to (enabled and time=alarm)

Will Ring: the bell is on from (enabled and time=alarm) to disabled

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Formal Specification ComparisonDiscussion• Formal Specification Languages differ in the

qualities and application domains for which they are best suited

• Axiomatic Specifications

• State Transition Specifications

• Abstract Model Specifications

• Algebraic Specifications