FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS...

38
IVI REV SIZE SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 1 2 3 4 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN HTG-ZRF8 Note Page PL: Banks 84, 87 FINAL VERSION REV. 1.0A This document contains proprietary and confidential information owned by HiTech Global , LLC. All rights reserved. www.HiTechGlobal.com 1PPS (GPS sync.) PWR 1: PL VCCINT (0.85V) 41 45 PWR 7: PSAUX, PSPLL, PSDDRPLL, PSIO, PSGTR 1 of 48 36 37 38 32 33 34 35 40 PWR IN, User IO, LEDs 29 30 Description Page 39 31 Note Page Page Description Block Diagram 1 28 27 26 24 25 PL: GTY 130, 131 (FMC) CLOCK 2: RF PLL I2C Switch 2 4 3 Power Diagram 5 6 PS: 501, 502. Micro SD socket. Clock Diagram 8 7 10 CLOCK 1: SYS, RAM, FMC, GTY, GTR 9 11 12 USB to UART PL: Banks 65, 66 (FMC LVDS I/O) DDR4 SODIMM (PL) PL: Banks 67-69 (DDR4 SODIMM) PS: MGT (GTR) 14 DIE Diagram 13 15 16 PL: Banks 64 (ARM Trace/Debug) and MICTOR 38 Receptacle 18 17 19 20 PL: GTY 128, 129 (PCIe) 22 21 23 PS 504: DDR4 RF, PS and PL: GND Pins RF, PS and PL: POWER Pins DDR4 Components 4-5 (PS) DDR4 Components 1-3 (PS) PCIE Edge Connector FMC+ PL sections L, M, Y, Z FMC+ PL sections F-K PWR 2: PL AUX (1.8V), BRAM and VCCINT_IO (0.85V) PWR 4: DDR4 and FMC PWR 5: FMC (3.3V) and 5V (USB, SATA) 42 43 44 PWR 6: PSINT_FP and PSINT_LP (0.85V) FMC+ PL sections A-E PWR 3: GTY PL Configuration PS: 500. QSPI Flashs (Configuration) and 1-Wire EEPROM PS Configuration. JTAG 46 CAPs RF: DAC RF: ADC CLOCK 3: RF Fanout USB 3.0 Ethernet 1Gbit Display Port and SATA 47 48 PWR 9: RF LDO PWR 8: RF DC/DC

Transcript of FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS...

Page 1: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C 1.0

IN

HTG-ZRF8

Note Page

PL: Banks 84, 87

FINAL VERSION REV. 1.0A

This document contains proprietary and confidentialinformation owned by HiTech Global , LLC.All rights reserved. www.HiTechGlobal.com

1PPS (GPS sync.)

PWR 1: PL VCCINT (0.85V)

41

45 PWR 7: PSAUX, PSPLL, PSDDRPLL, PSIO, PSGTR

1 of 48

36

37

38

32

33

34

35

40

PWR IN, User IO, LEDs

29

30

DescriptionPage

39

31

Note Page

Page Description

Block Diagram

1

28

27

26

24

25

PL: GTY 130, 131 (FMC)

CLOCK 2: RF PLL

I2C Switch

2

4

3

Power Diagram5

6

PS: 501, 502. Micro SD socket.

Clock Diagram

8

7

10

CLOCK 1: SYS, RAM, FMC, GTY, GTR

9

11

12

USB to UART

PL: Banks 65, 66 (FMC LVDS I/O)

DDR4 SODIMM (PL)

PL: Banks 67-69 (DDR4 SODIMM)

PS: MGT (GTR)

14

DIE Diagram

13

15

16

PL: Banks 64 (ARM Trace/Debug) and MICTOR 38 Receptacle

18

17

19

20

PL: GTY 128, 129 (PCIe)

22

21

23

PS 504: DDR4

RF, PS and PL: GND Pins

RF, PS and PL: POWER Pins

DDR4 Components 4-5 (PS)

DDR4 Components 1-3 (PS)

PCIE Edge Connector

FMC+ PL sections L, M, Y, Z

FMC+ PL sections F-K

PWR 2: PL AUX (1.8V), BRAM and VCCINT_IO (0.85V)

PWR 4: DDR4 and FMC

PWR 5: FMC (3.3V) and 5V (USB, SATA)

42

43

44 PWR 6: PSINT_FP and PSINT_LP (0.85V)

FMC+ PL sections A-E

PWR 3: GTY

PL Configuration

PS: 500. QSPI Flashs (Configuration) and 1-Wire EEPROM

PS Configuration. JTAG

46

CAPs

RF: DAC

RF: ADC

CLOCK 3: RF Fanout

USB 3.0

Ethernet 1Gbit

Display Port and SATA

47

48

PWR 9: RF LDO

PWR 8: RF DC/DC

Page 2: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C 1.0

IN

HTG-ZRF8

Block Diagram

CLOCK

See page 5POWER SUPPLY

See page 4

Pg.6-21

Pg.33

Pg.6

TDI

Protected1-Wire DDR4

2 of 48

JTAG

Zynq UltraScale+ RFSoC48HD, 299HP, 214PS, 16GTY, 4GTR, 8ADC, 8DAC

Edge connector

SODIMMI/O

TDI

Pg.34-36

TDOFMC+ x8

LA[0:33]

GTY

ZU25DR/ZU27DR/ZU28DR-FFVG1517

D[0:71]

SD

UART

QSPI

Pg.32

Pg.8

ComponentUSB to UART

Pg.26

x8 PCIE Gen4

I/O

I/O

TDO

ARM Debug

Pg.14

Connector

Pg.8

GTY

PS

PL

CF

G

Micro USBConnector

Pg.26

I/O

I/O

VITA 57.4

RF

ADC

Comparator

Pg.37

Pg.37

Pg.37

Schmitt-Trigger

I/OI/O

I/O

MMCX 50E

2 Components

Micro USBConnectorComponent

USB to UART

Pg.26

Micro SDConnector

Pg.9

Pg.26

Level TranslatorSD 3.0 Memory

Pg.9

Pg.30,31

DDR45 Components

Ethernet

SSMC Right

Transformer

x4

Transformer

Pg.19

ADC

DAC

Pg.19

Pg.37

Pg.29

SATA

DIP switchsPushbuttons

LEDs

Pg.38

I/O

MIO

ConnectorGTR

DisplayPortReceptacle

Mini

Pg.29

x2

EthernetRJ-45

Pg.28

PHY

Pg.28

DDR4

QSPI

Pg.27

USB 3.0 GTR

GTR

DP

LA

Transformer

ADCPg.18Pg.18

SSMC Right

Transformer

DAC

x4

x4

x4

SSMC Vertical

SSMC Vertical

Page 3: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

1.0

HTG-ZRF8

DIE Diagram

3 of 48

DIE VIEW

Bank 65

Bank 64

GTY 128

GTY 129

GTY 130

GTY 131

Bank 66

Bank 67

Bank 68

Bank 69

Bank 87 ADC 227

DAC 228

DAC 229

PS GTR 505

PS DDR 504

PS CONFIG 503

PS MIO 502

PS MIO 501

PS MIO 500

SSMC

FMC PL

FMC PL

SSMC

SSMC

FMC PL

FMC PL

USER

DDR4 PS

CONFIG

USB

SD

FLASH

Zynq UltraScale+ RFSoC48HD, 299HP, 214PS, 16GTY, 4GTR, 8ADC, 8DAC

ZU25DR/ZU27DR/ZU28DR-FFVG1517

PCIE

PCIE

DDR4 PL

DDR4 PL

DDR4 PL

ARM DebugConnector

Bank 84

USER

ADC 226

SSMC

ADC 225

SSMC

ADC 224

SSMCEthernet

USBDisplay Port

SATA

Page 4: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

1.0

HTG-ZRF8

Clock Diagram

4 of 48

!Clocks from FMC connectors are not presented!

DIE VIEW

Bank 65

Bank 64

GTY 128

GTY 129

GTY 130

GTY 131

Bank 66

Bank 67

Bank 68

Bank 69

Bank 87 ADC 227

DAC 228

DAC 229

PS GTR 505

PS DDR 504

PS CONFIG 503

PS MIO 502

PS MIO 501

PS MIO 500

SSMC

FMC PL

FMC PL

SSMC

SSMC

FMC PL

FMC PL

USER

DDR4 PS

CONFIG

FMC PS

FMC PS

FMC PS

SD

FLASH

Zynq UltraScale+ RFSoC48HD, 299HP, 214PS, 16GTY, 4GTR, 8ADC, 8DAC

ZU25DR/ZU27DR/ZU28DR-FFVG1517

PCIE

PCIE

DDR4 PL

DDR4 PL

DDR4 PL

ARM DebugConnector

Bank 84

USER

ADC 226

SSMC

ADC 225

SSMC

ADC 224

SSMC

871S1022Ex8 PCIe Jitter Att.

Pg.33 Pg.33

GENERATOR

Si5341MiniSMP

Pg.22

FMC PL

Pg.22

1234567

1

2

3

4

6

7

8

MiniSMP

Pg.22

SIT8103

Pg.22

OSC

33.33333MHz

LMX2592PLL

Pg.23

ADCLK944

CLK Buffer

Pg.24

ADCLK944

CLK Buffer

Pg.24

OSCXXX

Pg.23

SYSREF

SSMC

Pg.23

Pg.36

8

5

Page 5: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

1.0

Power Diagram

HTG-ZRF8

5 of 48

PG

DC/DC

LTM4650

EN

IN

0.85V@50A

VCCINT

Pg.39

0.9V@8A

Pg.41

DC/DC

LTM4644

PG

IN

EN

EN PG

12V

LED

GTY AVCC

1.2V@8AGTY AVTT

12V

LED

Pg.41

LDO

IN

EN

3.3V

OUT

TPS7A8001

1.8V@1AGTY AUX

0.85V@12A

Pg.40

DC/DC

LTM4644

PG

IN

EN

EN PG

12V1.8V@4A

TPS7A8001

0.85V@1A

Pg.45

LDO

IN

EN OUT

TPS73601

[email protected]_PLL

Pg.45

LDO

IN

EN

1.8V

OUT

TPS7A8001

1.8V@1A

Pg.45

LDO

IN

EN

3.3V

OUT

[email protected]

Pg.45

LDO

IN

EN

3.3V

OUT

TPS73618

0.85V@12A

Pg.44

DC/DC

LTM4644

PG

IN

EN

PGEN

12V

LED

LED

TPS7A8001

1.8V@1APS_500, 503

Pg.45

LDO

IN

EN

3.3V

OUT

3.3V

PS_DDRPLL

PS_GTR_AVCC

0.85V@4APS_INTLP

PS_INTFPDDRPS_INTFP

PS_AUXPS_ADC

Pg.45

LDO

IN

EN

3.3VOUT

PS_GTR_AVTT

TPS7A8001

1.8V@1A

AUX, AUX_IO

BRAMVCCINT_IO

LEDDDR4 VTT

DC/DC

Pg.42

PG

0.6V@3A

TPS51200

IN

IN

EN

3.3V

1.2V

Pg.42

DC/DC

LTM4644

PG

IN

EN

EN PG

12V

1.2V@8ADDR4

PGEN PS_501, 502

VADJ@4AFMC PL

LED

LED

&

PG

DC/DC

EN

IN

Pg.43

12V

3.3V@12A

FMC

LTM4644

LED

Pg.42

LDO

IN

EN

3.3V

OUT

TPS7A8001

2.5V@1ADDR4

Pg.46

DC/DC

LTM4644

PG

IN

EN

EN PG

1.1V@8ALDO

PGEN

12V

2.5V@4ALDO

3.5V@4ALDO

LED

Pg.47

LDO

IN

EN

1.1V

OUT

ADP1763

0.925V@3AADC AVCC

Pg.?

LDO

IN

EN

2.5V

OUT

ISL80103

1.8V@3AADC AUX

Pg.47

LDO

IN

EN

1.1V

OUT

ADP1763

0.925V@3ADAC AVCC

Pg.47

LDO

IN

EN

2.5V

OUT

ISL80103

1.8V@3ADAC AUX

Pg.47

LDO

IN

EN

3.5V

OUT

ISL80103

2.5V/3.0V@3ADAC AVTT

PG

PG

PG

PG

PG

Pg.47

LDO

IN

EN OUT

ADP1763

3.3V@3ACLOCK

PG LED

PCIe 6-PINSConnector

Pg.38

12V

Pg.28

LDO

IN

EN OUT

TPS7A8101

1.1V@1AEthernet

PG LED

3.5V

3.3V

3.3V

LDO

5V@4AUSB, SATA12V

PG LED

3.3V

EN

LED

LED

LED

VCCINT_AMSVCCSDFEC

Page 6: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

HTG-ZRF8

PS Configuration. JTAG

6 of 481.0

RESET

GND

VDD

MR

CT

SENSE

SU

PE

RV

ISO

R

*

NS

TI

Voltage Supervisor, Threshold 0.84V

SOT-23-6TPS3808G09DBV

5

4

3

6

2

1

0.1uF0.01uF 4.7K

4.7K

+3.3V

+PS_503

+3.3V

TDO_PS

+PS_503

PS_CLK 8

PS_PROG_N 10

PS_SRST_N

PS_M3

PS_M2

PS_M1

PS_M0

LED Green

LED Green

NDS331N

SOT-232

3

1

330E

330E

NDS331N

SOT-232

3

1

+3.3V

+3.3V

4.7K

4.7K

PS_DONE

PS_INIT_B

SOT-23

NDS331N

2

3

1

330E

330E

SOT-23

NDS331N

2

3

1

+3.3V

+3.3V

LED Red

475E

_1%

475E

_1%

PS_ERR_OUT

PS_ERR_STAT

+PS_503

PS_INIT_B

PS_DONE

PS_ERR_STAT

PS_ERR_OUT

TCK_PS

TMS_PS

+1.2V

4.7K

NS0E

PS_POR_N

PG_DDR4 42

4.7K

PS_POR_N

+PS_503

10E

SMD Pushbutton

1B2B

2A 1APS_PROG_N

SMD Pushbutton

1B2B

2A 1APS_SRST_N

10E

4.7K

PS_SRST_N

+PS_503

10K

4.7M

22pF

22pF

32.7

68kH

z

1A21B2

2B2

1B1

2B1

1A1

GND1

VCCAVCCB

1DIR

2A2

2A1

2DIR

1OE_N

2OE_N

GND2

VO

LTA

GE

TR

AN

SLA

TIO

N

B

DIR

A

GND

VCCAVCCB

TR

AN

SLA

TIO

N

NS 4.7K

0.1uF 0.1uF

34

34

0.1uF 0.1uF

512

10

13

11

4

8

116

2

7

6

3

15

14

9

Level I/Os Translator, 3-state outputs, 1.2V to 3.6V

TSSOP-16SN74AVC4T245PW

4

5

3

2

16

Level I/Os Translator 1.2V to 3.6V

SC70SN74AVC1T45DCKR

0E

+3.3V

+3.3V

+PS_503

+PS_503

TDO_PS

TCK_FMC

TDO_FMC_PL

TMS_FMC

TDI_FMC_PL

TDO_JTAG

TMS_JTAG

TCK_JTAG

NC12

GND1

VREF

PROG/TMS

GND3

CCLK/TCK

GND4

DONE/TDO

GND5

DIN/TDI

GND6

GND7

INIT/NC

GND21A21B2

2B2

1B1

2B1

1A1

GND1

VCCAVCCB

1DIR

2A2

2A1

2DIR

1OE_N

2OE_N

GND2

VO

LTA

GE

TR

AN

SLA

TIO

N

1

2

4

5

6

7

8

9

10

11

13

14

3

Pitch 2.00mm, SMDXilinx JTAG Header, 14 pins

87832-1420

J2347uFx6.3V

0805

+PS_503

TDI_JTAG

TDI_PS

0ENS

TDO_JTAG

TDO_PS

10K

10K

TCK_JTAG

+PS_503

0.1uF 0.1uF

SN74AVC4T245PWTSSOP-16

Level I/Os Translator, 3-state outputs, 1.2V to 3.6V

9

14

15

3

6

7

2

16 1

8

4

11

13

10

12 5

0E

+PS_503+PS_503

TMS_JTAG

0E

34

34

TCK_PS

TMS_PS

TDI_PS

+PS_503

R417

C373 C374

C416 C408

U50

U52

R397

C332

R454

R437

R440

C469 C454

U54

R457 R450C324

U41

C318

C313 R375

R388

D25

D1

Q28

R584

R586

Q23

R57

5

R46

8Q21

R585

R587

Q22

D2

R44

9

R44

4

R373

R389

R410

R399

PB2

PB1

R398

R409

R118

R14

2

C394

C395

ZQ

5

S2

5

6

7

8

4

3

2

1 ON

FHDS-4Pitch 1.27mm, SMD

DIP SWITCH FHDS-4330E

R143

PS_M0

PS_M3

PS_M2

PS_M1

4.7K

4.7K

+PS_503

4.7K

4.7K

R13

2

R13

4

R13

7

R13

8

M3

HL

L

BOOT

QSPI32

M2 M1 M0

QSPI24JTAG

SD1SD1-LS

L L LL L L

L H LL H L HH H H L

10E

22pF

330E

330E

330E

R456

C450

R144

R129

R131

R374

1.54K_1%

D26

LED Red

PS_503_DONE

PS_503_ERROR_OUT

PS_503_ERROR_STATUS

PS_503_INIT_B

PS_503_JTAG_TCK

PS_503_JTAG_TDI

PS_503_JTAG_TDO

PS_503_JTAG_TMS

PS_503_MODE0

PS_503_MODE1

PS_503_MODE2

PS_503_MODE3

PS_503_PADI

PS_503_PADO

PS_503_POR_B

PS_503_PROG_B

PS_503_REF_CLK

PS_503_SRST_B

VCCO1_PSIO3_503

VCCO2_PSIO3_503

AB27

AF30

AC32

AB26

AA29

AD31

AD32

AD30

AC31

AB30

AB31

AE32

AE31

AF31

AB29

AA27

AC30

AB28

AC29

AE30

G1517ZU28DR

U9

NS

Page 7: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

HTG-ZRF8

PL Configuration

7 of 481.0

NS0E

1K

0E NS

1K

220E@100MHz, 2A

4.7uFx6.3V

1000E@100MHz, 0.2A

0.22uF0.1uF

+1.8VSYS_MON_AVDD

1nF

100E_1%

100E_1%

XDAC_VP

XDAC_VN

XDAC_VP_F

XDAC_VN_F

XDAC_DXN

XDAC_DXP

R485

R477

R489

R490

FB18

C89

FB4

C91C526

C392

R422

R423

+VCCINT

+1.8V

DXN

DXP

GNDADC

POR_OVERRIDE

PUDC_B

VCCADC

VN

VP

VREFN

VREFP

AA16

AA17

V17

AF12

AF14

V16

Y16

W17

W16

Y17

G1517ZU28DR

U9

J241

HSR-2,54_1X2

HSR-2,54_1X2

1J27

Page 8: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

CS_N

SI/IO0SCK

SO/IO1

WP_N/IO2

HOLD_N/IO3

VCC

VSS

RST_N/RFU

VIO

FLA

SH

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

1.0

+PS_500

MIO5_QSPI_L_CS_N

MIO0_QSPI_L_CLK

PS: 500. Flashs (Configuration)

8 of 48

HTG-ZRF8

+PS_500

Flash Memory SPI, 512 Mbit, 133MHz, RST and VIO

SO-16WS25FL512SAGMFIR

Spansion Inc.

14

3

10

2

1

9

8

16 15

7

0.1uF0.1uF

MIO3_QSPI_L_DQ3

MIO1_QSPI_L_DQ1

MIO2_QSPI_L_DQ2

MIO4_QSPI_L_DQ0

+3.3V

CS_N

SI/IO0SCK

SO/IO1

WP_N/IO2

HOLD_N/IO3

VCC

VSS

RST_N/RFU

VIO

FLA

SH

MIO7_QSPI_U_CS_N

MIO12_QSPI_U_CLK

MIO11_QSPI_U_DQ3

MIO9_QSPI_U_DQ1

MIO10_QSPI_U_DQ2

MIO8_QSPI_U_DQ0

+PS_500

0ENS

0E

Flash Memory SPI, 512 Mbit, 133MHz, RST and VIO

SO-16WS25FL512SAGMFIR

Spansion Inc.

7

1516

8

9

1

2

10

3

14

0.1uF0.1uF

4.7K

4.7K

4.7K

+PS_500 +PS_500

4.7K

4.7K

+PS_500

4.7K

+PS_500

MIO5_QSPI_L_CS_N

MIO0_QSPI_L_CLK

MIO1_QSPI_L_DQ1

MIO4_QSPI_L_DQ0

MIO12_QSPI_U_CLK

MIO9_QSPI_U_DQ1

MIO8_QSPI_U_DQ0

MIO2_QSPI_L_DQ2

MIO3_QSPI_L_DQ3

MIO10_QSPI_U_DQ2

MIO11_QSPI_U_DQ3

MIO7_QSPI_U_CS_N

MIO14_I2C0_SCL

MIO15_I2C0_SDA25

25

MIO18_UART0_RXD

MIO19_UART0_TXD 26

26

38MIO21_USER_LED3_R

38MIO22_USER_LED4_R

38MIO24_USER_SW2 38

38MIO20_USER_LED2_G

38MIO13_USER_LED1_G

38

1-WIRE

NC4

GND

NC1

NC2

NC3 Sec

ret

2

6

1

3

4

5

1Kb Protected 1-Wire EEPROM

MAXIM

DS2432P+TSOC-6

12

4.7K

+3.3V

SECRET

MIO16_I2C1_SCL

MIO17_I2C1_SDA 8

8

U58

C65

R98

U7

R109

C66

R91

U55

C64C92

R11

2

R47

8

R51

2

R46

7

R11

5

R11

7

38

MIO23_USER_PB

MIO25_USER_SW3

MIO6_USER_SW1

MIO16_I2C1_SCL

MIO17_I2C1_SDA

+PS_5004.7K

R438

4.7KR431

VCCO1_PSIO0_500

VCCO2_PSIO0_500

PS_500_MIO0

PS_500_MIO1

PS_500_MIO10

PS_500_MIO11

PS_500_MIO12

PS_500_MIO13

PS_500_MIO14

PS_500_MIO15

PS_500_MIO16

PS_500_MIO17

PS_500_MIO18

PS_500_MIO19

PS_500_MIO2

PS_500_MIO20

PS_500_MIO21

PS_500_MIO22

PS_500_MIO23

PS_500_MIO24

PS_500_MIO25

PS_500_MIO3

PS_500_MIO4

PS_500_MIO5

PS_500_MIO6

PS_500_MIO7

PS_500_MIO8

PS_500_MIO9

Y29

W29

T27

V26

AA26

W26

T26

U27

R27

G1517

Zynq US+ RFSoC, 48HD, 299HP, 214PS, 16GTY, 4GTR, 8ADC, 8DACZU28DR

U9

U26

W27

R26

P26

V27

P28

N29

R28

P29

U28

R29

T29

Y27

W28

Y26

V28

V29

Y28

U29

Page 9: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

1.0

PS: 501, 502. Micro SD socket.

9 of 48

HTG-ZRF8

+PS_501

+PS_502

MIO51_SDIO_CLK

MIO50_SDIO_CMD

MIO49_SDIO_DAT3

MIO48_SDIO_DAT2

MIO47_SDIO_DAT1

MIO46_SDIO_DAT0

MIO40_SDIO_DIR_CMD

MIO42_SDIO_DIR_DAT1

MIO41_SDIO_DIR_DAT0

MIO45_SDIO_DETECT

MIO44_SDIO_PROTECT

MIO39_SDIO_SEL

GND4

GND3

GND2

GND1

CD

DATA1

DATA0

Vss

CLK

CMD

CD/DATA3

Vdd

DATA2

MIC

RO

SD

CA

RD

RE

AD

ER

1

4

2

3

5

6

7

8

9

10

11

12

13

J35

47352-1001SMD

Micro SD Card Reader

Molex

4.7K

R264

NS

mSD_CMD

mSD_CK

mSD_D0

mSD_D1

mSD_D2

mSD_D3

+VCC_SD

10uFx6.3V0603

C222

+VCC_SD

mSD_D2

mSD_D3

mSD_D0

mSD_D1

mSD_CMD

mSD_CK

MIO51_SDIO_CLK

MIO50_SDIO_CMD

MIO49_SDIO_DAT3

MIO48_SDIO_DAT2

MIO47_SDIO_DAT1

MIO46_SDIO_DAT0

MIO40_SDIO_DIR_CMD

MIO42_SDIO_DIR_DAT1

MIO41_SDIO_DIR_DAT0

MIO45_SDIO_DETECT

MIO44_SDIO_PROTECT

MIO45_SDIO_DETECT

4.7K

4.7K

+PS_501

+PS_501

0.1uF

R27

4

R27

5

C225

R25624E

R26624E

R26924E

R25524E

R26524E

10uFx6.3V

C223

HSR-2,54_1X3

JP1

1+3.3V

MIO43_USER_SW4 38

PS_501_MIO26

PS_501_MIO27

PS_501_MIO28

PS_501_MIO29

PS_501_MIO30

PS_501_MIO31

PS_501_MIO32

PS_501_MIO33

PS_501_MIO34

PS_501_MIO35

PS_501_MIO36

PS_501_MIO37

PS_501_MIO38

PS_501_MIO39

PS_501_MIO40

PS_501_MIO41

PS_501_MIO42

PS_501_MIO43

PS_501_MIO44

PS_501_MIO45

PS_501_MIO46

PS_501_MIO47

PS_501_MIO48

PS_501_MIO49

PS_501_MIO50

PS_501_MIO51

VCCO1_PSIO1_501

VCCO2_PSIO1_501

VCCO1_PSIO2_502

VCCO2_PSIO2_502

PS_502_MIO52

PS_502_MIO53

PS_502_MIO54

PS_502_MIO55

PS_502_MIO56

PS_502_MIO57

PS_502_MIO58

PS_502_MIO59

PS_502_MIO60

PS_502_MIO61

PS_502_MIO62

PS_502_MIO63

PS_502_MIO64

PS_502_MIO65

PS_502_MIO66

PS_502_MIO67

PS_502_MIO68

PS_502_MIO69

PS_502_MIO70

PS_502_MIO71

PS_502_MIO72

PS_502_MIO73

PS_502_MIO74

PS_502_MIO75

PS_502_MIO76

PS_502_MIO77

G25

C25

F25

B25

D25

C26

A26

A27

B27

E26

C27

F26

E27

B28

D26

C28

E28

D28

F27

G27

A29

C29

D29

B29

F29

E29

B26

E25

G1517

Zynq US+ RFSoC, 48HD, 299HP, 214PS, 16GTY, 4GTR, 8ADC, 8DACZU28DR

U9

H24

J27

N26

L25

M26

J25

L26

H25

H26

H27

J26

G28

K26

G29

K27

L27

N27

J28

H29

M27

K28

H28

J29

K29

M28

N28

M29

L29

G1517

Zynq US+ RFSoC, 48HD, 299HP, 214PS, 16GTY, 4GTR, 8ADC, 8DACZU28DR

U9

27

27

27

27

27

27

27

27

MIO55_USB_NXT

MIO53_USB_DIR

MIO58_USB_STP

MIO52_USB_CLK

MIO56_USB_D0

MIO57_USB_D1

MIO54_USB_D2

MIO59_USB_D3

MIO60_USB_D4

MIO61_USB_D5

MIO62_USB_D6

MIO63_USB_D7

27

27

27

27

28MIO77_ETH_MDIO

MIO76_ETH_MDC

MIO70_ETH_RX_CLK

MIO75_ETH_RX_CTRL

MIO71_ETH_RX_D0

MIO72_ETH_RX_D1

MIO73_ETH_RX_D2

MIO74_ETH_RX_D3

MIO64_ETH_TX_CLK

MIO69_ETH_TX_CTRL

MIO65_ETH_TX_D0

MIO66_ETH_TX_D1

MIO67_ETH_TX_D2

MIO68_ETH_TX_D3

28

28

28

28

28

28

28

28

28

28

28

28

28

MIO29_DP_OE

MIO27_DP_AUX_OUT

MIO30_DP_AUX_IN

MIO28_DP_HPD

29

29

29

29

GND1

VCCBVCCA

DAT3B

DAT2B

DAT0A

DAT1B

DAT0B

CMDB

CD

WP

DAT3A

DAT2A

DAT1A

DAT123-dir

DAT0-dir

CMDA

CMD-dir

CLK-f

CLKA

CLKB

SD

Car

d Le

vel T

rans

lato

r

RSV1 RSV2

GND2

U27

C4

C2A4

C5

C1

E2

A2

D2

A3

E3

E1

A1

B1

E4

D3

D4

D5

E5

D1

A5

B5

B3 B4

C3

SN74AVCA406EZQSBGA-24

SD and MMC Card Level Translator

TI

+1.8V

+VCC_SD

TP5

TP6

Page 10: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

HTG-ZRF8

PS 504: DDR4

1.0

10 of 48

DDR4_PS_CK_C

DDR4_PS_CK_T

DDR4_PS_A[8]

DDR4_PS_A[6]

DDR4_PS_A[11]

DDR4_PS_A[4]

DDR4_PS_A[1]

DDR4_PS_BA[1]

DDR4_PS_A[12]

DDR4_PS_A[3]

DDR4_PS_A[10]

DDR4_PS_A[14]

DDR4_PS_A[13]

DDR4_PS_BA[0]

DDR4_PS_A[9]

DDR4_PS_A[2]

DDR4_PS_A[0]

DDR4_PS_A[5]

DDR4_PS_A[7]

DDR4_PS_A[15]

DDR4_PS_A[16]

DDR4_PS_CKE

DDR4_PS_CS_N

DDR4_PS_PAR

DDR4_PS_ACT_N

DDR4_PS_ODT

DDR4_PS_RST_N

DDR4_PS_BG[0]

DDR4_PS_ALERT_N

DDR4_PS_DQ[2]

DDR4_PS_DQ[4]

DDR4_PS_DQ[7]

DDR4_PS_DQ[5]

DDR4_PS_DQ[6]

DDR4_PS_DQ[1]

DDR4_PS_DQ[3]

DDR4_PS_DQ[0]

DDR4_PS_DQ[9]

DDR4_PS_DQ[8]

DDR4_PS_DQ[14]

DDR4_PS_DQ[12]

DDR4_PS_DQ[10]

DDR4_PS_DQ[11]

DDR4_PS_DQ[15]

DDR4_PS_DQ[13]

DDR4_PS_DQ[22]

DDR4_PS_DQ[18]

DDR4_PS_DQ[20]

DDR4_PS_DQ[19]

DDR4_PS_DQ[21]

DDR4_PS_DQ[23]

DDR4_PS_DQ[16]

DDR4_PS_DQ[17]

DDR4_PS_DQ[24]

DDR4_PS_DQ[27]

DDR4_PS_DQ[30]

DDR4_PS_DQ[26]

DDR4_PS_DQ[31]

DDR4_PS_DQ[29]

DDR4_PS_DQ[25]

DDR4_PS_DQ[28]

DDR4_PS_DQ[35]

DDR4_PS_DQ[36]

DDR4_PS_DQ[32]

DDR4_PS_DQ[38]

DDR4_PS_DQ[33]

DDR4_PS_DQ[37]

DDR4_PS_DQ[39]

DDR4_PS_DQ[34]

DDR4_PS_DQ[43]

DDR4_PS_DQ[46]

DDR4_PS_DQ[45]

DDR4_PS_DQ[42]

DDR4_PS_DQ[44]

DDR4_PS_DQ[40]

DDR4_PS_DQ[41]

DDR4_PS_DQ[47]

DDR4_PS_DQ[54]

DDR4_PS_DQ[52]

DDR4_PS_DQ[55]

DDR4_PS_DQ[53]

DDR4_PS_DQ[51]

DDR4_PS_DQ[48]

DDR4_PS_DQ[49]

DDR4_PS_DQ[50]

DDR4_PS_DQ[57]

DDR4_PS_DQ[62]

DDR4_PS_DQ[58]

DDR4_PS_DQ[56]

DDR4_PS_DQ[60]

DDR4_PS_DQ[63]

DDR4_PS_DQ[61]

DDR4_PS_DQ[59]

DDR4_PS_DQ[65]

DDR4_PS_DQ[66]

DDR4_PS_DQ[69]

DDR4_PS_DQ[67]

DDR4_PS_DQ[71]

DDR4_PS_DQ[70]

DDR4_PS_DQ[64]

DDR4_PS_DQ[68]

DDR4_PS_DQS_T[1]

DDR4_PS_DQS_C[1]

DDR4_PS_DQS_T[0]

DDR4_PS_DQS_C[0]

DDR4_PS_DM_DBI_N[1]

DDR4_PS_DM_DBI_N[0]

DDR4_PS_DQS_T[3]

DDR4_PS_DQS_C[3]

DDR4_PS_DQS_T[2]

DDR4_PS_DQS_C[2]

DDR4_PS_DM_DBI_N[3]

DDR4_PS_DM_DBI_N[2]

DDR4_PS_DQS_T[5]

DDR4_PS_DQS_C[5]

DDR4_PS_DQS_T[4]

DDR4_PS_DQS_C[4]

DDR4_PS_DM_DBI_N[4]

DDR4_PS_DM_DBI_N[5]

DDR4_PS_DQS_T[7]

DDR4_PS_DQS_C[7]

DDR4_PS_DQS_T[6]

DDR4_PS_DQS_C[6]

DDR4_PS_DM_DBI_N[7]

DDR4_PS_DM_DBI_N[6]

DDR4_PS_DM_DBI_N[8]

DDR4_PS_DQS_T[8]

DDR4_PS_DQS_C[8]

30

+VCC_PSDDRPLL

240E_1%

R447

30,31

30,31

30,31

30,31

30,31

30,31

30,31

30,31

30,31

30,31

30,31

30,31

30,31

30,31

30,31

30,31

30,31

30,31

30,31

30,31

30,31

30,31

30,31

30,31

30,31

30,31

30,31

30,31

30,31

PS_DDR_A0

PS_DDR_A1

PS_DDR_A10

PS_DDR_A11

PS_DDR_A12

PS_DDR_A13

PS_DDR_A14

PS_DDR_A15

PS_DDR_A16

PS_DDR_A17

PS_DDR_A2

PS_DDR_A3

PS_DDR_A4

PS_DDR_A5

PS_DDR_A6

PS_DDR_A7

PS_DDR_A8

PS_DDR_A9

PS_DDR_ACT_N

PS_DDR_ALERT_N

PS_DDR_BA0

PS_DDR_BA1

PS_DDR_BG0

PS_DDR_BG1

PS_DDR_CK0

PS_DDR_CK1

PS_DDR_CKE0

PS_DDR_CKE1

PS_DDR_CK_N0

PS_DDR_CK_N1

PS_DDR_CS_N0

PS_DDR_CS_N1

PS_DDR_ODT0

PS_DDR_ODT1

PS_DDR_PARITY

PS_DDR_RAM_RST_N

PS_DDR_ZQ

VCCO1_PSDDR_504

VCCO2_PSDDR_504

VCCO3_PSDDR_504

VCCO4_PSDDR_504

VCCO5_PSDDR_504

VCCO6_PSDDR_504

VCCO7_PSDDR_504

VCC1_PSDDR_PLL

VCC2_PSDDR_PLL

VCC3_PSDDR_PLL

VCC1_PSINTFP_DDR

VCC2_PSINTFP_DDR

VCC3_PSINTFP_DDR

VCC4_PSINTFP_DDR

PS_DDR_DM0

PS_DDR_DM1

PS_DDR_DM2

PS_DDR_DM3

PS_DDR_DM4

PS_DDR_DM5

PS_DDR_DM6

PS_DDR_DM7

PS_DDR_DM8

PS_DDR_DQ0

PS_DDR_DQ1

PS_DDR_DQ10

PS_DDR_DQ11

PS_DDR_DQ12

PS_DDR_DQ13

PS_DDR_DQ14

PS_DDR_DQ15

PS_DDR_DQ16

PS_DDR_DQ17

PS_DDR_DQ18

PS_DDR_DQ19

PS_DDR_DQ2

PS_DDR_DQ20

PS_DDR_DQ21

PS_DDR_DQ22

PS_DDR_DQ23

PS_DDR_DQ24

PS_DDR_DQ25

PS_DDR_DQ26

PS_DDR_DQ27

PS_DDR_DQ28

PS_DDR_DQ29

PS_DDR_DQ3

PS_DDR_DQ30

PS_DDR_DQ31

PS_DDR_DQ32

PS_DDR_DQ33

PS_DDR_DQ34

PS_DDR_DQ35

PS_DDR_DQ36

PS_DDR_DQ37

PS_DDR_DQ38

PS_DDR_DQ39

PS_DDR_DQ4

PS_DDR_DQ40

PS_DDR_DQ41

PS_DDR_DQ42

PS_DDR_DQ43

PS_DDR_DQ44

PS_DDR_DQ45

PS_DDR_DQ46

PS_DDR_DQ47

PS_DDR_DQ48

PS_DDR_DQ49

PS_DDR_DQ5

PS_DDR_DQ50

PS_DDR_DQ51

PS_DDR_DQ52

PS_DDR_DQ53

PS_DDR_DQ54

PS_DDR_DQ55

PS_DDR_DQ56

PS_DDR_DQ57

PS_DDR_DQ58

PS_DDR_DQ59

PS_DDR_DQ6

PS_DDR_DQ60

PS_DDR_DQ61

PS_DDR_DQ62

PS_DDR_DQ63

PS_DDR_DQ64

PS_DDR_DQ65

PS_DDR_DQ66

PS_DDR_DQ67

PS_DDR_DQ68

PS_DDR_DQ69

PS_DDR_DQ7

PS_DDR_DQ70

PS_DDR_DQ71

PS_DDR_DQ8

PS_DDR_DQ9

PS_DDR_DQS_N0

PS_DDR_DQS_N1

PS_DDR_DQS_N2

PS_DDR_DQS_N3

PS_DDR_DQS_N4

PS_DDR_DQS_N5

PS_DDR_DQS_N6

PS_DDR_DQS_N7

PS_DDR_DQS_N8

PS_DDR_DQS_P0

PS_DDR_DQS_P1

PS_DDR_DQS_P2

PS_DDR_DQS_P3

PS_DDR_DQS_P4

PS_DDR_DQS_P5

PS_DDR_DQS_P6

PS_DDR_DQS_P7

PS_DDR_DQS_P8

AV31

AW28

AT31

AT32

AT30

AU32

AR28

AP30

AP28

AK29

AV28

AU29

AW31

AU28

AL29

AM30

AM29

AP29

AL30

AL32

AN30

AM32

AN32

AL31

AU30

AR29

AW30

AR32

AV30

AT29

AW29

AR31

AV32

AP31

AN31

AM33

AN33

AM31

AP27

AP32

AT28

AT33

AV29

AV34

AD25

AD26

AF26

AG29

AH28

AJ28

AJ29

G1517

Zynq US+ RFSoC, 48HD, 299HP, 214PS, 16GTY, 4GTR, 8ADC, 8DACZU28DR

U9

AU23

AT27

AL24

AM27

AV36

AT35

AM36

AJ32

AR38

AW25

AW24

AU25

AR27

AU27

AV26

AV27

AW26

AP25

AP24

AP23

AN25

AV25

AM25

AK24

AN23

AK23

AK26

AL25

AK28

AK27

AN27

AN26

AW23

AN28

AM28

AU39

AU38

AU37

AU35

AV38

AW36

AV35

AW35

AV23

AU33

AV33

AW34

AW33

AR34

AR33

AP33

AP34

AL39

AM38

AV22

AM39

AN38

AM35

AM34

AN36

AN35

AK32

AK31

AJ31

AJ30

AR24

AH30

AG32

AF32

AG30

AT36

AR36

AT39

AP35

AR39

AP38

AR23

AP36

AP39

AT25

AP26

AU24

AT26

AM24

AL27

AW37

AU34

AN37

AH32

AT37

AT24

AR26

AM23

AL26

AV37

AT34

AM37

AH31

AR37

G1517

Zynq US+ RFSoC, 48HD, 299HP, 214PS, 16GTY, 4GTR, 8ADC, 8DACZU28DR

U9

+1.2V

+VCC_PSINT_FP

Page 11: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

1.0

HTG-ZRF8

11 of 48

PS: MGT (GTR)

RX

TX

CLK

IN

PS_MGTRRXN0_505

PS_MGTRRXN1_505

PS_MGTRRXN2_505

PS_MGTRRXN3_505

PS_MGTRRXP0_505

PS_MGTRRXP1_505

PS_MGTRRXP2_505

PS_MGTRRXP3_505

PS_MGTRTXN0_505

PS_MGTRTXN1_505

PS_MGTRTXN2_505

PS_MGTRTXN3_505

PS_MGTRTXP0_505

PS_MGTRTXP1_505

PS_MGTRTXP2_505

PS_MGTRTXP3_505

PS_MGTREFCLK0N_505

PS_MGTREFCLK0P_505

PS_MGTREFCLK1N_505

PS_MGTREFCLK1P_505

PS_MGTREFCLK2N_505

PS_MGTREFCLK2P_505

PS_MGTREFCLK3N_505

PS_MGTREFCLK3P_505

AJ39

AG39

AE39

AC39

AJ38

AG38

AE38

AC38

AK37

AH37

AF37

AD37

AK36

AH36

AF36

AD36

AJ35

AJ34

AG35

AG34

AE35

AE34

AC35

AC34

G1517

Zynq US+ RFSoC, 48HD, 299HP, 214PS, 16GTY, 4GTR, 8ADC, 8DACZU28DR

U9

!DON'T SWAP THE LINES!

27

27

29

29

27

27

29

29

USB3_TX_N

USB3_TX_P

SATA_TX_N

SATA_TX_P

USB3_RX_P

USB3_RX_N

SATA_RX_N

SATA_RX_P

29

29

29

29

DP_TX0_N

DP_TX0_P

DP_TX1_N

DP_TX1_P

22

22

22

22

22

22

GTR_505_REFCLK2_P

GTR_505_REFCLK2_N

GTR_505_REFCLK3_P

GTR_505_REFCLK3_N

GTR_505_REFCLK1_P

GTR_505_REFCLK1_N

Page 12: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

1.0

HTG-ZRF8

PL: Banks 84, 87

12 of 48

+3.3V+3.3V

Up

to 3

.3V

HR

IO_L12N_AD0N_84

IO_L12P_AD0P_84

IO_L11N_AD1N_84

IO_L11P_AD1P_84

IO_L10N_AD2N_84

IO_L10P_AD2P_84

IO_L9N_AD3N_84

IO_L9P_AD3P_84

IO_L8N_HDGC_AD4N_84

IO_L8P_HDGC_AD4P_84

IO_L7N_HDGC_AD5N_84

IO_L7P_HDGC_AD5P_84

IO_L6N_HDGC_AD6N_84

IO_L6P_HDGC_AD6P_84

IO_L5N_HDGC_AD7N_84

IO_L5P_HDGC_AD7P_84

IO_L4N_AD8N_84

IO_L4P_AD8P_84

IO_L3N_AD9N_84

IO_L3P_AD9P_84

IO_L2N_AD10N_84

IO_L2P_AD10P_84

IO_L1N_AD11N_84

IO_L1P_AD11P_84

VCCO1_84

VCCO2_84

Up

to 3

.3V

HR

IO_L12N_AD8N_87

IO_L12P_AD8P_87

IO_L11N_AD9N_87

IO_L11P_AD9P_87

IO_L10N_AD10N_87

IO_L10P_AD10P_87

IO_L9N_AD11N_87

IO_L9P_AD11P_87

IO_L8N_HDGC_87

IO_L8P_HDGC_87

IO_L7N_HDGC_87

IO_L7P_HDGC_87

IO_L6N_HDGC_87

IO_L6P_HDGC_87

IO_L5N_HDGC_87

IO_L5P_HDGC_87

IO_L4N_AD12N_87

IO_L4P_AD12P_87

IO_L3N_AD13N_87

IO_L3P_AD13P_87

IO_L2N_AD14N_87

IO_L2P_AD14P_87

IO_L1N_AD15N_87

IO_L1P_AD15P_87

VCCO1_87

VCCO2_87

AP5

AP6

AR6

AR7

AV7

AU7

AV8

AU8

AT6

AT7

AU5

AT5

AU3

AU4

AV5

AV6

AU1

AU2

AV2

AV3

AW3

AW4

AW5

AW6

AP7

AU6

G1517

Zynq US+ RFSoC, 48HD, 299HP, 214PS, 16GTY, 4GTR, 8ADC, 8DACZU28DR

U9

A9

A10

A6

A7

A5

B5

C5

C6

B9

B10

B7

B8

D8

D9

C7

C8

C10

D10

D6

E7

E8

E9

E6

F6

B6

C9

G1517

Zynq US+ RFSoC, 48HD, 299HP, 214PS, 16GTY, 4GTR, 8ADC, 8DACZU28DR

U9

22

22

8

38

38

38

38

37

37

37

37

37

33

35,38

34,35

38

23

23

23

23

SECRET

IRIG_COMP_OUT

IRIG_ADC_SCLK

IRIG_ADC_SDO

IRIG_ADC_CS_N

IRIG_TRIG_OUT

PL_USER_LED1_G

PCIE_WAKE_N

PL_USER_LED3_R

PL_USER_LED4_R

PL_USER_LED2_G

FMC_PL_PG_M2C

FMC_PL_PRSNT_M2C_L

HSPC_PL_PRSNT_M2C_L

CLK_PL_USER1_P

CLK_PL_USER1_N

RF_PLL_CSB

RF_PLL_SCK

RF_PLL_SDI

RF_PLL_MUXout

26

26

26

26

26

26

26

26

38

26

UART_PL_RTS

UART_PL_RXD

UART_PL_RST_N

UART_PL_GPIO1

UART_PL_TXD

UART_PL_CTS

UART_PL_SUSPEND_N

USB_PL_PERI_PWR

PL_USER_PB

UART_PL_GPIO0

25

25

25

I2C_SCL_PL

I2C_RST_N_PL

I2C_SDA_PL

Page 13: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

HTG-ZRF8

PL: Banks 67-69 (DDR4 SODIMM)

13 of 48

VRP_67VRP_69

32

+1.2V+1.2V+1.2V

1.0

+1.2V

+0.84V

+VREF_DDR4

+VREF_DDR4_PL_CA

+VREF_DDR4_PL_DQ

0.1uF

4.30K_1%

240E

_1%

240E

_1%

10.0K_1%

0.1uF

R146

0E

0.22uF

C536

0.22uF

C510

C509R469

R46

5

R48

3

R470C524

VRP_68

240E

_1%

R51

4

Up

to 1

.8V

HP

IO_L1N_T0L_N1_DBC_68

IO_L1P_T0L_N0_DBC_68

IO_L2N_T0L_N3_68

IO_L2P_T0L_N2_68

IO_L3N_T0L_N5_AD15N_68

IO_L3P_T0L_N4_AD15P_68

IO_L4N_T0U_N7_DBC_AD7N_68

IO_L4P_T0U_N6_DBC_AD7P_68

IO_L5N_T0U_N9_AD14N_68

IO_L5P_T0U_N8_AD14P_68

IO_L6N_T0U_N11_AD6N_68

IO_L6P_T0U_N10_AD6P_68

IO_L7N_T1L_N1_QBC_AD13N_68

IO_L7P_T1L_N0_QBC_AD13P_68

IO_L8N_T1L_N3_AD5N_68

IO_L8P_T1L_N2_AD5P_68

IO_L9N_T1L_N5_AD12N_68

IO_L9P_T1L_N4_AD12P_68

IO_L10N_T1U_N7_QBC_AD4N_68

IO_L10P_T1U_N6_QBC_AD4P_68

IO_L11N_T1U_N9_GC_68

IO_L11P_T1U_N8_GC_68

IO_L12N_T1U_N11_GC_68

IO_L12P_T1U_N10_GC_68

IO_L13N_T2L_N1_GC_QBC_68

IO_L13P_T2L_N0_GC_QBC_68

IO_L14N_T2L_N3_GC_68

IO_L14P_T2L_N2_GC_68

IO_L15N_T2L_N5_AD11N_68

IO_L15P_T2L_N4_AD11P_68

IO_L16N_T2U_N7_QBC_AD3N_68

IO_L16P_T2U_N6_QBC_AD3P_68

IO_L17N_T2U_N9_AD10N_68

IO_L17P_T2U_N8_AD10P_68

IO_L18N_T2U_N11_AD2N_68

IO_L18P_T2U_N10_AD2P_68

IO_L19N_T3L_N1_DBC_AD9N_68

IO_L19P_T3L_N0_DBC_AD9P_68

IO_L20N_T3L_N3_AD1N_68

IO_L20P_T3L_N2_AD1P_68

IO_L21N_T3L_N5_AD8N_68

IO_L21P_T3L_N4_AD8P_68

IO_L22N_T3U_N7_DBC_AD0N_68

IO_L22P_T3U_N6_DBC_AD0P_68

IO_L23N_T3U_N9_68

IO_L23P_T3U_N8_68

IO_L24N_T3U_N11_68

IO_L24P_T3U_N10_68

IO_T0U_N12_VRP_68

IO_T1U_N12_68

IO_T2U_N12_68

IO_T3U_N12_68

VREF_68

VCCO1_68

VCCO2_68

VCCO3_68

J7

J8

J9

K9

H6

H7

G8

H8

G6

G7

F9

G9

K12

K13

K10

K11

F10

F11

J13

J14

J10

J11

H10

H11

G12

G13

H12

H13

F14

G14

E12

E13

E11

F12

D14

E14

B12

C12

C13

D13

B13

B14

B15

C15

A11

A12

A14

A15

F7

G10

D11

C11

K14

D12

G11

H14

G1517

Zynq US+ RFSoC, 48HD, 299HP, 214PS, 16GTY, 4GTR, 8ADC, 8DACZU28DR

U9

Up

to 1

.8V

HP

IO_L24N_T3U_N11_67

IO_L24P_T3U_N10_67

IO_L23N_T3U_N9_67

IO_L23P_T3U_N8_67

IO_L22N_T3U_N7_DBC_AD0N_67

IO_L22P_T3U_N6_DBC_AD0P_67

IO_L21N_T3L_N5_AD8N_67

IO_L21P_T3L_N4_AD8P_67

IO_L20N_T3L_N3_AD1N_67

IO_L20P_T3L_N2_AD1P_67

IO_L19N_T3L_N1_DBC_AD9N_67

IO_L19P_T3L_N0_DBC_AD9P_67

IO_T3U_N12_67

IO_T2U_N12_67

IO_L18N_T2U_N11_AD2N_67

IO_L18P_T2U_N10_AD2P_67

IO_L17N_T2U_N9_AD10N_67

IO_L17P_T2U_N8_AD10P_67

IO_L16N_T2U_N7_QBC_AD3N_67

IO_L16P_T2U_N6_QBC_AD3P_67

IO_L15N_T2L_N5_AD11N_67

IO_L15P_T2L_N4_AD11P_67

IO_L14N_T2L_N3_GC_67

IO_L14P_T2L_N2_GC_67

IO_L13N_T2L_N1_GC_QBC_67

IO_L13P_T2L_N0_GC_QBC_67

IO_L12N_T1U_N11_GC_67

IO_L12P_T1U_N10_GC_67

IO_L11N_T1U_N9_GC_67

IO_L11P_T1U_N8_GC_67

IO_L10N_T1U_N7_QBC_AD4N_67

IO_L10P_T1U_N6_QBC_AD4P_67

IO_L9N_T1L_N5_AD12N_67

IO_L9P_T1L_N4_AD12P_67

IO_L8N_T1L_N3_AD5N_67

IO_L8P_T1L_N2_AD5P_67

IO_L7N_T1L_N1_QBC_AD13N_67

IO_L7P_T1L_N0_QBC_AD13P_67

IO_T1U_N12_67

IO_T0U_N12_VRP_67

IO_L6N_T0U_N11_AD6N_67

IO_L6P_T0U_N10_AD6P_67

IO_L5N_T0U_N9_AD14N_67

IO_L5P_T0U_N8_AD14P_67

IO_L4N_T0U_N7_DBC_AD7N_67

IO_L4P_T0U_N6_DBC_AD7P_67

IO_L3N_T0L_N5_AD15N_67

IO_L3P_T0L_N4_AD15P_67

IO_L2N_T0L_N3_67

IO_L2P_T0L_N2_67

IO_L1N_T0L_N1_DBC_67

IO_L1P_T0L_N0_DBC_67

VREF_67

VCCO1_67

VCCO2_67

VCCO3_67

A21

A20

B20

C20

A22

B22

C22

C21

A24

B24

B23

C23

A25

D20

D21

E21

E23

E22

D24

D23

E24

F24

F20

G20

F22

F21

G23

H23

G22

H22

H20

J20

H21

J21

K24

L24

J24

J23

G24

K23

L20

L19

L23

L22

K22

K21

L21

M20

M19

N19

N21

N20

N18

D22

G21

K20

U9

ZU28DRZynq US+ RFSoC, 48HD, 299HP, 214PS, 16GTY, 4GTR, 8ADC, 8DAC

G1517

Up

to 1

.8V

HP

IO_L24N_T3U_N11_69

IO_L24P_T3U_N10_69

IO_L23N_T3U_N9_69

IO_L23P_T3U_N8_69

IO_L22N_T3U_N7_DBC_AD0N_69

IO_L22P_T3U_N6_DBC_AD0P_69

IO_L21N_T3L_N5_AD8N_69

IO_L21P_T3L_N4_AD8P_69

IO_L20N_T3L_N3_AD1N_69

IO_L20P_T3L_N2_AD1P_69

IO_L19N_T3L_N1_DBC_AD9N_69

IO_L19P_T3L_N0_DBC_AD9P_69

IO_T3U_N12_69

IO_T2U_N12_69

IO_L18N_T2U_N11_AD2N_69

IO_L18P_T2U_N10_AD2P_69

IO_L17N_T2U_N9_AD10N_69

IO_L17P_T2U_N8_AD10P_69

IO_L16N_T2U_N7_QBC_AD3N_69

IO_L16P_T2U_N6_QBC_AD3P_69

IO_L15N_T2L_N5_AD11N_69

IO_L15P_T2L_N4_AD11P_69

IO_L14N_T2L_N3_GC_69

IO_L14P_T2L_N2_GC_69

IO_L13N_T2L_N1_GC_QBC_69

IO_L13P_T2L_N0_GC_QBC_69

IO_L12N_T1U_N11_GC_69

IO_L12P_T1U_N10_GC_69

IO_L11N_T1U_N9_GC_69

IO_L11P_T1U_N8_GC_69

IO_L10N_T1U_N7_QBC_AD4N_69

IO_L10P_T1U_N6_QBC_AD4P_69

IO_L9N_T1L_N5_AD12N_69

IO_L9P_T1L_N4_AD12P_69

IO_L8N_T1L_N3_AD5N_69

IO_L8P_T1L_N2_AD5P_69

IO_L7N_T1L_N1_QBC_AD13N_69

IO_L7P_T1L_N0_QBC_AD13P_69

IO_T1U_N12_69

IO_T0U_N12_VRP_69

IO_L6N_T0U_N11_AD6N_69

IO_L6P_T0U_N10_AD6P_69

IO_L5N_T0U_N9_AD14N_69

IO_L5P_T0U_N8_AD14P_69

IO_L4N_T0U_N7_DBC_AD7N_69

IO_L4P_T0U_N6_DBC_AD7P_69

IO_L3N_T0L_N5_AD15N_69

IO_L3P_T0L_N4_AD15P_69

IO_L2N_T0L_N3_69

IO_L2P_T0L_N2_69

IO_L1N_T0L_N1_DBC_69

IO_L1P_T0L_N0_DBC_69

VREF_69

VCCO1_69

VCCO2_69

VCCO3_69

A16

A17

D15

D16

B17

B18

C16

C17

A19

B19

C18

D18

D19

E19

E17

E18

E16

F16

F19

G19

F15

G15

G18

H18

F17

G17

J18

J19

H16

H17

K18

K19

J16

K16

K17

L17

H15

J15

M18

L16

M17

N17

L12

M12

L14

L15

M13

N13

M15

N15

M14

N14

N16

E15

F18

J17

U9

ZU28DRZynq US+ RFSoC, 48HD, 299HP, 214PS, 16GTY, 4GTR, 8ADC, 8DAC

G1517

38

32

32

22

22

32

32

38

38

32

32

32

32

32

32

32

32

32

32

32

32

32

32

32

32

32

32

32

32

32

32

32

32

32

32

32

32

32

32

32

32

32

32

VRP_67VRP_69 VRP_68

SYS_CLK_DDR4_PL_N

SYS_CLK_DDR4_PL_P

DDR4_PL_CK0_C

DDR4_PL_CK0_T

DDR4_PL_CK1_C

DDR4_PL_CK1_T

DDR4_PL_DQS_T[8]

DDR4_PL_DQS_C[8]

DDR4_PL_DM_DBI_N[8]

DDR4_PL_DQ[65]

DDR4_PL_DQS_T[0]

DDR4_PL_DQS_C[0]

DDR4_PL_DM_DBI_N[0]

DDR4_PL_DQ[2]

DDR4_PL_DQS_T[3]

DDR4_PL_DQS_C[3]

DDR4_PL_DM_DBI_N[3]

DDR4_PL_DQ[25]

DDR4_PL_DQS_T[2]

DDR4_PL_DQS_C[2]

DDR4_PL_DM_DBI_N[2]

DDR4_PL_DQS_T[1]

DDR4_PL_DQS_C[1]

DDR4_PL_DM_DBI_N[1]

DDR4_PL_DQS_T[7]

DDR4_PL_DQS_C[7]

DDR4_PL_DM_DBI_N[7]

DDR4_PL_DQ[59]

DDR4_PL_DQ[56]

DDR4_PL_DQ[57]

DDR4_PL_DQS_T[5]

DDR4_PL_DQS_C[5]

DDR4_PL_DM_DBI_N[5]

DDR4_PL_DQ[42]

PL_USER_SW1

DDR4_PL_DQ[0]

DDR4_PL_DQ[4]

DDR4_PL_DQ[5]

DDR4_PL_DQ[1]

DDR4_PL_DQ[7]

DDR4_PL_DQ[6]

DDR4_PL_DQ[3]

DDR4_PL_DQ[17]

DDR4_PL_DQ[21]

DDR4_PL_DQ[19]

DDR4_PL_DQ[23]

DDR4_PL_DQ[16]

DDR4_PL_DQ[18]

DDR4_PL_DQ[20]

DDR4_PL_DQ[22] DDR4_PL_DQ[40]

DDR4_PL_DQ[44]

DDR4_PL_DQ[41]

DDR4_PL_DQ[45]

DDR4_PL_DQ[46]

DDR4_PL_DQ[43]

DDR4_PL_DQ[47]

DDR4_PL_DQ[61]

DDR4_PL_DQ[60]

DDR4_PL_DQ[58]

DDR4_PL_DQ[62]

DDR4_PL_DQ[63]

DDR4_PL_DQS_T[6]

DDR4_PL_DQS_C[6]

DDR4_PL_DM_DBI_N[6]

DDR4_PL_DQ[52]

DDR4_PL_DQ[53]

DDR4_PL_DQ[54]

DDR4_PL_DQS_T[4]

DDR4_PL_DQS_C[4]

DDR4_PL_DM_DBI_N[4]

DDR4_PL_DQ[33]

DDR4_PL_DQ[37]

DDR4_PL_DQ[36]

DDR4_PL_DQ[34]

DDR4_PL_DQ[35]

DDR4_PL_DQ[38]

DDR4_PL_DQ[32]

DDR4_PL_DQ[49]

DDR4_PL_DQ[51]

DDR4_PL_DQ[50]

DDR4_PL_DQ[48]

DDR4_PL_DQ[67]

DDR4_PL_DQ[66]

DDR4_PL_DQ[71]

DDR4_PL_DQ[68]

DDR4_PL_DQ[70]

DDR4_PL_DQ[69]

DDR4_PL_DQ[64]

DDR4_PL_DQ[9]

DDR4_PL_DQ[13]

DDR4_PL_DQ[8]

DDR4_PL_DQ[11]

DDR4_PL_DQ[14]

DDR4_PL_DQ[12]

DDR4_PL_DQ[10]

DDR4_PL_DQ[15]

DDR4_PL_DQ[27]

DDR4_PL_DQ[28]

DDR4_PL_DQ[24]

DDR4_PL_ODT1

DDR4_PL_A[13]

DDR4_PL_CS2_N

DDR4_PL_ODT0

DDR4_PL_CS0_N

DDR4_PL_PAR

DDR4_PL_A[3]

DDR4_PL_A[6]

DDR4_PL_A[1]

DDR4_PL_BA[1]

DDR4_PL_A[14]

DDR4_PL_CS3_N

DDR4_PL_CS1_N

DDR4_PL_A[8]

DDR4_PL_A[9]

DDR4_PL_A[12]

DDR4_PL_BG[0]

DDR4_PL_BG[1]

DDR4_PL_CKE0

DDR4_PL_A[15]

DDR4_PL_A[16]

DDR4_PL_BA[0]

DDR4_PL_A[0]

DDR4_PL_A[10]

DDR4_PL_EVENT_N

DDR4_PL_A[4]

DDR4_PL_A[2]

DDR4_PL_A[7]

DDR4_PL_A[5]

DDR4_PL_A[11]

DDR4_PL_CKE1

DDR4_PL_ALERT_N

DDR4_PL_RST_N

DDR4_PL_ACT_N

DDR4_PL_DQ[29]

DDR4_PL_DQ[30]

DDR4_PL_DQ[31]

DDR4_PL_DQ[26]

PL_USER_SW2PL_USER_SW4

DDR4_PL_DQ[55]

38PL_USER_SW3

DDR4_PL_DQ[39]

Page 14: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C 1.0

IN

HTG-ZRF8PL: Bank64 (ARM Trace/Debug)

14 of 48

GND1

GND2

GND3

GND4

GND5

GROUND HOLE

GROUND HOLE

GROUND HOLE

GROUND HOLE

GROUND HOLE

5767054-1, ARM38 Pins, Pitch 0.64mm

MICTOR Connector, Receptacle

TE

37 38

35

33

31

29

27

25

23

21

19

17

15

13

11

9

7

36

34

32

30

28

26

24

22

20

18

16

14

12

10

8

6

4

2

5

3

1

TRACEDBGRQ

TRACESRST_B

TRACETDO

TRACERTCK

TRACETCK

TRACETMS

TRACETDI

TRACETRST_B

TRACEDATA15

TRACEDATA14

TRACEDATA13

TRACEDATA12

TRACEDATA11

TRACEDATA10

TRACEDATA9

TRACEDATA8

TRACECLK

TRACEDBGACK

TRACEEXTTRIG

TRACEDATA7

TRACEDATA6

TRACEDATA5

TRACEDATA4

TRACEDATA3

TRACEDATA2

TRACEDATA1

TRACECTL

TRACEDATA0

+1.8V

+1.8V

+1.8V

+1.8V

NS0E

0E

0E

4.7K

4.7K

4.7K

4.7K

4.7K

4.7K

4.7K

4.7K

and MICTOR 38 Receptacle

J22

R106

R113

R92

R77

R84

R85

R93

R99

R10

7

R10

8

R11

4

+1.8V

Up

to 1

.8V

HP

IO_T2U_N12_64

IO_L18N_T2U_N11_AD2N_64

IO_L18P_T2U_N10_AD2P_64

IO_L17N_T2U_N9_AD10N_64

IO_L17P_T2U_N8_AD10P_64

IO_L16N_T2U_N7_QBC_AD3N_64

IO_L16P_T2U_N6_QBC_AD3P_64

IO_L15N_T2L_N5_AD11N_64

IO_L15P_T2L_N4_AD11P_64

IO_L14N_T2L_N3_GC_64

IO_L14P_T2L_N2_GC_64

IO_L13N_T2L_N1_GC_QBC_64

IO_L13P_T2L_N0_GC_QBC_64

IO_L12N_T1U_N11_GC_64

IO_L12P_T1U_N10_GC_64

IO_L11N_T1U_N9_GC_64

IO_L11P_T1U_N8_GC_64

IO_L10N_T1U_N7_QBC_AD4N_64

IO_L10P_T1U_N6_QBC_AD4P_64

IO_L9N_T1L_N5_AD12N_64

IO_L9P_T1L_N4_AD12P_64

IO_L8N_T1L_N3_AD5N_64

IO_L8P_T1L_N2_AD5P_64

IO_L7N_T1L_N1_QBC_AD13N_64

IO_L7P_T1L_N0_QBC_AD13P_64

IO_T1U_N12_64

IO_T0U_N12_VRP_64

IO_L6N_T0U_N11_AD6N_64

IO_L6P_T0U_N10_AD6P_64

IO_L5N_T0U_N9_AD14N_64

IO_L5P_T0U_N8_AD14P_64

IO_L4N_T0U_N7_DBC_AD7N_64

IO_L4P_T0U_N6_DBC_AD7P_64

IO_L3N_T0L_N5_AD15N_64

IO_L3P_T0L_N4_AD15P_64

IO_L2N_T0L_N3_64

IO_L2P_T0L_N2_64

IO_L1N_T0L_N1_DBC_64

IO_L1P_T0L_N0_DBC_64

VREF_64

VCCO1_64

VCCO2_64

VCCO3_64

AF15

AF16

AF17

AH15

AH16

AH17

AG17

AJ15

AJ16

AK16

AK17

AL15

AL16

AM17

AL17

AN15

AM15

AN16

AN17

AR14

AP14

AR16

AP16

AR13

AP13

AP15

AT14

AU14

AU15

AT15

AT16

AW16

AV16

AV13

AU13

AW15

AV15

AW13

AW14

AG15

AJ17

AM16

AR15

G1517

Zynq US+ RFSoC, 48HD, 299HP, 214PS, 16GTY, 4GTR, 8ADC, 8DACZU28DR

U9

22

22CLK_FDEC

CLK_RST_N

CLK_PL_USER2_P

CLK_PL_USER2_N22

22

240E

_1%

VRP_64

R48

8 TRACEVTTREF

TRACEVSUPPLY

38FAN_PWM

22CLK_SYNC_N

TRACERTCK

TRACECLK

TRACEDATA12

TRACEDATA15

TRACEDATA13

TRACEDATA11

TRACEDATA6

TRACEDATA9

TRACEDATA10

TRACEDATA3

TRACEDATA5

TRACEDATA8

TRACEEXTTRIG

TRACEDATA7

TRACESRST_B

TRACEDBGRQ

TRACEDBGACK

TRACEDATA0

TRACEDATA1

TRACECTL

TRACETCK

TRACETMS

TRACETDI

TRACETDO

TRACETRST_B

TRACEDATA4

TRACEDATA2

TRACEDATA14

22

22

22

CLK_LOL_N

CLK_INTR_N

CLK_FINC

Page 15: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

34,35

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

+VADJ_FMC_PL

HTG-ZRF8

PL: Banks 65, 66 (FMC LVDS I/O)

15 of 481.0

+VADJ_FMC_PL

+VREF_A_FMC_PL+VREF_A_FMC_PL

240E

_1%

VRP_66

240E

_1%

VRP_65

FMC_PL_LA[1]_CC_P

FMC_PL_LA[1]_CC_N

R46

6

R49

5

FMC_PL_SYNC_C2M_P

FMC_PL_SYNC_C2M_N

36

36

36

36

36

36

FMC_PL_REFCLK_M2C_P

FMC_PL_REFCLK_M2C_N

FMC_PL_SYNC_M2C_P

FMC_PL_SYNC_M2C_N

FMC_PL_LA[0]_CC_P

FMC_PL_LA[0]_CC_N

35

35

FMC_PL_CLK[0]_M2C_P

FMC_PL_CLK[0]_M2C_N

FMC_PL_LA[17]_CC_P

FMC_PL_LA[17]_CC_N

FMC_PL_LA[18]_CC_P

FMC_PL_LA[18]_CC_N

Up

to 1

.8V

HP

IO_L24N_T3U_N11_PERSTN0_65

IO_L24P_T3U_N10_PERSTN1_I2C_SDA_65

IO_L23N_T3U_N9_65

IO_L23P_T3U_N8_I2C_SCLK_65

IO_L22N_T3U_N7_DBC_AD0N_65

IO_L22P_T3U_N6_DBC_AD0P_65

IO_L21N_T3L_N5_AD8N_65

IO_L21P_T3L_N4_AD8P_65

IO_L20N_T3L_N3_AD1N_65

IO_L20P_T3L_N2_AD1P_65

IO_L19N_T3L_N1_DBC_AD9N_65

IO_L19P_T3L_N0_DBC_AD9P_65

IO_T3U_N12_65

IO_T2U_N12_65

IO_L18N_T2U_N11_AD2N_65

IO_L18P_T2U_N10_AD2P_65

IO_L17N_T2U_N9_AD10N_65

IO_L17P_T2U_N8_AD10P_65

IO_L16N_T2U_N7_QBC_AD3N_65

IO_L16P_T2U_N6_QBC_AD3P_65

IO_L15N_T2L_N5_AD11N_65

IO_L15P_T2L_N4_AD11P_65

IO_L14N_T2L_N3_GC_65

IO_L14P_T2L_N2_GC_65

IO_L13N_T2L_N1_GC_QBC_65

IO_L13P_T2L_N0_GC_QBC_65

IO_L12N_T1U_N11_GC_65

IO_L12P_T1U_N10_GC_65

IO_L11N_T1U_N9_GC_65

IO_L11P_T1U_N8_GC_65

IO_L10N_T1U_N7_QBC_AD4N_65

IO_L10P_T1U_N6_QBC_AD4P_65

IO_L9N_T1L_N5_AD12N_65

IO_L9P_T1L_N4_AD12P_65

IO_L8N_T1L_N3_AD5N_65

IO_L8P_T1L_N2_AD5P_65

IO_L7N_T1L_N1_QBC_AD13N_65

IO_L7P_T1L_N0_QBC_AD13P_65

IO_T1U_N12_65

IO_T0U_N12_VRP_65

IO_L6N_T0U_N11_AD6N_65

IO_L6P_T0U_N10_AD6P_65

IO_L5N_T0U_N9_AD14N_65

IO_L5P_T0U_N8_AD14P_65

IO_L4N_T0U_N7_DBC_AD7N_65

IO_L4P_T0U_N6_DBC_AD7P_SMBALERT_65

IO_L3N_T0L_N5_AD15N_65

IO_L3P_T0L_N4_AD15P_65

IO_L2N_T0L_N3_65

IO_L2P_T0L_N2_65

IO_L1N_T0L_N1_DBC_65

IO_L1P_T0L_N0_DBC_65

VREF_65

VCCO1_65

VCCO2_65

VCCO3_65

AJ13

AH13

AH12

AG12

AK14

AJ14

AK12

AJ12

AM14

AL14

AL12

AK13

AG14

AT9

AL7

AL8

AM9

AL9

AN7

AN8

AM7

AM8

AR9

AP9

AR8

AP8

AP10

AN10

AP11

AN11

AN13

AM13

AM10

AL10

AR11

AR12

AN12

AM12

AL11

AU9

AU10

AT10

AW8

AW9

AT11

AT12

AW11

AV11

AV12

AU12

AW10

AV10

AG13

AH14

AM11

AR10

U9

ZU28DRZynq US+ RFSoC, 48HD, 299HP, 214PS, 16GTY, 4GTR, 8ADC, 8DAC

G1517

Up

to 1

.8V

HP

IO_L24N_T3U_N11_66

IO_L24P_T3U_N10_66

IO_L23N_T3U_N9_66

IO_L23P_T3U_N8_66

IO_L22N_T3U_N7_DBC_AD0N_66

IO_L22P_T3U_N6_DBC_AD0P_66

IO_L21N_T3L_N5_AD8N_66

IO_L21P_T3L_N4_AD8P_66

IO_L20N_T3L_N3_AD1N_66

IO_L20P_T3L_N2_AD1P_66

IO_L19N_T3L_N1_DBC_AD9N_66

IO_L19P_T3L_N0_DBC_AD9P_66

IO_T3U_N12_66

IO_T2U_N12_66

IO_L18N_T2U_N11_AD2N_66

IO_L18P_T2U_N10_AD2P_66

IO_L17N_T2U_N9_AD10N_66

IO_L17P_T2U_N8_AD10P_66

IO_L16N_T2U_N7_QBC_AD3N_66

IO_L16P_T2U_N6_QBC_AD3P_66

IO_L15N_T2L_N5_AD11N_66

IO_L15P_T2L_N4_AD11P_66

IO_L14N_T2L_N3_GC_66

IO_L14P_T2L_N2_GC_66

IO_L13N_T2L_N1_GC_QBC_66

IO_L13P_T2L_N0_GC_QBC_66

IO_L12N_T1U_N11_GC_66

IO_L12P_T1U_N10_GC_66

IO_L11N_T1U_N9_GC_66

IO_L11P_T1U_N8_GC_66

IO_L10N_T1U_N7_QBC_AD4N_66

IO_L10P_T1U_N6_QBC_AD4P_66

IO_L9N_T1L_N5_AD12N_66

IO_L9P_T1L_N4_AD12P_66

IO_L8N_T1L_N3_AD5N_66

IO_L8P_T1L_N2_AD5P_66

IO_L7N_T1L_N1_QBC_AD13N_66

IO_L7P_T1L_N0_QBC_AD13P_66

IO_T1U_N12_66

IO_T0U_N12_VRP_66

IO_L6N_T0U_N11_AD6N_66

IO_L6P_T0U_N10_AD6P_66

IO_L5N_T0U_N9_AD14N_66

IO_L5P_T0U_N8_AD14P_66

IO_L4N_T0U_N7_DBC_AD7N_66

IO_L4P_T0U_N6_DBC_AD7P_66

IO_L3N_T0L_N5_AD15N_66

IO_L3P_T0L_N4_AD15P_66

IO_L2N_T0L_N3_66

IO_L2P_T0L_N2_66

IO_L1N_T0L_N1_DBC_66

IO_L1P_T0L_N0_DBC_66

VREF_66

VCCO1_66

VCCO2_66

VCCO3_66

AF19

AF20

AH18

AG18

AH20

AG20

AJ19

AJ20

AK21

AK22

AK18

AJ18

AK19

AN22

AL20

AL21

AM19

AL19

AM22

AL22

AN18

AM18

AP21

AN21

AN20

AM20

AP19

AP20

AR18

AP18

AT22

AR22

AT19

AR19

AT21

AR21

AT17

AR17

AT20

AU22

AU19

AU20

AV18

AU18

AW21

AV21

AV17

AU17

AW20

AV20

AW18

AW19

AG19

AK20

AN19

AT18

U9

ZU28DRZynq US+ RFSoC, 48HD, 299HP, 214PS, 16GTY, 4GTR, 8ADC, 8DAC

G1517

33PCIE_PERST_N_F

FMC_PL_LA[20]_P

FMC_PL_LA[20]_N

FMC_PL_LA[23]_P

FMC_PL_LA[23]_N

FMC_PL_LA[19]_P

FMC_PL_LA[19]_N

FMC_PL_LA[22]_P

FMC_PL_LA[22]_N

FMC_PL_LA[27]_P

FMC_PL_LA[27]_N

FMC_PL_LA[26]_P

FMC_PL_LA[26]_N

FMC_PL_LA[21]_P

FMC_PL_LA[21]_N

FMC_PL_LA[24]_P

FMC_PL_LA[24]_N

FMC_PL_LA[25]_P

FMC_PL_LA[25]_N

FMC_PL_LA[29]_P

FMC_PL_LA[29]_N

FMC_PL_LA[28]_P

FMC_PL_LA[28]_N

FMC_PL_LA[30]_P

FMC_PL_LA[30]_N

FMC_PL_LA[31]_P

FMC_PL_LA[31]_N

FMC_PL_LA[33]_P

FMC_PL_LA[33]_N

FMC_PL_LA[32]_P

FMC_PL_LA[32]_N

FMC_PL_LA[2]_P

FMC_PL_LA[2]_N

FMC_PL_LA[3]_P

FMC_PL_LA[3]_N

FMC_PL_LA[4]_P

FMC_PL_LA[4]_N

FMC_PL_LA[8]_P

FMC_PL_LA[8]_N

FMC_PL_LA[6]_P

FMC_PL_LA[6]_N

FMC_PL_LA[5]_P

FMC_PL_LA[5]_N

FMC_PL_LA[7]_P

FMC_PL_LA[7]_N

FMC_PL_LA[9]_P

FMC_PL_LA[9]_N

FMC_PL_LA[16]_P

FMC_PL_LA[16]_N

FMC_PL_LA[15]_P

FMC_PL_LA[15]_N

FMC_PL_LA[12]_P

FMC_PL_LA[12]_N

FMC_PL_LA[14]_P

FMC_PL_LA[14]_N

FMC_PL_LA[10]_P

FMC_PL_LA[10]_N

FMC_PL_LA[13]_P

FMC_PL_LA[13]_N

FMC_PL_LA[11]_P

FMC_PL_LA[11]_N

Page 16: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

1.0

HTG-ZRF8

16 of 48

33

33

33PCIE_CLK1_MGT_N

PCIE_CLK1_MGT_P

PL: MGT 128, 129 (PCIe)

PCIE_CLK0_MGT1_P

PCIE_CLK0_MGT1_N 33

33

33

33

RX

TX

CLK

IN MGTREFCLK0N_128

MGTREFCLK0P_128

MGTREFCLK1N_128

MGTREFCLK1P_128

MGTYRXN0_128

MGTYRXN1_128

MGTYRXN2_128

MGTYRXN3_128

MGTYRXP0_128

MGTYRXP1_128

MGTYRXP2_128

MGTYRXP3_128

MGTYTXN0_128

MGTYTXN1_128

MGTYTXN2_128

MGTYTXN3_128

MGTYTXP0_128

MGTYTXP1_128

MGTYTXP2_128

MGTYTXP3_128

RX

TX

CLK

IN MGTREFCLK0N_129

MGTREFCLK0P_129

MGTREFCLK1N_129

MGTREFCLK1P_129

MGTYRXN0_129

MGTYRXN1_129

MGTYRXN2_129

MGTYRXN3_129

MGTYRXP0_129

MGTYRXP1_129

MGTYRXP2_129

MGTYRXP3_129

MGTYTXN0_129

MGTYTXN1_129

MGTYTXN2_129

MGTYTXN3_129

MGTYTXP0_129

MGTYTXP1_129

MGTYTXP2_129

MGTYTXP3_129

AA34

AA33

Y32

Y31

AA39

W39

U39

R39

AA38

W38

U38

R38

Y36

V36

T36

R34

Y35

V35

T35

R33

G1517

Zynq US+ RFSoC, 48HD, 299HP, 214PS, 16GTY, 4GTR, 8ADC, 8DAC

ZU28DR

U9

W34

W33

V32

V31

N39

M37

L39

K37

N38

M36

L38

K36

P36

N34

L34

J34

P35

N33

L33

J33

G1517

Zynq US+ RFSoC, 48HD, 299HP, 214PS, 16GTY, 4GTR, 8ADC, 8DACZU28DR

U9

PCIE_CLK0_MGT0_P

PCIE_CLK0_MGT0_N

PCIE_RX[0]_P

PCIE_RX[1]_P

PCIE_RX[2]_P

PCIE_RX[3]_P

PCIE_RX[4]_P

PCIE_RX[5]_P

PCIE_RX[6]_P

PCIE_RX[7]_P

PCIE_RX[0]_N

PCIE_RX[1]_N

PCIE_RX[2]_N

PCIE_RX[3]_N

PCIE_RX[4]_N

PCIE_RX[5]_N

PCIE_RX[6]_N

PCIE_RX[7]_N

PCIE_TX[0]_P

PCIE_TX[1]_P

PCIE_TX[2]_P

PCIE_TX[3]_P

PCIE_TX[4]_P

PCIE_TX[5]_P

PCIE_TX[6]_P

PCIE_TX[7]_P

PCIE_TX[0]_N

PCIE_TX[1]_N

PCIE_TX[2]_N

PCIE_TX[3]_N

PCIE_TX[4]_N

PCIE_TX[5]_N

PCIE_TX[6]_N

PCIE_TX[7]_N

Page 17: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

1.0

HTG-ZRF8

PL: MGT 130, 131 (FMC)

17 of 48

34

FMC_PL_DP[3]_C2M_N

FMC_PL_DP[3]_C2M_P

FMC_PL_DP[3]_M2C_P

FMC_PL_DP[3]_M2C_N

FMC_PL_DP[1]_M2C_N

FMC_PL_DP[1]_M2C_P

FMC_PL_DP[1]_C2M_P

FMC_PL_DP[1]_C2M_N

FMC_PL_DP[0]_M2C_N

FMC_PL_DP[0]_M2C_P

FMC_PL_DP[0]_C2M_P

FMC_PL_DP[0]_C2M_N

FMC_PL_DP[2]_C2M_N

FMC_PL_DP[2]_C2M_P

FMC_PL_DP[2]_M2C_P

FMC_PL_DP[2]_M2C_N

RX

TX

CLK

IN MGTREFCLK0N_130

MGTREFCLK0P_130

MGTREFCLK1N_130

MGTREFCLK1P_130

MGTYRXN0_130

MGTYRXN1_130

MGTYRXN2_130

MGTYRXN3_130

MGTYRXP0_130

MGTYRXP1_130

MGTYRXP2_130

MGTYRXP3_130

MGTYTXN0_130

MGTYTXN1_130

MGTYTXN2_130

MGTYTXN3_130

MGTYTXP0_130

MGTYTXP1_130

MGTYTXP2_130

MGTYTXP3_130

RX

TX

CLK

IN MGTREFCLK0N_131

MGTREFCLK0P_131

MGTREFCLK1N_131

MGTREFCLK1P_131

MGTYRXN0_131

MGTYRXN1_131

MGTYRXN2_131

MGTYRXN3_131

MGTYRXP0_131

MGTYRXP1_131

MGTYRXP2_131

MGTYRXP3_131

MGTYTXN0_131

MGTYTXN1_131

MGTYTXN2_131

MGTYTXN3_131

MGTYTXP0_131

MGTYTXP1_131

MGTYTXP2_131

MGTYTXP3_131

U34

U33

T32

T31

J39

H37

G39

F37

J38

H36

G38

F36

H32

G34

F32

E34

H31

G33

F31

E33

U9

ZU28DRZynq US+ RFSoC, 48HD, 299HP, 214PS, 16GTY, 4GTR, 8ADC, 8DAC

G1517

P32

P31

M32

M31

E39

D37

C39

B37

E38

D36

C38

B36

D32

C34

B32

A34

D31

C33

B31

A33

U9

ZU28DRZynq US+ RFSoC, 48HD, 299HP, 214PS, 16GTY, 4GTR, 8ADC, 8DAC

G1517

FMC_PL_DP[5]_M2C_P

FMC_PL_DP[5]_M2C_N

FMC_PL_DP[5]_C2M_P

FMC_PL_DP[5]_C2M_N

FMC_PL_DP[6]_M2C_P

FMC_PL_DP[6]_M2C_N

FMC_PL_DP[6]_C2M_P

FMC_PL_DP[6]_C2M_N

FMC_PL_DP[7]_M2C_P

FMC_PL_DP[7]_M2C_N

FMC_PL_DP[7]_C2M_P

FMC_PL_DP[7]_C2M_N

FMC_PL_DP[4]_M2C_P

FMC_PL_DP[4]_M2C_N

FMC_PL_DP[4]_C2M_P

FMC_PL_DP[4]_C2M_N

34

34

34

34

22

22

22

22

FMC_PL_GBTCLK[0]_M2C_P

FMC_PL_GBTCLK[0]_M2C_N

FMC_PL_GBTCLK[1]_M2C_P

FMC_PL_GBTCLK[1]_M2C_N

GTY_130_REFCLK_P

GTY_130_REFCLK_N

GTY_131_REFCLK_P

GTY_131_REFCLK_N

Page 18: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

1.0

HTG-ZRF8

18 of 48

RF: ADC

ADC_CLK_N_224

ADC_CLK_P_224

ADC_REXT_224

VCM01_224

VCM23_224

ADC_VIN_I01_N_224

ADC_VIN_I01_P_224

ADC_VIN_I23_N_224

ADC_VIN_I23_P_224

ADC_CLK_N_225

ADC_CLK_P_225

VCM01_225

VCM23_225

ADC_VIN_I01_N_225

ADC_VIN_I01_P_225

ADC_VIN_I23_N_225

ADC_VIN_I23_P_225

ADC_CLK_N_226

ADC_CLK_P_226

VCM01_226

VCM23_226

ADC_VIN_I01_N_226

ADC_VIN_I01_P_226

ADC_VIN_I23_N_226

ADC_VIN_I23_P_226

ADC_CLK_N_227

ADC_CLK_P_227

VCM01_227

VCM23_227

ADC_VIN_I01_N_227

ADC_VIN_I01_P_227

ADC_VIN_I23_N_227

ADC_VIN_I23_P_227

AF4

AF5

AB8

AL5

AL4

AP1

AP2

AM1

AM2

AD4

AD5

AK5

AK4

AK1

AK2

AH1

AH2

AB4

AB5

AJ5

AJ4

AF1

AF2

AD1

AD2

Y4

Y5

AH5

AH4

AB1

AB2

Y1

Y2

G1517ZU28DR

U9

T13

TCM1-83X+TRANS, 1:1, 10-8000MHz

1

53

42

6

0.1uF

C31

0.1uF

TCM1-83X+TRANS, 1:1, 10-8000MHz

1

53

42

6

0.1uF

TCM1-83X+TRANS, 1:1, 10-8000MHz

1

53

42

6

0.1uF

TCM1-83X+TRANS, 1:1, 10-8000MHz

1

53

42

6

0.1uF

TCM1-83X+TRANS, 1:1, 10-8000MHz

1

53

42

6

0.1uF

TCM1-83X+TRANS, 1:1, 10-8000MHz

1

53

42

6

0.1uF

TCM1-83X+TRANS, 1:1, 10-8000MHz

1

53

42

6

0.1uF

TCM1-83X+TRANS, 1:1, 10-8000MHz

1

53

42

6

ADC_IN01_227_P

ADC_IN01_227_N

ADC_IN23_227_P

ADC_IN23_227_N

ADC_IN01_226_P

ADC_IN01_226_N

ADC_IN23_226_P

ADC_IN23_226_N

ADC_IN01_225_P

ADC_IN01_225_N

ADC_IN23_225_P

ADC_IN23_225_N

ADC_IN01_224_P

ADC_IN01_224_N

ADC_IN23_224_P

ADC_IN23_224_N

ADC_IN01_227_P

ADC_IN01_227_N

ADC_IN23_227_P

ADC_IN23_227_N

ADC_IN01_226_P

ADC_IN01_226_N

ADC_IN23_226_P

ADC_IN23_226_N

ADC_IN01_225_P

ADC_IN01_225_N

ADC_IN23_225_P

ADC_IN23_225_N

ADC_IN01_224_P

ADC_IN01_224_N

ADC_IN23_224_P

ADC_IN23_224_N

C5T5

C32T14

C6T6

C33T15

C7T7

C34T16

C8T8

R59

11.5E_1%

R17

11.5E_1%

R62

11.5E_1%

11.5E_1%

R19

R65

11.5E_1%

11.5E_1%

R21

R68

11.5E_1%

11.5E_1%

R23

R42

866E_1% 866E_1%

R60

R61

11.5E_1% 0.1uF

C49

C48

0.1uF

R5

866E_1% 866E_1%

R29

R18

11.5E_1% 0.1uF

C18

C17

0.1uF

R43

866E_1% 866E_1%

R63

R64

11.5E_1% 0.1uF

C51

C50

0.1uF

R6

866E_1% 866E_1%

R30

R20

11.5E_1% 0.1uF

C20

C19

0.1uF

R44

866E_1% 866E_1%

R66

R67

11.5E_1% 0.1uF

C53

C52

0.1uF

R7

866E_1% 866E_1%

R31

R22

11.5E_1% 0.1uF

C22

C21

0.1uF

R45

866E_1% 866E_1%

R69

R70

11.5E_1% 0.1uF

C55

C54

0.1uF

R8

866E_1% 866E_1%

R32

R24

11.5E_1% 0.1uF

C24

C23

0.1uF

J7

7110-1511-000SSMC, Right Angle, 50E

RADIALL

7009-1511-000SSMC, Vertical, 50E

RADIALL

J17

J8

RADIALL7110-1511-000

SSMC, Right Angle, 50E

J18

7009-1511-000SSMC, Vertical, 50E

RADIALL

RADIALL

SSMC, Right Angle, 50E7110-1511-000

J9

J19

7009-1511-000SSMC, Vertical, 50E

RADIALL

RADIALL

SSMC, Right Angle, 50E7110-1511-000

J10

J20

7009-1511-000SSMC, Vertical, 50E

RADIALL

24

24 ADC_227_REFCLK_P

ADC_227_REFCLK_N

24

24 ADC_226_REFCLK_P

ADC_226_REFCLK_N

24

24 ADC_225_REFCLK_P

ADC_225_REFCLK_N

24

24 ADC_224_REFCLK_P

ADC_224_REFCLK_N

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

C581

C592

C582

C593

C583

C594NS

NS

NS

NS

NS

NS

R494

2.49K_1%

NS0.1uF

NS0.1uF

C584

C595

Page 19: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

1.0

HTG-ZRF8

19 of 48

RF: DAC

DAC_CLK_N_228

DAC_CLK_P_228

DAC_REXT_228

SYSREF_N_228

SYSREF_P_228

DAC_VOUT0_N_228

DAC_VOUT0_P_228

DAC_VOUT1_N_228

DAC_VOUT1_P_228

DAC_VOUT2_N_228

DAC_VOUT2_P_228

DAC_VOUT3_N_228

DAC_VOUT3_P_228

DAC_CLK_N_229

DAC_CLK_P_229

DAC_VOUT0_N_229

DAC_VOUT0_P_229

DAC_VOUT1_N_229

DAC_VOUT1_P_229

DAC_VOUT2_N_229

DAC_VOUT2_P_229

DAC_VOUT3_N_229

DAC_VOUT3_P_229

R4

R5

W8

U4

U5

U1

U2

R1

R2

N1

N2

L1

L2

N4

N5

J1

J2

G1

G2

E1

E2

C1

C2

G1517ZU28DR

U9

DAC_VOUT0_229_P

DAC_VOUT0_229_N

DAC_VOUT1_229_P

DAC_VOUT1_229_N

DAC_VOUT2_229_P

DAC_VOUT2_229_N

DAC_VOUT3_229_P

DAC_VOUT3_229_N

DAC_VOUT0_228_P

DAC_VOUT0_228_N

DAC_VOUT1_228_P

DAC_VOUT1_228_N

DAC_VOUT2_228_P

DAC_VOUT2_228_N

DAC_VOUT3_228_P

DAC_VOUT3_228_N

DAC_VOUT0_229_P

DAC_VOUT0_229_N

DAC_VOUT1_229_P

DAC_VOUT1_229_N

DAC_VOUT2_229_P

DAC_VOUT2_229_N

DAC_VOUT3_229_P

DAC_VOUT3_229_N

DAC_VOUT0_228_P

DAC_VOUT0_228_N

DAC_VOUT1_228_P

DAC_VOUT1_228_N

DAC_VOUT2_228_P

DAC_VOUT2_228_N

DAC_VOUT3_228_P

DAC_VOUT3_228_N

0.1uF

C28T10

TCM1-83X+TRANS, 1:1, 10-8000MHz

1

53

42

6

0.1uF

C2

TCM1-83X+

T2

TRANS, 1:1, 10-8000MHz

1

53

42

6

0.1uF

C27T9

TRANS, 1:1, 10-8000MHzTCM1-83X+

1

53

42

6

0.1uF

C1T1

TCM1-83X+TRANS, 1:1, 10-8000MHz

1

53

42

6

0.1uF

C30T12

TCM1-83X+TRANS, 1:1, 10-8000MHz

1

53

42

6

0.1uF

C4T4

TCM1-83X+TRANS, 1:1, 10-8000MHz

1

53

42

6

C29

0.1uF

53

42

6

TRANS, 1:1, 10-8000MHzTCM1-83X+

T11

1

C3

0.1uF

TRANS, 1:1, 10-8000MHzTCM1-83X+

T3

1

53

42

6

11.5E_1%

R50

R11

11.5E_1%

11.5E_1%

R47

R9

11.5E_1%

11.5E_1%

R56

R15

11.5E_1%

11.5E_1%

R53

R13

11.5E_1%

866E_1%

R39 R51

866E_1%

11.5E_1%

R52

0.1uF

C43

0.1uF

C42

R2

866E_1%

R26

866E_1%

11.5E_1%

R12 C12

0.1uF

0.1uF

C11

866E_1%

R38 R48

866E_1%

R49

11.5E_1% 0.1uF

C41

0.1uF

C40

R1

866E_1% 866E_1%

R25

R10

11.5E_1% 0.1uF

C10

C9

0.1uF

R41

866E_1% 866E_1%

R57

R58

11.5E_1% 0.1uF

C47

C46

0.1uF

R4

866E_1% 866E_1%

R28

R16

11.5E_1% 0.1uF

C16

C15

0.1uF

R40

866E_1% 866E_1%

R54

11.5E_1%

R55 C45

0.1uF

0.1uF

C44

R3

866E_1% 866E_1%

R27

R14

11.5E_1%

C14

0.1uF

0.1uF

C13

RADIALL

SSMC, Right Angle, 50E7110-1511-000

J4

J14

RADIALL

SSMC, Vertical, 50E7009-1511-000

SSMC, Right Angle, 50E7110-1511-000

RADIALL

J3

SSMC, Vertical, 50E7009-1511-000

J13

RADIALL

J6

7110-1511-000SSMC, Right Angle, 50E

RADIALL

J16

7009-1511-000SSMC, Vertical, 50E

RADIALL

J5

7110-1511-000SSMC, Right Angle, 50E

RADIALL

RADIALL

SSMC, Vertical, 50E7009-1511-000

J15

24

24 DAC_229_REFCLK_P

DAC_229_REFCLK_N

24

24 DAC_228_REFCLK_P

DAC_228_REFCLK_N

24

24 DAC_228_SYSREF_P

DAC_228_SYSREF_N

2.49K_1%

R493

Page 20: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

INRF, PS and PL: POWER Pins

20 of 48

HTG-ZRF8

1.0

+VCCINT

+0.9V_GTY_AVCC

+1.2V_GTY_AVTT

+1.8V_GTY_AUX

100E_1%

+1.2V_GTY_AVTT

+1.8V

+VCCBRAM

+VCCBRAM

R453

+VCC_PSINT_FP

+VCC_PSINT_LP

+VCC_PSPLL

0E

+VCC_PSAUX

1000E@100MHz, 0.2A

1000E@100MHz, 0.2A

0.1uF 0.22uF

PS_ADC

+GTR_AVCC

+GTR_AVTT

499E_1%

R460

FB6

FB5

C456 C101

R439

CO

RE

PO

WE

R P

INS

VCCINT1

VCCINT2

VCCINT3

VCCINT4

VCCINT5

VCCINT6

VCCINT7

VCCINT8

VCCINT9

VCCINT10

VCCINT11

VCCINT12

VCCINT13

VCCINT14

VCCINT15

VCCINT16

VCCINT17

VCCINT18

VCCINT19

VCCINT20

VCCINT21

VCCINT22

VCCINT23

VCCINT24

VCCINT25

VCCINT26

VCCINT27

VCCINT28

VCCINT29

VCCINT30

VCCINT31

VCCINT32

VCCINT33

VCCINT34

VCCINT35

VCCINT36

VCCINT37

VCCINT38

VCCINT39

VCCINT40

VCCINT41

VCCINT42

VCCINT43

VCCINT44

VCCINT45

VCCINT46

VCCINT47

VCCINT48

VCCINT49

VCCINT50

VCCINT51

VCCINT52

VCCINT53

VCCINT54

VCCINT55

VCCINT56

VCCINT57

VCCINT58

VCCINT59

VCCINT60

PO

WE

R P

INS

VCCAUX1

VCCAUX2

VCCAUX3

VCCAUX1_IO

VCCAUX2_IO

VCCAUX3_IO

VCCBRAM1

VCCBRAM2

VCCBRAM3

VCCINT1_IO

VCCINT2_IO

MG

T P

OW

ER

PIN

S

MGTAVTT1_L

MGTAVTT2_L

MGTAVTT3_L

MGTAVTT4_L

MGTAVTT5_L

MGTAVTT6_L

MGTAVTT7_L

MGTAVTT8_L

MGTAVTT9_L

MGTAVTT10_L

MGTAVTT11_L

MGTAVTT12_L

MGTAVTT13_L

MGTAVTT14_L

MGTAVTT15_L

MGTAVTT16_L

MGTAVCC1_L

MGTAVCC2_L

MGTAVCC3_L

MGTAVCC4_L

MGTAVCC5_L

MGTAVCC6_L

MGTVCCAUX1_L

MGTVCCAUX2_L

PO

WE

R A

ND

GN

D P

INS

PS

0.85

V/0

9V0.

85V

/09V

1.2V

1.8V

1.8V

0V0.

85V

/09V

1.8V

PS_MGTRREF_505

VCC_PSADC

GND_PSADC

PS_MGTRAVCC1

PS_MGTRAVCC2

PS_MGTRAVCC3

PS_MGTRAVTT1

PS_MGTRAVTT2

PS_MGTRAVTT3

PS_MGTRAVTT4

VCC1_PSAUX

VCC2_PSAUX

VCC3_PSAUX

VCC4_PSAUX

VCC_PSBATT

VCC1_PSINTFP

VCC2_PSINTFP

VCC3_PSINTFP

VCC4_PSINTFP

VCC5_PSINTFP

VCC6_PSINTFP

VCC7_PSINTFP

VCC1_PSINTLP

VCC2_PSINTLP

VCC3_PSINTLP

VCC4_PSINTLP

VCC1_PSPLL

VCC2_PSPLL

VCC3_PSPLL

AA13

AA15

AA19

AA20

AA25

AB14

AB16

AB18

AB20

AB24

AC13

AC15

AC17

AC19

AD14

AD16

AD18

AD24

AE13

AE15

AE17

AF24

AH24

M24

N25

P14

P16

P18

P20

P24

R13

R15

R17

R19

R20

R25

T14

T16

T18

T20

T24

U13

U15

U17

U19

U20

U25

V14

V18

V20

V24

W13

W15

W19

W20

W25

Y14

Y18

Y20

Y24

G1517ZU28DR

U9

P12

T12

V12

AB12

AD12

Y12

AD20

AE19

AE20

AG21

AJ21

G1517ZU28DR

U9

A31

AA35

B33

C31

D33

E31

F33

G31

H33

J31

K34

P33

R35

T33

U35

W35

L31

M33

N31

V33

W31

Y33

R31

U31

G1517ZU28DR

U9

AK34

AE29

AF29

AD34

AF34

AH34

AC36

AE36

AG36

AJ36

AC26

AC27

AC28

AD29

AC25

AF25

AG25

AH25

AH26

AH27

AJ25

AJ26

AE26

AF27

AG27

AG28

AD28

AE27

AE28

G1517ZU28DR

U9

TE

RM MGTAVTTRCAL_L

MGTRREF_L

K32

K31

G1517ZU28DR

U9

AD

C P

OW

ER

PIN

S

ADC_AVCC1

ADC_AVCC2

ADC_AVCC3

ADC_AVCC4

ADC_AVCC5

ADC_AVCC6

ADC_AVCC7

ADC_AVCC8

ADC_AVCCAUX1

ADC_AVCCAUX2

ADC_AVCCAUX3

ADC_AVCCAUX4

ADC_AVCCAUX5

ADC_AVCCAUX6

ADC_AVCCAUX7

ADC_AVCCAUX8

DA

C P

OW

ER

PIN

S

DAC_AVCC1

DAC_AVCC2

DAC_AVCC3

DAC_AVCC4

DAC_AVCC5

DAC_AVCC6

DAC_AVCC7

DAC_AVCC8

DAC_AVCCAUX1

DAC_AVCCAUX2

DAC_AVCCAUX3

DAC_AVCCAUX4

DAC_AVCCAUX5

DAC_AVCCAUX6

DAC_AVCCAUX7

DAC_AVCCAUX8

DAC_AVTT1

DAC_AVTT2

DAC_AVTT3

DAC_AVTT4

RF

PO

WE

R P

INS

VCCINT1_AMS

VCCINT2_AMS

VCCINT3_AMS

VCCINT4_AMS

VCCINT5_AMS

VCCINT6_AMS

VCCINT7_AMS

VCCINT8_AMS

VCCINT9_AMS

VCCSDFEC1

VCCSDFEC2

VCCSDFEC3

VCCSDFEC4

VCCSDFEC5

VCCSDFEC6

VCCSDFEC7

VCCSDFEC8

VCCSDFEC9

VCCSDFEC10

VCCSDFEC11

VCCSDFEC12

VCCSDFEC13

VCCSDFEC14

VCCSDFEC15

VCCSDFEC16

VCCSDFEC17

VCCSDFEC18

AB9

AC9

AD9

AE9

AF9

AG9

AH9

AJ9

AB7

AC7

AD7

AE7

AF7

AG7

AH7

AJ7

G1517ZU28DR

U9

ZU28DR

U9M9

N9

P9

R9

T9

U9

V9

W9

L6

L7

M7

N7

P7

R7

T7

U7

H4

J4

K4

L4

G1517

AA11

AC11

AE11

AG11

AJ11

N11

R11

U11

W11

AA22

AB22

AC22

AD22

AE22

AF22

AG23

AH22

AJ23

M22

N22

P22

R22

T22

U22

V22

W22

Y22

G1517ZU28DR

U9+VCCBRAM

+DAC_AVCC

+DAC_AVCCAUX

+DAC_AVTT +ADC_AVCCAUX

+ADC_AVCC

Page 21: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

INRF, PS and PL: GND Pins

21 of 48

HTG-ZRF8

1.0

GR

OU

ND

PIN

S (

SE

CT

ION

1 O

F 6

)

GND1

GND2

GND3

GND4

GND5

GND6

GND7

GND8

GND9

GND10

GND11

GND12

GND13

GND14

GND15

GND16

GND17

GND18

GND19

GND20

GND21

GND22

GND23

GND24

GND25

GND26

GND27

GND28

GND29

GND30

GND31

GND32

GND33

GND34

GND35

GND36

GND37

GND38

GND39

GND40

GND41

GND42

GND43

GND44

GND45

GND46

GND47

GND48

GND49

GND50

GND51

GND52

GND53

GND54

GND55

GND56

GND57

GND58

GND59

GND60

GND61

GND62

GND63

GR

OU

ND

PIN

S (

SE

CT

ION

2 O

F 6

)

GND64

GND65

GND66

GND67

GND68

GND69

GND70

GND71

GND72

GND73

GND74

GND75

GND76

GND77

GND78

GND79

GND80

GND81

GND82

GND83

GND84

GND85

GND86

GND87

GND88

GND89

GND90

GND91

GND92

GND93

GND94

GND95

GND96

GND97

GND98

GND99

GND100

GND101

GND102

GND103

GND104

GND105

GND106

GND107

GND108

GND109

GND110

GND111

GND112

GND113

GND114

GND115

GND116

GND117

GND118

GND119

GND120

GND121

GND122

GND123

GND124

GND125

GND126

GR

OU

ND

PIN

S (

SE

CT

ION

3 O

F 6

)

GND127

GND128

GND129

GND130

GND131

GND132

GND133

GND134

GND135

GND136

GND137

GND138

GND139

GND140

GND141

GND142

GND143

GND144

GND145

GND146

GND147

GND148

GND149

GND150

GND151

GND152

GND153

GND154

GND155

GND156

GND157

GND158

GND159

GND160

GND161

GND162

GND163

GND164

GND165

GND166

GND167

GND168

GND169

GND170

GND171

GND172

GND173

GND174

GND175

GND176

GND177

GND178

GND179

GND180

GND181

GND182

GND183

GND184

GND185

GND186

GND187

GND188

GND189

GR

OU

ND

PIN

S (

SE

CT

ION

4 O

F 6

)

GND190

GND191

GND192

GND193

GND194

GND195

GND196

GND197

GND198

GND199

GND200

GND201

GND202

GND203

GND204

GND205

GND206

GND207

GND208

GND209

GND210

GND211

GND212

GND213

GND214

GND215

GND216

GND217

GND218

GND219

GND220

GND221

GND222

GND223

GND224

GND225

GND226

GND227

GND228

GND229

GND230

GND231

GND232

GND233

GND234

GND235

GND236

GND237

GND238

GND239

GND240

GND241

GND242

GND243

GND244

GND245

GND246

GND247

GND248

GND249

GND250

GND251

GND252

GR

OU

ND

PIN

S (

SE

CT

ION

5 O

F 6

)

GND253

GND254

GND255

GND256

GND257

GND258

GND259

GND260

GND261

GND262

GND263

GND264

GND265

GND266

GND267

GND268

GND269

GND270

GND271

GND272

GND273

GND274

GND275

GND276

GND277

GND278

GND279

GND280

GND281

GND282

GND283

GND284

GND285

GND286

GND287

GND288

GND289

GND290

GND291

GND292

GND293

GND294

GND295

GND296

GND297

GND298

GND299

GND300

GND301

GND302

GND303

GND304

GND305

GND306

GND307

GND308

GND309

GND310

GND311

GND312

GND313

GND314

GND315

GR

OU

ND

PIN

S (

SE

CT

ION

6 O

F 6

)

GND316

GND317

GND318

GND319

GND320

GND321

GND322

GND323

GND324

GND325

GND326

GND327

GND328

GND329

GND330

GND331

GND332

GND333

GND334

GND335

GND336

GND337

GND338

GND339

GND340

GND341

GND342

GND343

GND344

GND345

GND346

GND347

GND348

GND349

GND350

GND351

GND352

GND353

GND354

GND355

GND356

GND357

GND358

GND359

GND360

GND361

GND362

GND363

GND364

GND365

GND366

GND367

GND368

GND369

GND370

GND371

GND372

GND373

GND374

GND375

A13

A18

A23

A28

A3

A30

A32

A35

A36

A37

A38

A4

A8

AA12

AA14

AA18

AA21

AA23

AA24

AA28

AA30

AA31

AA32

AA36

AA37

AB11

AB13

AB15

AB17

AB19

AB21

AB23

AB25

AB32

AB33

AB34

AB35

AB36

AB37

AB38

AB39

AC12

AC14

AC16

AC18

AC20

AC21

AC23

AC24

AC33

AC37

AD11

AD13

AD15

AD17

AD19

AD21

AD23

AD27

AD33

AD35

AD38

AD39

G1517ZU28DR

U9AE12

AE14

AE16

AE18

AE21

AE23

AE24

AE25

AE33

AE37

AF11

AF13

AF18

AF21

AF23

AF28

AF33

AF35

AF38

AF39

AG16

AG22

AG24

AG26

AG31

AG33

AG37

AH11

AH19

AH21

AH23

AH29

AH33

AH35

AH38

AH39

AJ22

AJ24

AJ27

AJ33

AJ37

AK10

AK11

AK15

AK25

AK30

AK33

AK35

AK38

AK39

AK6

AK7

AK8

AK9

AL13

AL18

AL23

AL28

AL33

AL34

AL35

AL36

AL37

G1517ZU28DR

U9AL38

AL6

AM21

AM26

AM6

AN14

AN24

AN29

AN34

AN39

AN4

AN5

AN6

AN9

AP12

AP17

AP22

AP37

AP4

AR20

AR25

AR30

AR35

AR4

AR5

AT1

AT13

AT2

AT23

AT3

AT38

AT4

AT8

AU11

AU16

AU21

AU26

AU31

AU36

AV1

AV14

AV19

AV24

AV39

AV4

AV9

AW12

AW17

AW2

AW22

AW27

AW32

AW38

AW7

B11

B16

B21

B30

B34

B35

B38

B39

B4

G1517ZU28DR

U9C14

C19

C24

C30

C32

C35

C36

C37

C4

D17

D27

D30

D34

D35

D38

D39

D4

D5

D7

E10

E20

E30

E32

E35

E36

E37

E5

F13

F23

F28

F30

F34

F35

F38

F39

F5

F8

G16

G26

G30

G32

G35

G36

G37

G5

H19

H30

H34

H35

H38

H39

H5

H9

J12

J22

J30

J32

J35

J36

J37

J5

J6

K15

G1517ZU28DR

U9K25

K30

K33

K35

K38

K39

K6

K7

K8

L10

L11

L13

L18

L28

L30

L32

L35

L36

L37

L8

L9

M11

M16

M21

M23

M25

M30

M34

M35

M38

M39

N12

N23

N24

N30

N32

N35

N36

N37

P11

P13

P15

P17

P19

P21

P23

P25

P27

P30

P34

P37

P38

P39

R12

R14

R16

R18

R21

R23

R24

R30

R32

R36

G1517ZU28DR

U9R37

T11

T13

T15

T17

T19

T21

T23

T25

T28

T30

T34

T37

T38

T39

U12

U14

U16

U18

U21

U23

U24

U30

U32

U36

U37

V11

V13

V15

V19

V21

V23

V25

V30

V34

V37

V38

V39

W12

W14

W18

W21

W23

W24

W30

W32

W36

W37

Y11

Y13

Y15

Y19

Y21

Y23

Y25

Y30

Y34

Y37

Y38

Y39

G1517ZU28DR

U9A

DC

GR

OU

ND

PIN

SADC_GND1

ADC_GND2

ADC_GND3

ADC_GND4

ADC_GND5

ADC_GND6

ADC_GND7

ADC_GND8

ADC_GND9

ADC_GND10

ADC_GND11

ADC_GND12

ADC_GND13

ADC_GND14

ADC_GND15

ADC_GND16

ADC_GND17

ADC_GND18

ADC_GND19

ADC_GND20

ADC_GND21

ADC_GND22

ADC_GND23

ADC_GND24

ADC_GND25

ADC_GND26

ADC_GND27

ADC_GND28

ADC_GND29

ADC_GND30

ADC_GND31

ADC_GND32

ADC_GND33

ADC_GND34

ADC_GND35

ADC_GND36

ADC_GND37

ADC_GND38

ADC_GND39

ADC_GND40

ADC_GND41

ADC_GND42

ADC_GND43

ADC_GND44

ADC_GND45

ADC_GND46

ADC_GND47

ADC_GND48

ADC_GND49

ADC_GND50

ADC_GND51

ADC_GND52

ADC_GND53

ADC_GND54

ADC_GND55

ADC_GND56

ADC_GND57

ADC_GND58

ADC_GND59

ADC_GND60

ADC_GND61

ADC_GND62

ADC_GND63

ADC_GND64

ADC_GND65

ADC_GND66

ADC_GND67

ADC_GND68

ADC_GND69

ADC_GND70

ADC_GND71

ADC_GND72

ADC_GND73

ADC_GND74

ADC_GND75

ADC_GND76

ADC_SUB_GND

DA

C G

RO

UN

D P

INS

DAC_GND1

DAC_GND2

DAC_GND3

DAC_GND4

DAC_GND5

DAC_GND6

DAC_GND7

DAC_GND8

DAC_GND9

DAC_GND10

DAC_GND11

DAC_GND12

DAC_GND13

DAC_GND14

DAC_GND15

DAC_GND16

DAC_GND17

DAC_GND18

DAC_GND19

DAC_GND20

DAC_GND21

DAC_GND22

DAC_GND23

DAC_GND24

DAC_GND25

DAC_GND26

DAC_GND27

DAC_GND28

DAC_GND29

DAC_GND30

DAC_GND31

DAC_GND32

DAC_GND33

DAC_GND34

DAC_GND35

DAC_GND36

DAC_GND37

DAC_GND38

DAC_GND39

DAC_GND40

DAC_GND41

DAC_GND42

DAC_GND43

DAC_GND44

DAC_GND45

DAC_GND46

DAC_GND47

DAC_GND48

DAC_GND49

DAC_GND50

DAC_GND51

DAC_GND52

DAC_GND53

DAC_GND54

DAC_GND55

DAC_GND56

DAC_GND57

DAC_GND58

DAC_GND59

DAC_GND60

DAC_GND61

DAC_GND62

DAC_GND63

DAC_GND64

DAC_GND65

DAC_GND66

DAC_GND67

DAC_GND68

DAC_GND69

DAC_GND70

DAC_GND71

DAC_GND72

DAC_GND73

DAC_GND74

DAC_GND75

DAC_GND76

DAC_SUB_GND

AA1

AA10

AA2

AA3

AA4

AA5

AA6

AA7

AA8

AA9

AB10

AB3

AB6

AC1

AC10

AC2

AC3

AC4

AC5

AC6

AC8

AD10

AD3

AD6

AD8

AE1

AE2

AE3

AE4

AE5

AE6

AE8

AF10

AF3

AF6

AF8

AG1

AG10

AG2

AG3

AG4

AG5

AG6

AG8

AH10

AH3

AH6

AH8

AJ1

AJ10

AJ2

AJ3

AJ6

AJ8

AK3

AL1

AL2

AL3

AM3

AM4

AM5

AN1

AN2

AN3

AP3

AR1

AR2

AR3

W1

W2

W3

W4

W5

W6

Y3

Y6

AE10

U9A2

B1

B2

B3

C3

D1

D2

D3

E3

E4

F1

F2

F3

F4

G3

G4

H1

H2

H3

J3

K1

K2

K3

K5

L3

L5

M1

M10

M2

M3

M4

M5

M6

M8

N10

N3

N6

N8

P1

P2

P3

P4

P5

P6

P8

R10

R3

R6

R8

T1

T10

T2

T3

T4

T5

T6

T8

U10

U3

U6

U8

V1

V10

V2

V3

V4

V5

V6

V7

V8

W10

W7

Y10

Y7

Y8

Y9

P10

U9

Page 22: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

INCLOCK 1: SYS, MGT, FMC, DDR4, USER

22 of 48

HTG-ZRF8

+3.3V

IN0_P

IN0_N

VDD1

VDD2

VDD3

VDDO4

RST_N

VDDO5

VDDO6

VDDO7

VDDO8

VDDO9

GND_PAD

XA

XB

SDA/SDIO

I2C_SEL

OUT0_P

OUT0_N

INTR_N

IN1_P

IN1_N

IN2_P

IN2_N

FB_IN_P

FB_IN_N

X1

X2

OUT1_P

OUT1_N

OUT2_P

OUT2_N

OUT3_P

OUT3_N

OUT4_P

OUT4_N

OUT5_P

OUT5_N

OUT6_P

OUT6_N

OUT7_P

OUT7_N

OUT8_P

OUT8_N

OUT9_P

OUT9_N

A1/SDO

SCLK

A0/CS_N

OE_N

LOL_N

SYNC_N

FDEC

FINC

IN_SEL0

IN_SEL1

RSVD1

RSVD2

RSVD3

RSVD4

VDDA

VDDO0

VDDO1

VDDO2

VDDO3

OU

TP

UT

CLK

CLO

CK

GE

NE

RA

TO

R

INP

UT

CLK

XT

AL

ST

AT

US

/CO

NF

IGI2

C/S

PI PO

WE

R A

ND

GR

OU

ND

RE

SE

RV

ED

19

16

17

58

59

53

54

50

51

44

45

41

42

37

38

34

35

30

31

27

28

10

7

62

61

15

14

2

1

12

23

24

39

18

9

8

65

57

52

49

43

40

6

36

60

46

32

64

63

SI5341A-A-GMQFN-64

Clock Generator, 100Hz-712.5MHz, 10 Outputs

33

29

26

22

13

56

55

21

20

4

3

48

25

5

47

11

+1.8V

+3.3V

CLK_FDEC

CLK_FINC14

14

CLK_INTR_N

CLK_LOL_N

CLK_SYNC_N14

CLK_OE_N

+1.8V

+1.8V

220E@100MHz, 2A

220E@100MHz, 2A

0.1uF

0.1uF

0.1uF

0.1uF

4.7K

0ENS

4.7K

220E@100MHz, 2A

1.0

14

14

GN

D

1uFx6.3V

1uFx6.3V

1

3

4

2

ZQ2

7M48

0720

02

Cry

stal

48,

000M

Hz

TX

C

1uFx6.3V

1uFx6.3V

1uFx6.3V

1uFx6.3V

1uFx6.3V

1uFx6.3V

1uFx6.3V

1uFx6.3V

1uFx6.3V

100E_1%

CLK_RST_N14 0E

U19

FB7

FB9

C167

C168

C171

C145

C159

C154

C140

C176

C173

C158

C144

C143

C142

C141

C146

FB8

100E_1%

LED Green330E

NDS331N

SOT-23

2

3

1

LED Green330E

SOT-23

NDS331N

2

3

1

+3.3V

CLK_LOL_N

+3.3V

CLK_INTR_NIN_SEL[1:0] IN SELECT0011 1

010 IN0

IN1IN2

XA/XB

4.7K

4.7K

4.7K

4.7K

HSR-2,54_1X3

1

+1.8V

SCL_GEN_MGT

SDA_GEN_MGT

NS4.7K

NS4.7KCLK_IN_SEL1

+1.8V

+1.8V

0.01uF

0.01uF

0.01uF

0.01uF

0.01uF

0.01uF

0.01uF

0.01uF

0.01uF

0.01uF

0.01uF

0.01uF

0.01uF

0.01uF

0.01uF

0.01uF

0.01uF

0.01uF

0.01uF

0.01uF

C165

C166

C156

C157

C152

C153

C130

C129

C132

C131

C134

C133

C136

C135

C148

C147

C161

C160

C170

C169

R356

R351

R366

R355

R354

R281

R287

R180

R353

R181

R179

R184

J28

D35R149

Q19

D36R164

Q18

25

25

+VS

GND EN/DIS

OUT

ON

CMOS

4.7K

R368

R396

24E

0.1uF

C322

0.1uF

C149220E@100MHz, 2A

FB16

64

2 1

3

SiTimeSIT8103AC-23-18E-33.33333MHzOSC, 33,33333MHz, 1.8V CMOS

U401

1

2

3

4

8

7

6

5

DIP SWITCH FHDS-4Pitch 1.27mm, SMD

S3R158

4.7K

+1.8V

+1.8V

OSC_SYS_PS_OFF

PS_CLK

CLK_IN_SEL1

CLK_OE_N

OSC_SYS_PS_OFF

+1.8V

OSC_PE_SEL 33

FANOUT_DAC_CLKOUT_P

FANOUT_DAC_CLKOUT_N

C1740.1uFC1750.1uF

MiniSMP

X3

MiniSMP

X4

CLK_GTY_IN0_P

CLK_GTY_IN0_N

24

24

HSTL_12

R48

210

0E_1

%

100E

_1%

R47

6

NS

R48

710

0E_1

%

13

13

100E

_1%

R47

5

100E

_1%

R48

1

MiniSMP

X2

MiniSMP

X1

+1.2V

SYS_CLK_DDR4_PL_N

SYS_CLK_DDR4_PL_P

CLK_OUT_SMA_P

CLK_OUT_SMA_N

36

36

11

11

17

17

17

17

11

11

11

11

FMC_PL_REFCLK_C2M_P

FMC_PL_REFCLK_C2M_N

GTR_505_REFCLK2_P

GTR_505_REFCLK2_N

GTY_131_REFCLK_P

GTY_131_REFCLK_N

GTY_130_REFCLK_P

GTY_130_REFCLK_N

GTR_505_REFCLK3_P

GTR_505_REFCLK3_N

GTR_505_REFCLK1_P

GTR_505_REFCLK1_N

LVDS

100E

_1%

R50

9

12

12

+3.3V

CLK_PL_USER1_P

CLK_PL_USER1_N

LVDS14

14

R15

610

K_1

%

R15

710

K_1

%

100E

_1%

R48

4

+1.8V

CLK_PL_USER2_P

CLK_PL_USER2_N

R16

122

.1K

_1%

R16

022

.1K

_1%

R17

122

.1K

_1%

R17

422

.1K

_1%

R17

313

.3K

_1%

R17

013

.3K

_1%

Page 23: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

1.023 of 48

CLOCK 2: RF PLL

HTG-ZRF8

FANOUT_ADC_CLKIN_N

FANOUT_ADC_CLKIN_P

24

24

24

24

FANOUT_DAC_CLKIN_P

FANOUT_DAC_CLKIN_N

+3.3V_CLK

XO

/VC

XO

VDD

CLK-

CLK+

GND

OE

SDA

SCL

0.1uF

C654 C655

0.1uF 0.1uF

C661 C679

0.1uF 0.1uF

C669 C667

0.1uF

C668

0.01uF0.01uF

C678

FB26

220E@100MHz, 2A

C6870.1uF

0.1uFC685

NS0.1uFC684

NSC686

0.1uF

J2

RADIALL

SSMC, Vertical, 50E7009-1511-000

7009-1511-000SSMC, Vertical, 50E

RADIALL

J11

4.7K

RF_PLL_CSB

RF_PLL_SCK

RF_PLL_SDI

RF_PLL_MUXout12

12

12

12

RF_PLL_CE

RF_PLL_CE

0.01uF0.1uF

220E@100MHz, 2A+3.3V_CLK

25

25

4.7K

4.7K

+3.3V_CLK

SDA_OSC_RF

SCL_OSC_RF

R597

C688C689

FB28

R600

R594

100pF

C647

100pF

C648

C646

100pF

C664

100pF

C663

100pF

100pF

C670

C68110uFx6.3V

10uFx6.3VC672

C6731uFx6.3V

C68010uFx6.3V

C68210uFx6.3V

1uFx6.3VC662

C6771uFx6.3V

C651

*

C645

*

C650

1uFx6.3V

R59

2

49.9

E_1

%49

.9E

_1%

R59

1

+3.3V_RF_PLL

49.9

E_1

%49

.9E

_1%

R60

5R

601

RF

PLL

20

to 5

500

MH

z w

ith V

CO

PW

RO

UT

IN

OSCinP

OSCinN

RFoutAP

RFoutAM

CSB

GR

OU

ND

SCK

SDI

RFoutBP

RFoutBM

Cpout

CE

DAP

GND1

GND2

GND3

GND4

GND5

GND6

GND7

GND8

GND9

GND10

MUXout

NC1

NC2

NC3

NC4

VbiasVARAC

VbiasVCO

VbiasVCO2

VccBUF

VccCP

VccDIG

VccMASH

VccVCO

VccVCO2

VrefVCO

VrefVCO2

VregIN

VregVCO

Vtune

SP

IB

YP

AS

SN

C

U68

LMX2582RHA

QFN-40

RF PLL with VCO, 20MHz-5.5GHz

TI

35

38

10

29

36

26

37

15

7

11

21

27

3

33

32

30

28

5

20

40

39

34

31

25

14

13

6

4

2

41

1

12

18

19

17

16

24

22

23

9

8

49.9

E_1

%

R55

9R

558

49.9

E_1

%

R57

2

49.9

E_1

%49

.9E

_1%

R57

6

C652

22pF

R547

4.75K_1%

C653

0.01uF

R557

0E

R546

0E

NS NS

NS

NS

U69

570BBBxxxxxxDG

CS-9I2C Programmable XO, LVDS, 3.3V

SILICON LABS

8

7

2

3

4

5

6

100E

_1%

Replace by VCC6-LAB-122M880000

R58

3

Page 24: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

1.024 of 48

CLOCK 3: RF Fanout

HTG-ZRF8

1:4

LVP

EC

L F

AN

OU

T

PW

R

OU

T

IN

CLK_P

CLK_N

VREF

EPAD

Q0_P

Q0_N

Q1_P

Q1_N

VEE1

Q2_P

Q2_N

Q3_P

Q3_N

VT

VEE2

VCC1

VCC2

GN

D

18

18

18

18

18

18

18

18

ADC_224_REFCLK_P

ADC_224_REFCLK_N

ADC_225_REFCLK_P

ADC_225_REFCLK_N

ADC_226_REFCLK_P

ADC_226_REFCLK_N

ADC_227_REFCLK_P

ADC_227_REFCLK_N

+3.3V_CLK VCC_FANOUT_ADC

DAC_228_SYSREF_P

DAC_228_SYSREF_N

DAC_228_REFCLK_P

DAC_228_REFCLK_N

DAC_229_REFCLK_P

DAC_229_REFCLK_N

U67

ADCLK944BCPZ

QFN-16

1:4 Differential to LVPECL Fanout, 7GHz

AD

13

8

16

2

6

7

9

10

5

11

12

14

15

17

3

4

1

R50

410

0E_1

%

R50

310

0E_1

%

R50

210

0E_1

%

R50

110

0E_1

%

0.01uF

C640

0.01uF

C639C638

0.1uF

220E@100MHz, 2A

FB23

0.1uF

C641

R552

0E

C657

0.01uF

C6200.01uF

C6190.01uF

C6180.01uF

C6170.01uF

C6160.01uF

C6150.01uF

C6140.01uF

C6130.01uF

FANOUT_ADC_CLKIN_P

FANOUT_ADC_CLKIN_N23

23

1:4

LVP

EC

L F

AN

OU

T

PW

R

OU

T

IN

CLK_P

CLK_N

VREF

EPAD

Q0_P

Q0_N

Q1_P

Q1_N

VEE1

Q2_P

Q2_N

Q3_P

Q3_N

VT

VEE2

VCC1

VCC2

GN

D

19

19

19

19

19

19

23

23

+3.3V_CLK VCC_FANOUT_DAC

FANOUT_DAC_CLKIN_P

FANOUT_DAC_CLKIN_N

100E

_1%

R50

0

100E

_1%

R49

9

100E

_1%

R49

8

C636

0.01uF

C635

0.01uF0.1uF

C634

FB22

220E@100MHz, 2A

C637

0.1uF

0E

R549

0.01uF

C656

AD

1:4 Differential to LVPECL Fanout, 7GHz

QFN-16

ADCLK944BCPZ

U66

13

8

16

2

6

7

9

10

5

11

12

14

15

17

3

4

10.01uF

C612

0.01uFC611

0.01uFC610

0.01uFC609

0.01uFC608

0.01uFC607

22

220.01uF

0.01uF

FANOUT_DAC_CLKOUT_P

FANOUT_DAC_CLKOUT_NC627

C604

200E

_1%

R53

1

200E

_1%

R54

0

R55

020

0E_1

%

200E

_1%

R55

1

200E

_1%

R54

1

200E

_1%

R53

2

R53

320

0E_1

%

200E

_1%

R53

4

R53

520

0E_1

%

200E

_1%

R54

2

R55

320

0E_1

%

200E

_1%

R52

8

R52

920

0E_1

%

R53

020

0E_1

%

R53

920

0E_1

%

200E

_1%

R54

8

R56

413

.3K

_1%

R56

613

.3K

_1%

R56

213

.3K

_1%

R56

013

.3K

_1%

22.1

K_1

%R

563

R56

122

.1K

_1%

R56

522

.1K

_1%

22.1

K_1

%R

567

NS

NS

NS

NS

NS

NS

NS

NS

Page 25: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

R452

4.7K

R442

4.7K 4.7K

R459

R455

4.7KNSNS

4.7K

R443R445

4.7K

0.1uF

C97

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

+3.3V

+3.3V

HTG-ZRF8

I2C Switch

1.0

25 of 48

SDA1SDA2

SCL2 SCL1

EN

VREF1VREF2

GND3I2C

TR

AN

SLA

TO

R

4.7K4.7K 4.7K

+3.3V

240E

200K

240E

0.1uF 0.1uF

8

8

I2C Dual BI Voltage Level translator

uSO-8PCA9306DCU

1

7 2

8

36

5 4

+3.3V +PS_500

+PS_500

0E

0E

I2C_SDA

I2C_SCL MIO14_I2C0_SCL

MIO15_I2C0_SDA

12

12

12I2C_SCL_PL

I2C_SDA_PL

I2C_RST_N_PL0E

PL

PS

R464R463 R474 R461

R446

R458

C417 C455

U53

R472

R473

R471NS

34

34

8

SCL_FMC

SDA_FMC

MIO16_I2C1_SCL

MIO17_I2C1_SDA8

SDA_OSC_RF

SCL_OSC_RF23

23

I2C

-Bus

Sw

itch

SD0 SDA

SCLSC0

A0

VDD

SD1

SC1

SD2

SC2

SD3

SC3

SD4

SC4

SD5

SC5

SD6

SC6

SD7

SC7

A1

A2

RST_N

GND

EPAD

U51

25

9

24

18

23

17

16

15

14

13

12

11

10

8

7

6

5

4

3

21

22

2 19

201

PCA9548ABSHVQFN-24

8-Channel I2C-Bus SwitchNXP

22

22 SCL_GEN_MGT

SDA_GEN_MGT

32

32 SDA_DDR4_SODIMM

SCL_DDR4_SODIMM

Page 26: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

R602

330E

TVS Diode Array

D49

SOT-143

3 2

4 1

470E

R604

LED Green

1K

R593

0.1uF

C694

12R598

4.7K

12

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

1.0

0.1uF

12

10uFx6.3V0603

12

12

12

12

12

RI

DCD

DTR

DSR

TXD

RXD

RTS

CTS

RST

SUSPEND

SUSPEND

REGIN

VDD

GND

VBUS

D-

D+

VIO

GPIO3

GPIO2

GPIO1

GPIO0

US

B to

UA

RT

Brid

ge

U71

CP2103-GMQFN-28

USB to UART Bridge

Silicon Laboratories

19

18

17

16

5

3

4

8

2

6

7

11

12

9

22

23

24

25

26

27

28

1

0.1uF

D28

LED Green

+3.3V

+3.3V

+3.3V

+3.3V

USB_PL_VCC

UART_PL_RTS

USB_UART_PL_D+

USB_UART_PL_D-

USB_PL_PERI_PWR

UART_PL_RXD

UART_PL_RST_N

UART_PL_GPIO1

UART_PL_GPIO0

UART_PL_TXD

UART_PL_CTS

26 of 48

USB to UART

HTG-ZRF8

Power USB PL

C697

C695

C696

D29

RI

DCD

DTR

DSR

TXD

RXD

RTS

CTS

RST

SUSPEND

SUSPEND

REGIN

VDD

GND

VBUS

D-

D+

VIO

GPIO3

GPIO2

GPIO1

GPIO0

US

B to

UA

RT

Brid

ge

+3.3V

+3.3V

+3.3V+PS_500

USB_PS_VCC

USB_UART_PS_D+

USB_UART_PS_D-

UART_PS_GPIO0

Power USB PS

VBUS

D-

D+

GND

SHIELD1

SHIELD2

SHIELD3

SHIELD4

NC

VBUS

D-

D+

GND

SHIELD1

SHIELD2

SHIELD3

SHIELD4

NC

330E

TVS Diode Array

D48

SOT-143

14

23

470E

R595

LED Green

0.1uF

C693

10uFx6.3V

C692

0603

U70

CP2103-GMQFN-28

USB to UART Bridge

Silicon Laboratories

1

28

27

26

25

24

23

22

9

12

11

7

6

2

8

4

3

5

16

17

18

19

0.1uF

C691

D30

LED Green

J1

10103594-0001LF

Type B, SMD

Micro USB, Right Angle, Type B

FCI

4

9

8

7

6

5

3

2

1

J12

10103594-0001LF

Type B, SMD

Micro USB, Right Angle, Type B

FCI

4

9

8

7

6

5

3

2

1

220E@100MHz, 2A

FB27

C690

0.01uF

8

8

+PS_500UART_PS_RST_N

MIO18_UART0_RXD

MIO19_UART0_TXD

TP4

12UART_PL_SUSPEND_N

+3.3V

4.7K

0E

0E

R599

4.7K

R596

4.7K

R588

R589

R590

R603D31

Page 27: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

HTG-ZRF8

USB 3.0

1.027 of 48

MicA_SSRX_P

MicA_SSRX_N

MicA_SSTX_P

MicA_SSTX_N

GND_DRAIN8

GND5

ID

DP

DN

VBUS

CAGE1

CAGE2

US

B 3

.0U

SB

2.0

+PS_502

USB_RST

MIO55_USB_NXT

MIO53_USB_DIR

MIO58_USB_STP

MIO52_USB_CLK

MIO56_USB_D0

MIO57_USB_D1

MIO54_USB_D2

MIO59_USB_D3

MIO60_USB_D4

MIO61_USB_D5

MIO62_USB_D6

MIO63_USB_D7

USB_D-

USB_D+

US

B 2

.0 U

LPI T

rans

ceiv

er

OT

G

ULP

I DIG

ITA

L

CLK

RS

TU

LPI

D7

CPEND6

D5

D4

D3

D2

D1

D0

VDD33

ID

DM

DP

RBIAS

REFCLK

XO

CLKOUT

STP

DIR

NXT

RESETB

VDDIO

VDD18_1

VDD18_2

GND

SPK_L

SPK_R

REFSEL0

REFSEL1

NC

REFSEL2

VBATCO

RE O

UT

US

B

VBUS

+1.8V

+5V

PGND

OUTIN

ILIM

FAULT_N

GND

EN

eFus

e

+PS_502

+5V

+3.3V

+USB_VBUS

1

PBC03SAAN

USB_ID

USB_VDD33

USB_VDD33

USB_ID

10

9

7

6

4

3

2

1

C1

C2

KMMX-AB10-SMT1SB30TR

J34

Type AB, SMD

USB 3.0 Micro, Receptacle

KYCON

USB3_TX_N

USB3_TX_P

USB3_RX_N

USB3_RX_P

11

11

11

11

9

9

9

9

9

9

9

9

9

9

9

9

GN

D

ON = HOST OR OTG MODE

OFF = DEVICE MODE

+PS_502

10K

FA

-238

24.

0000

MB

Cry

stal

24,

000M

Hz

42

31

1M_1

%

0E

USB3320C-EZK

QFN-32

USB 2.0 ULPI Transceiver

Microchip

22

21

14

12

11

8

16

15

33

30

28

32

27

2

31

29

1

25

26

24

18

19

23

20

3

4

5

6

7

9

10 17

13

TPS25200DRVSON-6

eFuse, up to 2A

4

5

3

2

6 1

7

0E

8.06K_1%

0E

0E

220E@100MHz, 2A

0E

220E@100MHz, 2A

330E

HSR-2,54_1X21

10K

24E

220E@100MHz, 2A

SP

3031

-01E

TG

12

SP

3031

-01E

TG

12

SP

3031

-01E

TG

12

SP

3031

-01E

TG1

2 SP

3031

-01E

TG1

2 SP

3031

-01E

TG1

2 SP

3031

-01E

TG1

2

FB14

FB11

D43

D44

D42

D40

JP2

R214

ZQ

4

R279

R220

JP3

R21

6

U26

R215

R273

R218

R222

FB10

R223

D45

D47

D46

U25

R238D41

R22

1

NS

C199

0.1uF

0.1uF

C229

C2120.1uF

0.1uFC211

0.1uF

C208

0.1uF

C201

C218

18pF

18pF

C213

330uFx10V

C236

4.7uFx10V

C240

0.01uF

C221

C200

0.1uF

10uFx6.3V

C220

06030.1uF

C219

C202

0.1uF

JP4

HS

R-2

,54_

1X2

1

R28

0

1.2K

R217

47.5K_1%

Page 28: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

HTG-ZRF8

Ethernet 1Gbit

1.028 of 48

CLO

CK

AD

J

10/1

00/1

000

Mbp

s E

ther

net P

HY

BIA

S

ME

DIA

DE

PE

ND

EN

T IN

TE

RF

AC

ELE

Ds

OU

TP

UT

INP

UT

MDIO

MDC

GND_PAD

VDDA2P5_1

INT_N/PWDN_N

GTX_CLK

TX_EN/TX_CTRL

TX_D0_SGMII_SIN

TX_D1_SGMII_SIP

TX_D2

TX_D3

TX_D4

TX_D5

TX_D6

TX_D7

RX_CLK

RX_DV/RX_CTRL

RX_D0_SGMII_COP

RX_D1_SGMII_CON

RX_D2_SGMII_SOP

RX_D3_SGMII_SON

RX_D4

RX_D5

RX_D6

RX_D7

TX_ER

TX_CLK

RESET_B

VDDA2P5_2

VDD1P1_1

VDD1P1_2

VDD1P1_3

VDD1P1_4

TD_P_A

TD_M_A

TD_P_B

TD_M_B

TD_P_C

TD_M_C

TD_P_D

TD_M_D

RX_ER/GPIO

COL/GPIO

CRS

LED_2

LED_1

LED_0

RESERVED1

RESERVED2

RESERVED3

RESERVED4

XI

XO

CLK_OUT

JTAG_TRST_B

JTAG_CLK

JTAG_TMS

JTAG_TDI

JTAG_TDO

RBIASVDDIO_1

VDDIO_2

VDDIO_3

VDDA1P8_1

VDDA1P8_2

MD

IOIN

TR

ST

JTA

G1V

82V

51V

1G

ND

RE

SE

RV

ED

ETH_MDI_P0

ETH_MDI_N0

ETH_MDI_P1

ETH_MDI_N1

ETH_MDI_P2

ETH_MDI_N2

ETH_MDI_P3

ETH_MDI_N3

ETH_LED2

ETH_LED0

ACT

LINK

SPEED+3.3V

ETH_LED1

ETH_LED0

ETH_LED1

ETH_LED2

+PS_502

+2.5V

+1.1V_PHY

ETH_COL_GPIO

ETH_CRS

+PS_502

MIO77_ETH_MDIO

MIO76_ETH_MDC

+PS_502

9

9

MIO70_ETH_RX_CLK

MIO75_ETH_RX_CTRL9

9ETH_RX_ER_GPIO

MIO71_ETH_RX_D0

MIO72_ETH_RX_D1

MIO73_ETH_RX_D2

MIO74_ETH_RX_D3

ETH_RX_D4

ETH_RX_D5

ETH_RX_D6

ETH_RX_D7

MIO64_ETH_TX_CLK

MIO69_ETH_TX_CTRL

MIO65_ETH_TX_D0

MIO66_ETH_TX_D1

MIO67_ETH_TX_D2

MIO68_ETH_TX_D3

MIO71_ETH_RX_D0

MIO73_ETH_RX_D2

ETH_RX_D4

ETH_RX_D5

ETH_RX_D6

ETH_RX_D7

MIO75_ETH_RX_CTRL

ETH_RX_ER_GPIO

ETH_COL_GPIO

ETH_CRS

ETH_LED2

ETH_LED1

ETH_LED0

+PS_502

9

9

9

9

9

9

9

9

9

9

PGND

IN2 OUT2

GND

NR

OUT1

EN

IN1

FBLDO

+1.1V_PHY+3.3V

1.12V@1A

GN

D

+PS_502

ETH_RST_N+PS_502

LDO, 1A, Vin 2.2V to 6.5V, Vout 0.8V to 6V

VDFN-8TPS7A8101DRBR

U29

3

7

5

1

6

4

28

90603

C238

10uFx6.3V

P31

C230

1nF

10.0K_1%R277

0E

R271

C231

060310uFx6.3V

R2844.02K_1%

C192

18pF

NS

1KR

233

R23

21K

NS

R23

11K

NS

NS

1KR

230

NS

1KR

318

R22

91K

NS

R22

81K

NS

NS

1KR

227

NS

1KR

226

R34

31K

NS

R33

01K

NS

1KR

250

R24

91K

NS

NS

1KR

248

R24

71K

NS

NS

1KR

246

R24

51K

NS

NS

1KR

244

R24

31K

NS

NS

1KR

242

R33

11K

NS

R34

41K

R23

41K

NS

R25

11K

NS

U21

DP83867IRPAP

QFP-64

10/100/1000 Mbps Ethernet PHY, 1.8V/2.5V/3.3V IO

TI

64

17

57

41

2315

26

28

27

25

24

22

18

19

16

9

7

1

63

62

61

56

55

54

14

13

11

10

6

5

3

2

58

42

29

8

12

59

30

39

51

50

49

48

47

46

45

44

53

43

31

32

33

34

35

36

37

38

52

40

60

4

65

20

21

R30

5

2.21

K_1

%

2.21

K_1

%

R20

0

18pF

C189

R19

9

1M_1

%

SOT-23

Q4NDS331N

2

3

1

NDS331NQ6

SOT-232

3

1

330E

R236

NDS331NQ5

SOT-232

3

1

LED Green

D37

C255

1nF1nF

C253

C269

1nF1nF

C284C288

1nF

C283

1nF

C254

1nF

C270

1nF

C289

1nF

4.7KR317

R3094.7K

4.7KR329

4.7KR308

R3411K

1KR175

R3421K

1KR316

R201

11.0K_1%

NS

1KR

235

ZQ

3

FA

-238

25.

0000

MB

Cry

stal

25,

000M

Hz

42

31

C237

0.01uF

FB12

220E@100MHz, 2A

220E@100MHz, 2A

FB15

1KR

319

TP1

R193

10K

J1

J2

J3

J4

J5

J6

J7

J8

TD0_P

SHIELD1

SHIELD2

TD0_N

TD1_P

TD1_N

TD2_P

TD2_N

TD3_P

TD3_N

VCC

GND

J30

HFJ11-1G01E

TH

RJ-45 FastJack, 1 Gbps

HALO

P10

P9

P8

P7

P5

P4

P6

P3

P2

S2

S1

P1

+3.3V

+3.3V

D33LED Green

R259

330E

D34LED Green

R225

330E

Page 29: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

HTG-ZRF8

Display Port and SATA

1.029 of 48

GND1

A+

A-

GND2

B-

B+

GND3

ML_Lane_0p

GND_0

ML_Lane_0n

ML_Lane_1p

GND_1

ML_Lane_1n

ML_Lane_2p

GND_2

ML_Lane_2n

ML_Lane_3p

GND_3

ML_Lane_3n

CFG1

CFG2

AUX_CHp

GND_6

AUX_CHn

Hot_Det

PWR_RTN

DP_PWR

11

11SATA_TX_N

SATA_TX_P

SATA_RX_N

SATA_RX_P11

11

11

11

DP_TX0_N

DP_TX0_P

11 DP_TX1_P

11 DP_TX1_N

PGND

OUTIN

ILIM

FAULT_N

GND

EN

eFus

e

+3.3V

+3.3V

DIN

GND

DOUT_P

DOUT_N

VCC

DE

ROUT

RE_BRIN_P

RIN_N

NC1

NC2

NC3

NC4

+3.3V

1A2 1B2

2B2

1B1

2B1

1A1

GND1

VCCA VCCB

1DIR

2A2

2A1

2DIR

1OE_N

2OE_N

GND2

VO

LTA

GE

TR

AN

SLA

TIO

N

+3.3V

+PS_501

+PS_501

+3.3V

+3.3V

9 MIO27_DP_AUX_OUT

9 MIO28_DP_HPD

+5V

+12V

D Y4

C

GND

B

A

Y3

Y2

Y1

3

DP_TX0-C_P

DP_TX0-C_N

DP_TX1-C_N

DP_TX1-C_P

DP_TX0-C_P

DP_TX0-C_N

DP_TX1-C_P

DP_TX1-C_N

DP_TX0-C_P

DP_TX0-C_N

DP_TX1-C_P

DP_TX1-C_N

FIN1019MTC

TSSOP-14

LVDS Driver/Receiver, 3.3V

FAIRCHILD

13

6

5

3

9

108

4

1

14

11

12

7

2

0.1uF

0.1uF

0.1uF

Ultra Low Capacitance TVS Arrays

10

9

7

1

2

3

4

65

0.1uF

0.1uF

0.1uF

HSR-2,54_1X3

1

0.1uFSN74AVC4T245PW

TSSOP-16

9

14

15

3

6

7

2

161

8

4

11

13

10

125

4.7K

eFuse, up to 2A

SON-6TPS25200DRV

4

5

3

2

6 1

7

0.1uF 330E

100K

47.5K_1%

100K

100K

0.1uF

0.1uF

2.55K_1%

1.54K_1%

1M_1%

1M_1%

060310uFx6.3V

SP

3031

-01E

TG1

2

SP3031-01ETG

12

SP

3031

-01E

TG1

2

ADAM TECH

MINI DISPLAY PORTMDPC-S-RA

J32

20

19

2

18

14

16

6

4

12

13

10

17

8

15

11

7

9

5

1

3

3M

SATA, SMD, Right Angle5607-4200-SH

J33

7

6

5

4

3

2

1

C204

C203

C205

C206

U28

C227 D38 R237

R252

U31

C235

C239

R268

C207

U30

R278

R263

R219

C234

C233

R254

R253

R260

R272

C228

D52

J31

D39

D54

D53

0.01uF

220E@100MHz, 2A

GND_DP_SHIELD

C232

FB13

0.1uF

0.1uF

0.1uF

0.1uF

C214

C215

C216

C217

9 MIO30_DP_AUX_IN

9 MIO29_DP_OE

R26

2

49.9

E_1

%49

.9E

_1%

R26

1

Page 30: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

HTG-ZRF8

DDR4 Components 1-3 (PS)

30 of 48

A0

CS_N

A16/RAS_N

A15/CAS_N

ACT_N

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10/AP

A11

A12/BC_N

DQU0

DQU1

DQU2

DQU3

DQU4

DQU5

DQU6

DQU7

DQL0

DQL1

DQL2

DQL3

DQL4

DQL5

DQL6

DQL7

DQSU_T

DQSU_C

DQSL_T

DQSL_C

CKE

CK_T

CK_C

DMU_N/DBIU_N

DML_N/DBIL_N

ODT

RST_N

VDDQ1

VSSQ1

VDDQ2

VSSQ2

VSS1

VDDQ3

VSSQ3

VSS2

VDD1

VSS3

VDD2

VSS4

VDD3

VDDQ4

VSSQ4

VSS5

VDD4

BA0

VSS6

BG0

VDD5

VDDQ5

VSSQ5

VSSQ6

VSS7

VSS8

VDD6

VREFCA

BA1

VSS9

VSSQ7

VDDQ6

VDD7

VDDQ7

VSSQ8

VSSQ9

VDDQ9

VDD8

VDD9

VDDQ8

ZQ

A13

A14/WE_N

PAR

ALERT_N

TEN

VPP1

VDD10

VPP2

VDDQ10

NC

VSSQ10

RE

F

4G b

its D

DR

4 S

DR

AM

(25

6M w

ords

x 1

6 bi

ts)

PO

WE

R S

UP

PLY

GR

OU

ND

CO

MA

ND

/CLO

CK

DA

TA

I/O

AD

DR

ES

SS

TR

OB

MA

SK

NCDDR4_PS_CK_C

DDR4_PS_CK_T

DDR4_PS_A[8]

DDR4_PS_A[6]

DDR4_PS_A[11]

DDR4_PS_A[4]

DDR4_PS_A[1]

DDR4_PS_BA[1]

DDR4_PS_A[12]

DDR4_PS_A[3]

DDR4_PS_A[10]

DDR4_PS_A[14]

DDR4_PS_A[13]

DDR4_PS_BA[0]

DDR4_PS_A[9]

DDR4_PS_A[2]

DDR4_PS_A[0]

DDR4_PS_A[5]

DDR4_PS_A[7]

DDR4_PS_A[15]

DDR4_PS_A[16]

DDR4_PS_CKE

DDR4_PS_CS_N

DDR4_PS_PAR

DDR4_PS_ACT_N

DDR4_PS_ODT

DDR4_PS_RST_N

DDR4_PS_BG[0]10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

DDR4_PS_TEN10,31

DDR4_PS_ALERT_N10,31

+VREF_DDR4

+2.5V

+1.2V

A0

CS_N

A16/RAS_N

A15/CAS_N

ACT_N

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10/AP

A11

A12/BC_N

DQU0

DQU1

DQU2

DQU3

DQU4

DQU5

DQU6

DQU7

DQL0

DQL1

DQL2

DQL3

DQL4

DQL5

DQL6

DQL7

DQSU_T

DQSU_C

DQSL_T

DQSL_C

CKE

CK_T

CK_C

DMU_N/DBIU_N

DML_N/DBIL_N

ODT

RST_N

VDDQ1

VSSQ1

VDDQ2

VSSQ2

VSS1

VDDQ3

VSSQ3

VSS2

VDD1

VSS3

VDD2

VSS4

VDD3

VDDQ4

VSSQ4

VSS5

VDD4

BA0

VSS6

BG0

VDD5

VDDQ5

VSSQ5

VSSQ6

VSS7

VSS8

VDD6

VREFCA

BA1

VSS9

VSSQ7

VDDQ6

VDD7

VDDQ7

VSSQ8

VSSQ9

VDDQ9

VDD8

VDD9

VDDQ8

ZQ

A13

A14/WE_N

PAR

ALERT_N

TEN

VPP1

VDD10

VPP2

VDDQ10

NC

VSSQ10R

EF

4G b

its D

DR

4 S

DR

AM

(25

6M w

ords

x 1

6 bi

ts)

PO

WE

R S

UP

PLY

GR

OU

ND

CO

MA

ND

/CLO

CK

DA

TA

I/O

AD

DR

ES

SS

TR

OB

MA

SK

NCDDR4_PS_CK_C

DDR4_PS_CK_T

DDR4_PS_A[8]

DDR4_PS_A[6]

DDR4_PS_A[11]

DDR4_PS_A[4]

DDR4_PS_A[1]

DDR4_PS_BA[1]

DDR4_PS_A[12]

DDR4_PS_A[3]

DDR4_PS_A[10]

DDR4_PS_A[14]

DDR4_PS_A[13]

DDR4_PS_BA[0]

DDR4_PS_A[9]

DDR4_PS_A[2]

DDR4_PS_A[0]

DDR4_PS_A[5]

DDR4_PS_A[7]

DDR4_PS_A[15]

DDR4_PS_A[16]

DDR4_PS_CKE

DDR4_PS_CS_N

DDR4_PS_PAR

DDR4_PS_ACT_N

DDR4_PS_ODT

DDR4_PS_RST_N

DDR4_PS_BG[0]10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

DDR4_PS_TEN10,31

DDR4_PS_ALERT_N10,31

+VREF_DDR4

+2.5V

+1.2V

10

1.0

A0

CS_N

A16/RAS_N

A15/CAS_N

ACT_N

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10/AP

A11

A12/BC_N

DQU0

DQU1

DQU2

DQU3

DQU4

DQU5

DQU6

DQU7

DQL0

DQL1

DQL2

DQL3

DQL4

DQL5

DQL6

DQL7

DQSU_T

DQSU_C

DQSL_T

DQSL_C

CKE

CK_T

CK_C

DMU_N/DBIU_N

DML_N/DBIL_N

ODT

RST_N

VDDQ1

VSSQ1

VDDQ2

VSSQ2

VSS1

VDDQ3

VSSQ3

VSS2

VDD1

VSS3

VDD2

VSS4

VDD3

VDDQ4

VSSQ4

VSS5

VDD4

BA0

VSS6

BG0

VDD5

VDDQ5

VSSQ5

VSSQ6

VSS7

VSS8

VDD6

VREFCA

BA1

VSS9

VSSQ7

VDDQ6

VDD7

VDDQ7

VSSQ8

VSSQ9

VDDQ9

VDD8

VDD9

VDDQ8

ZQ

A13

A14/WE_N

PAR

ALERT_N

TEN

VPP1

VDD10

VPP2

VDDQ10

NC

VSSQ10

RE

F

4G b

its D

DR

4 S

DR

AM

(25

6M w

ords

x 1

6 bi

ts)

PO

WE

R S

UP

PLY

GR

OU

ND

CO

MA

ND

/CLO

CK

DA

TA

I/O

AD

DR

ES

SS

TR

OB

MA

SK

NC

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

10,31

+VREF_DDR4

+2.5V

DDR4_PS_CK_C

DDR4_PS_CK_T

DDR4_PS_A[8]

DDR4_PS_A[6]

DDR4_PS_A[11]

DDR4_PS_A[4]

DDR4_PS_A[1]

DDR4_PS_BA[1]

DDR4_PS_A[12]

DDR4_PS_A[3]

DDR4_PS_A[10]

DDR4_PS_A[14]

DDR4_PS_A[13]

DDR4_PS_BA[0]

DDR4_PS_A[9]

DDR4_PS_A[2]

DDR4_PS_A[0]

DDR4_PS_A[5]

DDR4_PS_A[7]

DDR4_PS_A[15]

DDR4_PS_A[16]

DDR4_PS_CKE

DDR4_PS_CS_N

DDR4_PS_PAR

DDR4_PS_ACT_N

DDR4_PS_ODT

DDR4_PS_RST_N

DDR4_PS_BG[0]

DDR4_PS_TEN

DDR4_PS_ALERT_N

+1.2V

P3

L7

L8

M8

L3

P7

R3

N7

N3

P8

P2

R8

R2

R7

M3

T2

M7

A3

B8

C3

C7

C2

C8

D3

D7

G2

F7

H3

H7

H2

H8

J3

J7

B7

A7

G3

F3

K2

K7

K8

E2

E7

K3

P1

A1

A2

A9

A8

B2

C1

C9

E1

B3

E9

B9

G8

D1

F2

D2

K1

G7

N2

K9

M2

J1

D9

D8

E3

M9

N1

J9

M1

N8

T1

E8

F8

L1

G1

F1

H1

J2

L9

R1

G9

F9

T8

L2

T3

P9

N9

B1

T9

R9

J8

T7

H9

U6

EDY4016AABG-DR-FFBGA-96

SDRAM 4Gbits DDR4-2400, 32Meg x 16 x 8banks

MICRON

C546 0.1uF

0.1uFC576

C579 0.1uF

0.1uFC533

0.1uFC577

C578 0.1uFF7

D7

G2

D3

H3

H7

B7

A7

J7

H8

J3

H2

G3

R3

M8

N7

N3

R2

R7

R8

P8

P2

P7

T2

A3

M3

C7

C2

B8

C3

M7

C8

L3

P3

L7

L8

E8

F8

G1

L1

F1

H1

J2

L9

R1

G9

F9

T8

L2

T3

P9

N9

B1

T9

R9

J8

T7

H9

MICRON

U12

EDY4016AABG-DR-FFBGA-96

SDRAM 4Gbits DDR4-2400, 32Meg x 16 x 8banks

K9

J1

D9

D8

E3

M9

N1

J9

M1

N8

T1

M2

E7

B3

C9

E1

C1

A8

K3

P1

A1

A2

A9

B2

E9

N2

K1

B9

G8

D1

F2

D2

G7

K2

F3

K7

K8

E2

0.1uFC580

C387 0.1uF

C434 0.1uF

C519 0.1uF

240E_1%

R486

D1

G8

A8

B2

C1

C9

E1

B3

E9

B9

A9E2

E7

K3

P1

A1

A2

F2

D2

K1

U10

T7

H9

J8

R9

F9

T8

L2

T3

P9

N9

B1

T9

F8

L1

G1

F1

E3

M9

N1

J9

G7

N2

K9

M2

J1

D9

D8

H1

J2

L9

R1

G9

M1

N8

T1

E8

EDY4016AABG-DR-FFBGA-96

SDRAM 4Gbits DDR4-2400, 32Meg x 16 x 8banks

MICRON

K8

K7

K2

F3

G3

A7

B7

J7

J3

H8

H2

H7

H3

F7

G2

D7

D3

C8

C2

C7

C3

B8

A3

M7

T2

M3

R7

R2

R8

P2

P8

N3

N7

R3

P7

L3

M8

L8

L7

P3

C484 0.1uF

0.1uFC466

C439 0.1uF

C483 0.1uF

0.1uFC482

C451 0.1uF

0.1uFC467

C497 0.1uF

0.1uF

0.1uF

0.1uFC480

C413 0.1uF

R448

240E_1%

0.1uFC532

C518 0.1uF

0.1uFC485

0.1uFC529

C530 0.1uF

C531 0.1uF

0.1uFC520

0.1uFC468

0.1uFC358

240E_1%

R462

DDR4_PS_DQS_T[1]

DDR4_PS_DQS_C[1]

DDR4_PS_DQS_T[0]

DDR4_PS_DQS_C[0]

DDR4_PS_DQ[2]

DDR4_PS_DQ[9]

DDR4_PS_DQ[8]

DDR4_PS_DQ[14]

DDR4_PS_DQ[12]

DDR4_PS_DQ[10]

DDR4_PS_DM_DBI_N[1]

DDR4_PS_DQ[11]

DDR4_PS_DQ[15]

DDR4_PS_DQ[13]

DDR4_PS_DQ[4]

DDR4_PS_DQ[7]

DDR4_PS_DQ[5]

DDR4_PS_DQ[6]

DDR4_PS_DQ[1]

DDR4_PS_DQ[3]

DDR4_PS_DM_DBI_N[0]

DDR4_PS_DQ[0]

DDR4_PS_DQS_T[3]

DDR4_PS_DQS_C[3]

DDR4_PS_DQ[24]

DDR4_PS_DQ[27]

DDR4_PS_DQ[30]

DDR4_PS_DQS_T[2]

DDR4_PS_DQS_C[2]

DDR4_PS_DQ[26]

DDR4_PS_DQ[31]

DDR4_PS_DQ[29]

DDR4_PS_DQ[25]

DDR4_PS_DM_DBI_N[3]

DDR4_PS_DQ[22]

DDR4_PS_DQ[18]

DDR4_PS_DQ[20]

DDR4_PS_DQ[19]

DDR4_PS_DQ[21]

DDR4_PS_DQ[23]

DDR4_PS_DM_DBI_N[2]

DDR4_PS_DQ[16]

DDR4_PS_DQ[17]

DDR4_PS_DQ[28]

DDR4_PS_DQ[43]

DDR4_PS_DQS_T[5]

DDR4_PS_DQS_C[5]

DDR4_PS_DQ[46]

DDR4_PS_DQ[45]

DDR4_PS_DQ[35]

DDR4_PS_DQS_T[4]

DDR4_PS_DQS_C[4]

DDR4_PS_DQ[36]

DDR4_PS_DM_DBI_N[4]

DDR4_PS_DQ[32]

DDR4_PS_DQ[38]

DDR4_PS_DQ[33]

DDR4_PS_DQ[37]

DDR4_PS_DQ[39]

DDR4_PS_DQ[34]

DDR4_PS_DQ[42]

DDR4_PS_DQ[44]

DDR4_PS_DQ[40]

DDR4_PS_DQ[41]

DDR4_PS_DM_DBI_N[5]

DDR4_PS_DQ[47]

C465

C481

Page 31: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

+VTT_DDR4

HTG-ZRF8

DDR4 Components 4-5 (PS)

31 of 48

A0

CS_N

A16/RAS_N

A15/CAS_N

ACT_N

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10/AP

A11

A12/BC_N

DQU0

DQU1

DQU2

DQU3

DQU4

DQU5

DQU6

DQU7

DQL0

DQL1

DQL2

DQL3

DQL4

DQL5

DQL6

DQL7

DQSU_T

DQSU_C

DQSL_T

DQSL_C

CKE

CK_T

CK_C

DMU_N/DBIU_N

DML_N/DBIL_N

ODT

RST_N

VDDQ1

VSSQ1

VDDQ2

VSSQ2

VSS1

VDDQ3

VSSQ3

VSS2

VDD1

VSS3

VDD2

VSS4

VDD3

VDDQ4

VSSQ4

VSS5

VDD4

BA0

VSS6

BG0

VDD5

VDDQ5

VSSQ5

VSSQ6

VSS7

VSS8

VDD6

VREFCA

BA1

VSS9

VSSQ7

VDDQ6

VDD7

VDDQ7

VSSQ8

VSSQ9

VDDQ9

VDD8

VDD9

VDDQ8

ZQ

A13

A14/WE_N

PAR

ALERT_N

TEN

VPP1

VDD10

VPP2

VDDQ10

NC

VSSQ10

RE

F

4G b

its D

DR

4 S

DR

AM

(25

6M w

ords

x 1

6 bi

ts)

PO

WE

R S

UP

PLY

GR

OU

ND

CO

MA

ND

/CLO

CK

DA

TA

I/O

AD

DR

ES

SS

TR

OB

MA

SK

NC

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

+VREF_DDR4

+2.5V

+1.2V

10

DDR4_PS_A[6]

DDR4_PS_A[4]

DDR4_PS_A[1]

DDR4_PS_A[3]

DDR4_PS_A[2]

DDR4_PS_A[0]

DDR4_PS_A[5]

DDR4_PS_CK_C

DDR4_PS_CK_T

DDR4_PS_A[8]

DDR4_PS_A[6]

DDR4_PS_A[11]

DDR4_PS_A[4]

DDR4_PS_A[1]

DDR4_PS_BA[1]

DDR4_PS_A[12]

DDR4_PS_A[3]

DDR4_PS_A[10]

DDR4_PS_A[14]

DDR4_PS_A[13]

DDR4_PS_BA[0]

DDR4_PS_A[9]

DDR4_PS_A[2]

DDR4_PS_A[0]

DDR4_PS_A[5]

DDR4_PS_A[7]

DDR4_PS_A[15]

DDR4_PS_A[16]

DDR4_PS_CKE

DDR4_PS_CS_N

DDR4_PS_PAR

DDR4_PS_ACT_N

DDR4_PS_ODT

DDR4_PS_RST_N

DDR4_PS_BG[0]

DDR4_PS_TEN

DDR4_PS_ALERT_N

DDR4_PS_RST_N

DDR4_PS_TEN

DDR4_PS_ALERT_N

1.0

DDR4_PS_CK_C

DDR4_PS_A[9]

DDR4_PS_A[11]

DDR4_PS_BA[1]

DDR4_PS_A[12]

DDR4_PS_A[10]

DDR4_PS_A[14]

DDR4_PS_A[13]

DDR4_PS_BA[0]

DDR4_PS_A[15]

DDR4_PS_A[16]

DDR4_PS_CKE

DDR4_PS_BG[0]

DDR4_PS_A[8]

DDR4_PS_A[7]

DDR4_PS_CS_N

DDR4_PS_PAR

DDR4_PS_ACT_N

DDR4_PS_ODT

+1.2V

DDR4_PS_CK_T

+1.2V

A0

CS_N

A16/RAS_N

A15/CAS_N

ACT_N

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10/AP

A11

A12/BC_N

DQU0

DQU1

DQU2

DQU3

DQU4

DQU5

DQU6

DQU7

DQL0

DQL1

DQL2

DQL3

DQL4

DQL5

DQL6

DQL7

DQSU_T

DQSU_C

DQSL_T

DQSL_C

CKE

CK_T

CK_C

DMU_N/DBIU_N

DML_N/DBIL_N

ODT

RST_N

VDDQ1

VSSQ1

VDDQ2

VSSQ2

VSS1

VDDQ3

VSSQ3

VSS2

VDD1

VSS3

VDD2

VSS4

VDD3

VDDQ4

VSSQ4

VSS5

VDD4

BA0

VSS6

BG0

VDD5

VDDQ5

VSSQ5

VSSQ6

VSS7

VSS8

VDD6

VREFCA

BA1

VSS9

VSSQ7

VDDQ6

VDD7

VDDQ7

VSSQ8

VSSQ9

VDDQ9

VDD8

VDD9

VDDQ8

ZQ

A13

A14/WE_N

PAR

ALERT_N

TEN

VPP1

VDD10

VPP2

VDDQ10

NC

VSSQ10

RE

F

4G b

its D

DR

4 S

DR

AM

(25

6M w

ords

x 1

6 bi

ts)

PO

WE

R S

UP

PLY

GR

OU

ND

CO

MA

ND

/CLO

CK

DA

TA

I/O

AD

DR

ES

SS

TR

OB

MA

SK

NCDDR4_PS_CK_C

DDR4_PS_CK_T

DDR4_PS_A[8]

DDR4_PS_A[6]

DDR4_PS_A[11]

DDR4_PS_A[4]

DDR4_PS_A[1]

DDR4_PS_BA[1]

DDR4_PS_A[12]

DDR4_PS_A[3]

DDR4_PS_A[10]

DDR4_PS_A[14]

DDR4_PS_A[13]

DDR4_PS_BA[0]

DDR4_PS_A[9]

DDR4_PS_A[2]

DDR4_PS_A[0]

DDR4_PS_A[5]

DDR4_PS_A[7]

DDR4_PS_A[15]

DDR4_PS_A[16]

DDR4_PS_CKE

DDR4_PS_CS_N

DDR4_PS_PAR

DDR4_PS_ACT_N

DDR4_PS_ODT

DDR4_PS_RST_N

DDR4_PS_BG[0]10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

10,30

DDR4_PS_TEN10,30

DDR4_PS_ALERT_N10,30

+VREF_DDR4

+2.5V

+1.2V

0.1uFCP3

54

0.1uFCP3

63

0.1uFCP3

72

CP30.1uF81

CP60.1uF54

CP60.1uF63

0.1uFCP6

72

CP60.1uF81

CP50.1uF54

CP50.1uF63

0.1uFCP5

72

CP50.1uF81

33E_1%

R419

R418

33E_1%

0.01uF

C372

CP10.1uF72

CP10.1uF81

CP40.1uF54

0.1uFCP4

63

0.1uFCP2

54

CP20.1uF63

CP20.1uF72

CP20.1uF81

4.7K

R420

4.7K NS

R155

R154

510E

SDRAM 4Gbits DDR4-2400, 32Meg x 16 x 8banks

FBGA-96EDY4016AABG-DR-F

U15

MICRON

H9

T7

J8

R9

T9

B1

N9

P9

T3

L2

T8

F9

G9

R1

L9

J2

H1

F1

G1

L1

F8

E8

T1

N8

M1

J9

N1

M9

E3

D8

D9

J1

M2

K9

N2

G7

K1

D2

F2

D1

G8

B9

E9

B3

E1

C9

C1

B2

A8

A9

A2

A1

P1

K3

E7

E2

K8

K7

K2

F3

G3

A7

B7

J7

J3

H8

H2

H7

H3

F7

G2

D7

D3

C8

C2

C7

C3

B8

A3

M7

T2

M3

R7

R2

R8

P2

P8

N3

N7

R3

P7

L3

M8

L8

L7

P3

MICRON

SDRAM 4Gbits DDR4-2400, 32Meg x 16 x 8banks

FBGA-96EDY4016AABG-DR-F

U13

H9

T7

J8

R9

T9

B1

N9

P9

T3

L2

T8

F9

G9

R1

L9

J2

H1

F1

G1

L1

F8

E8

T1

N8

M1

J9

N1

M9

E3

D8

D9

J1

M2

K9

N2

G7

K1

D2

F2

D1

G8

B9

E9

B3

E1

C9

C1

B2

A8

A9

A2

A1

P1

K3

E7

E2

K8

K7

K2

F3

G3

A7

B7

J7

J3

H8

H2

H7

H3

F7

G2

D7

D3

C8

C2

C7

C3

B8

A3

M7

T2

M3

R7

R2

R8

P2

P8

N3

N7

R3

P7

L3

M8

L8

L7

P3

C438 0.1uF

0.1uFC414

0.1uFC391

C452 0.1uF

0.1uFC437

0.1uFC436

C435 0.1uF

C396 0.1uF

240E_1%

R429

40.2E_1%R408

0.1uFC390

0.1uFC386

C366 0.1uF

C397 0.1uF

C388 0.1uF

0.1uFC398

10uFx6.3V

C341

10uFx6.3V

C336

C389 0.1uF

C359 0.1uF

0.1uFC357

R407

240E_1%

DDR4_PS_DQ[57]

DDR4_PS_DQS_T[7]

DDR4_PS_DQS_C[7]

DDR4_PS_DQS_T[6]

DDR4_PS_DQS_C[6]

DDR4_PS_DQ[54]

DDR4_PS_DQ[52]

DDR4_PS_DQ[62]

DDR4_PS_DQ[58]

DDR4_PS_DQ[56]

DDR4_PS_DQ[60]

DDR4_PS_DQ[63]

DDR4_PS_DM_DBI_N[7]

DDR4_PS_DQ[61]

DDR4_PS_DQ[59]

DDR4_PS_DQ[55]

DDR4_PS_DM_DBI_N[6]

DDR4_PS_DQ[53]

DDR4_PS_DQ[51]

DDR4_PS_DQ[48]

DDR4_PS_DQ[49]

DDR4_PS_DQ[50]

DDR4_PS_DQ[65]

DDR4_PS_DQ[66]

DDR4_PS_DQ[69]

DDR4_PS_DQ[67]

DDR4_PS_DQ[71]

DDR4_PS_DQ[70]

DDR4_PS_DQ[64]

DDR4_PS_DQ[68]

DDR4_PS_DM_DBI_N[8]

DDR4_PS_DQS_T[8]

DDR4_PS_DQS_C[8]

4 5CP1

0.1uF

3 6 0.1uFCP1

2 7CP4

0.1uF

1 8CP4

0.1uF

4 5 40.2E_1%RP1

3 6 40.2E_1%RP1

1 8 40.2E_1%RP6

1 8 40.2E_1%RP1

4 5RP6

40.2E_1%

3 6RP6

40.2E_1%

2 7RP1

40.2E_1%

2 7RP6

40.2E_1%

2 7RP2

40.2E_1%

1 8RP5

40.2E_1%

4 5 40.2E_1%RP2

2 7RP5

40.2E_1%

3 6RP2

40.2E_1%

3 6RP5

40.2E_1%

2 7 40.2E_1%RP4

2 7 40.2E_1%RP3

1 8RP4

40.2E_1%

3 6 40.2E_1%RP4

4 5 40.2E_1%RP3

1 8RP3

40.2E_1%

4 5 40.2E_1%RP4

3 6 40.2E_1%RP3

1 8 40.2E_1%RP2

4 5RP5

40.2E_1%

Page 32: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C 1.0

IN

HTG-ZRF8

DDR4 SODIMM (PL)

32 of 48

A0

A1

A10/AP

A11

A12

A13

A2

A3

A4

A5

A6

A7

A8

A9

ACT_N

ALERT_N

BA0

BA1

BG0

BG1

C0/CS2_N/NC

C1/CS3_N/NC

CAS_N/A15

CK0_C

CK0_T

CK1_C/NF

CK1_T/NF

CKE0

CKE1/NC

CS0_N

CS1_N/NC

EVENT_N/NF

ODT0

ODT1/NC

PARITY

RAS_N/A16

RESET_N

SA0

SA1

SA2

SCL

SDA

VDDSPD

WE_N/A14

DD

R4

SO

DIM

MC

LOC

KI2

CC

MD

BA

NK

AD

DR

ES

S

DM0_N/DBI0_N

DM1_N/DBI_N

DM2_N/DBI2_N

DM3_N/DBI3_N

DQ0

DQ1

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

DQ16

DQ17

DQ18

DQ19

DQ2

DQ20

DQ21

DQ22

DQ23

DQ24

DQ25

DQ26

DQ27

DQ28

DQ29

DQ3

DQ30

DQ31

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

DQS0_C

DQS0_T

DQS1_C

DQS1_T

DQS2_C

DQS2_T

DQS3_C

DQS3_T

BY

TE

3B

YT

E2

BY

TE

1

DD

R4

SO

DIM

MB

YT

E0

DM4_N/DBI4_N

DM5_N/DBI5_N

DM6_N/DBI6_N

DM7_N/DBI7_N

DQ32

DQ33

DQ34

DQ35

DQ36

DQ37

DQ38

DQ39

DQ40

DQ41

DQ42

DQ43

DQ44

DQ45

DQ46

DQ47

DQ48

DQ49

DQ50

DQ51

DQ52

DQ53

DQ54

DQ55

DQ56

DQ57

DQ58

DQ59

DQ60

DQ61

DQ62

DQ63

DQS4_C

DQS4_T

DQS5_C

DQS5_T

DQS6_C

DQS6_T

DQS7_C

DQS7_T

BY

TE

7B

YT

E6

BY

TE

5

DD

R4

SO

DIM

MB

YT

E4

DQS8_T

DQS8_C

CB0/NC

CB1/NC

CB2/NC

CB3/NC

CB4/NC

CB5/NC

CB6/NC

CB7/NC

DM8_N/DBI_N/NC

BY

TE

8

DD

R4

SO

DIM

M

VSS1

VSS2

VSS3

VSS4

VSS5

VSS6

VSS7

VSS8

VSS9

VSS10

VSS11

VSS12

VSS13

VSS14

VSS15

VSS16

VSS17

VSS18

VSS19

VSS20

VSS21

VSS22

VSS23

VSS24

VSS25

VSS26

VSS27

VSS28

VSS29

VSS30

VSS31

VSS32

VSS33

VSS34

VSS35

VSS36

VSS37

VSS38

VSS39

VSS40

VSS41

VSS42

VSS43

VSS44

VSS45

VSS46

VSS47

GR

OU

ND

PIN

S (

SE

CT

ION

1 O

F 2

)

DD

R4

SO

DIM

M

VSS48

VSS49

VSS50

VSS51

VSS52

VSS53

VSS54

VSS55

VSS56

VSS57

VSS58

VSS59

VSS60

VSS61

VSS62

VSS63

VSS64

VSS65

VSS66

VSS67

VSS68

VSS69

VSS70

VSS71

VSS72

VSS73

VSS74

VSS75

VSS76

VSS77

VSS78

VSS79

VSS80

VSS81

VSS82

VSS83

VSS84

VSS85

VSS86

VSS87

VSS88

VSS89

VSS90

VSS91

VSS92

VSS93

VSS94

GR

OU

ND

PIN

S (

SE

CT

ION

2 O

F 2

)

DD

R4

SO

DIM

M

VDD1

VDD2

VDD3

VDD4

VDD5

VDD6

VDD7

VDD8

VDD9

VDD10

VDD11

VDD12

VDD13

VDD14

VDD15

VDD16

VDD17

VDD18

VDD19

VPP1

VPP2

VREFCA

VTT

1.2V

2.5V

0.6V

0.6V

DD

R4

SO

DIM

M

J36

DDR-4 SODIMM Standard Type260 Pins, Pitch 0.5mm

Socket DDR-4 SODIMM Standard Type

151

255

254

253

166

260

256

108

152

143

161

155

134

157

149

110

109

138

140

137

139

156

165

162

113

115

145

150

116

114

121

125

122

127

126

128

131

132

158

119

120

146

133

144

J36

76

74

55

53

34

32

13

11

29

28

17

16

3

4

80

79

21

67

66

84

83

71

70

59

58

45

46

20

63

62

49

50

37

38

25

24

42

41

7

8

75

54

33

12

J36

242

240

221

219

200

198

179

177

246

245

233

232

250

249

236

237

225

224

212

211

229

228

215

216

204

203

190

191

208

207

194

195

182

183

169

170

186

187

173

174

241

220

199

178

J36

96

104

100

87

88

105

101

91

92

95

97

J36

98

94

93

90

89

86

85

82

81

78

77

73

72

69

68

65

64

61

60

57

56

52

51

48

47

44

43

40

39

36

35

31

30

27

26

23

22

19

18

15

14

10

9

6

5

2

1

J36

252

251

248

247

244

243

239

238

235

234

231

230

227

226

223

222

218

217

214

213

210

209

206

205

202

201

197

196

193

192

189

188

185

184

181

180

176

175

172

171

168

167

107

106

103

102

99

J36

258

164

259

257

163

160

159

154

153

148

147

142

141

136

135

130

129

124

123

118

117

112

111

DDR4_PL_DQS_T[1]

DDR4_PL_DQS_C[1]

DDR4_PL_DQS_T[0]

DDR4_PL_DQS_C[0]

DDR4_PL_DQ[2]

DDR4_PL_DQ[9]

DDR4_PL_DQ[8]

DDR4_PL_DQ[14]

DDR4_PL_DQ[12]

DDR4_PL_DQ[10]

DDR4_PL_DM_DBI_N[1]

DDR4_PL_DQ[11]

DDR4_PL_DQ[15]

DDR4_PL_DQ[13]

DDR4_PL_DQ[4]

DDR4_PL_DQ[7]

DDR4_PL_DQ[5]

DDR4_PL_DQ[6]

DDR4_PL_DQ[1]

DDR4_PL_DQ[3]

DDR4_PL_DM_DBI_N[0]

DDR4_PL_DQ[0]

DDR4_PL_DQS_T[3]

DDR4_PL_DQS_C[3]

DDR4_PL_DQ[24]

DDR4_PL_DQ[27]

DDR4_PL_DQ[30]

DDR4_PL_DQS_T[2]

DDR4_PL_DQS_C[2]

DDR4_PL_DQ[26]

DDR4_PL_DQ[31]

DDR4_PL_DQ[29]

DDR4_PL_DQ[25]

DDR4_PL_DM_DBI_N[3]

DDR4_PL_DQ[22]

DDR4_PL_DQ[18]

DDR4_PL_DQ[20]

DDR4_PL_DQ[19]

DDR4_PL_DQ[21]

DDR4_PL_DQ[23]

DDR4_PL_DM_DBI_N[2]

DDR4_PL_DQ[16]

DDR4_PL_DQ[17]

DDR4_PL_DQ[28]

DDR4_PL_DQ[43]

DDR4_PL_DQS_T[5]

DDR4_PL_DQS_C[5]

DDR4_PL_DQ[46]

DDR4_PL_DQ[45]

DDR4_PL_DQ[35]

DDR4_PL_DQS_T[4]

DDR4_PL_DQS_C[4]

DDR4_PL_DQ[36]

DDR4_PL_DM_DBI_N[4]

DDR4_PL_DQ[32]

DDR4_PL_DQ[38]

DDR4_PL_DQ[33]

DDR4_PL_DQ[37]

DDR4_PL_DQ[39]

DDR4_PL_DQ[34]

DDR4_PL_DQ[42]

DDR4_PL_DQ[44]

DDR4_PL_DQ[40]

DDR4_PL_DQ[41]

DDR4_PL_DM_DBI_N[5]

DDR4_PL_DQ[47]

DDR4_PL_DQS_T[6]

DDR4_PL_DQS_C[6]

DDR4_PL_DQ[54]

DDR4_PL_DQ[52]

DDR4_PL_DQ[55]

DDR4_PL_DM_DBI_N[6]

DDR4_PL_DQ[53]

DDR4_PL_DQ[51]

DDR4_PL_DQ[48]

DDR4_PL_DQ[49]

DDR4_PL_DQ[50]

DDR4_PL_CK0_C

DDR4_PL_CK0_T

DDR4_PL_A[8]

DDR4_PL_A[6]

DDR4_PL_A[11]

DDR4_PL_A[4]

DDR4_PL_A[1]

DDR4_PL_BA[1]

DDR4_PL_A[12]

DDR4_PL_A[3]

DDR4_PL_A[10]

DDR4_PL_A[14]

DDR4_PL_A[13]

DDR4_PL_BA[0]

DDR4_PL_A[9]

DDR4_PL_A[2]

DDR4_PL_A[0]

DDR4_PL_A[5]

DDR4_PL_A[7]

DDR4_PL_A[15]

DDR4_PL_A[16]

DDR4_PL_CKE0

DDR4_PL_CS0_N

DDR4_PL_PAR

DDR4_PL_ACT_N

DDR4_PL_ODT0

DDR4_PL_RST_N

DDR4_PL_BG[0] 13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

DDR4_PL_EVENT_N

DDR4_PL_ALERT_N 13

13DDR4_PL_BG[1]

13DDR4_PL_CS1_N

13DDR4_PL_CS2_N

13DDR4_PL_CS3_N

13DDR4_PL_CKE1

13DDR4_PL_ODT1

13

13

13DDR4_PL_CK1_C

DDR4_PL_CK1_T

+2.5V

SDA_DDR4_SODIMM

SCL_DDR4_SODIMM 25

25

+2.5V

+2.5V

+1.2V

+2.5V

+VREF_DDR4

+VTT_DDR4

13

DDR4_PL_RST_N

DDR4_PL_CKE0

DDR4_PL_CKE1

DDR4_PL_EVENT_N

0E

0E

0E

4.7K

4.7K

4.7K

4.7K

4.7K

4.7K

R177

R176

R172

R169

R178

R140

R139

R141

R145

DDR4_PL_DQ[57]

DDR4_PL_DQS_T[7]

DDR4_PL_DQS_C[7]

DDR4_PL_DQ[62]

DDR4_PL_DQ[58]

DDR4_PL_DQ[56]

DDR4_PL_DQ[60]

DDR4_PL_DQ[63]

DDR4_PL_DM_DBI_N[7]

DDR4_PL_DQ[61]

DDR4_PL_DQ[59]

DDR4_PL_DQ[65]

DDR4_PL_DQ[66]

DDR4_PL_DQ[69]

DDR4_PL_DQ[67]

DDR4_PL_DQ[71]

DDR4_PL_DQ[70]

DDR4_PL_DQ[64]

DDR4_PL_DQ[68]

DDR4_PL_DM_DBI_N[8]

DDR4_PL_DQS_T[8]

DDR4_PL_DQS_C[8]

TANTAL-D680uFx3.0V

0.22uF

0.22uF

C117

C299

C343

Page 33: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

1.0

+3.3V

+3.3V

N0

OSC_PE_SEL

PLL_SEL

SSC_EN

OEA

OEB

N1

VDD

VDDX

VDDA

IREF

VDD0

HTG-ZRF8

PCIE Edge Connector

33 of 48

GN

D

1K

R159

1K

R71 NS

R72

1K

1K

R516

NS

R543

1K

1K

R554

R569

1K

1K

R73

NS

R74

1K

1K

R568

NS

+3.3V

N1

OEB

SSC_EN

PLL_SEL

OSC_PE_SEL

N0

R523

1KOEA

NS

ZQ

1

Crystal 25,000MHz

42

31

10uFx6.3V0603

C599

0.1uF

C78

0.1uF

C60

C79

0.1uF

220E@100MHz, 2A

FB21

C59

0.1uF

C73

0.1uF0.1uF

C63

0.1uF

C77

0.1uF

C58

FB19

220E@100MHz, 2A

10uFx6.3V0603

C623

C598

0.1uF

C587

060310uFx6.3V

10E

R511

R522

10E

0.1uF

C566

CLK

NCLK

OEA

N0

VDD_XTAL

GND1

QA0

N1

OEB

NQA0

QA1

NQA1

QB0

NQB0

VDDO1

VDDA

VDD1

XTAL_IN

XTAL_OUT

CLK_SEL

PLL_SEL

SSC_EN

QB1

NQB1

IREF VDD2

VDDO2

VDDO3

VDDO4

GND2

GND3

GND4

PC

I-E

JIT

TE

R A

TT

EN

UA

TO

R

PO

WE

R P

INS

OU

T

INC

ON

FIG

UR

AT

ION

GN

D P

INS

2

3

29

19

4

8

31

18

13

30

27

26

10

11

9

21

1

5

6

7

23

22

14

15

24 17

16

25

32

12

20

28

IDT

PCI-E Jitter Attenuator Gen. 3.0

QFN-32

871S1022EKLF

U4

475E_1%

R80

B

DIR

A

GND

VCCA VCCB

TR

AN

SLA

TIO

N

R491

10E

PCIE-R_PERST_N

0.1uF

C544

0.1uF

C545

U56

SN74AVC1T45DCKR

61

2

3

5

4 15

+3.3V +VADJ_FMC_PL

PCIE_PERST_N_F

NS

R97

100E_1%

0E0E

NS0.01uF

NS0.01uF

16

16

100MHzPCIE_CLK0_MGT1_P

PCIE_CLK0_MGT1_NPCIE_CLK_N

PCIE_CLK_P

R10

5

R10

4

C83

C82

01100110

INPUTSCLK_SEL IN (MHz) N1:N0

Table PCI Express Jitter Attenuator Mode Select

0

25

0

OUTPUTSN Divider (MHz)

1

251

0

25

00

2510 100

1

0

100

1

0 100

11

100

1 1 500

500250

24

5

5

100

250125100

125

124

16

PCIE_RX[0]_P

PCIE_RX[1]_P

PCIE_RX[2]_P

PCIE_RX[3]_P

PCIE_RX[4]_P

PCIE_RX[5]_P

PCIE_RX[6]_P

PCIE_RX[7]_P

PCIE_RX[0]_N

PCIE_RX[1]_N

PCIE_RX[2]_N

PCIE_RX[3]_N

PCIE_RX[4]_N

PCIE_RX[5]_N

PCIE_RX[6]_N

PCIE_RX[7]_N

PCIE_TX[0]_P

PCIE_TX[1]_P

PCIE_TX[2]_P

PCIE_TX[3]_P

PCIE_TX[4]_P

PCIE_TX[5]_P

PCIE_TX[6]_P

PCIE_TX[7]_P

PCIE_TX[0]_N

PCIE_TX[1]_N

PCIE_TX[2]_N

PCIE_TX[3]_N

PCIE_TX[4]_N

PCIE_TX[5]_N

PCIE_TX[6]_N

PCIE_TX[7]_N

PCIE_C_TX[1]_P

PCIE_C_TX[2]_P

PCIE_C_TX[3]_P

PCIE_C_TX[4]_P

PCIE_C_TX[5]_P

PCIE_C_TX[6]_P

PCIE_C_TX[7]_P

PCIE_C_TX[1]_N

PCIE_C_TX[2]_N

PCIE_C_TX[3]_N

PCIE_C_TX[4]_N

PCIE_C_TX[5]_N

PCIE_C_TX[6]_N

PCIE_C_TX[7]_N

PCIE_C_TX[0]_P

PCIE_C_TX[0]_N

PCIE_PRSNT_N_X8

PCIE_PRSNT_N_X8

C565

0.22uFC547

0.22uF

0.22uF

C534

C521

0.22uF

0.22uF

C498

C508

0.22uF

0.22uF

C487

C486

0.22uF

0.22uF

C453

C461

0.22uF

0.22uF

C441

C440

0.22uF

0.22uF

C407

C415

0.22uF

0.22uF

C400

C399

0.22uF

NS

0E

R49612 PCIE_WAKE_N

KEYWAY

KEYWAY KEYWAY

KEYWAY

+3.3V_2A

J_TDO

J_TDI

+12V_1A

PRSNT1

+12V_2A

GND_1A

J_TCK

J_TMS

+3.3V_1A

PERST

GND_2A

REFCLK+

REFCLK-

GND_3A

PERP0

PERN0

GND_4A

RSVD_1A

GND_5A

PERP1

PERN1

GND_6A

GND_7A

PERP2

PERN2

GND_8A

GND_9A

PERP3

PERN3

GND_10A

RSVD_2A

RSVD_3A

GND_11A

PERP4

PERN4

GND_12A

GND_13A

PERP5

PERN5

GND_14A

GND_15A

PERP6

PERN6

GND_16A

GND_17A

PERP7

PERN7

GND_18A

KEYWAY

KEYWAY KEYWAY

KEYWAY

+12V_1B

+12V_2B

+12V_3B

GND_1B

SMCLK

SMDAT

GND_2B

+3.3V_1B

J_TRST

+3.3VAUX

WAKE

RSVD_1B

GND_3B

PETP0

PETN0

GND_4B

PRSNT2_1

GND_5B

PETP1

PETN1

GND_6B

GND_7B

PETP2

PETN2

GND_8B

GND_9B

PETP3

PETN3

GND_10B

RSVD_2B

PRSNT2_2

GND_11B

PETP4

PETN4

GND_12B

GND_13B

PETP5

PETN5

GND_14B

GND_15B

PETP6

PETN6

GND_16B

GND_17B

PETP7

PETN7

GND_18B

PRSNT2_3

GND_19B

A33

A32

A31

A30

A29

A28

A27

A26

A25

A24

A23

A22

A21

A20

A19

A18

A17

A16

A15

A14

A13

A12

A11

A9

A8

A5

A4

A3

A1

A2

A6

A7

A10

A46

A45

A44

A43

A42

A41

A40

A39

A38

A37

A36

A35

A34

PEA1

A49

A48

A47

PEB1

x8 PCIe Finger

B49

B48

B47

B46

B45

B44

B43

B42

B41

B40

B39

B38

B37

B36

B35

B34

B33

B32

B31

B30

B29

B28

B27

B26

B25

B24

B23

B22

B21

B20

B19

B18

B17

B16

B15

B14

B13

B12

B11

B10

B9

B8

B7

B6

B5

B4

B3

B2

B1

100MHz

100MHz

16

16

16

16

0.1uFC72

C710.1uF

0.1uFC81

0.1uFC76

49.9E_1%R82

49.9E_1%

R89

49.9E_1%

R102

R9549.9E_1%

33E_1%R90

R8333E_1%

33E_1%R103

R9633E_1%

PCIE_CLK1_MGT_P

PCIE_CLK1_MGT_N

PCIE_CLK0_MGT0_P

PCIE_CLK0_MGT0_N22

Page 34: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

17

17

17

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

15

15

12

25

25

+3.3V

+3.3V

+12V

+VADJ_FMC_PL

FMC_PL_DP[0]_M2C_P

FMC_PL_DP[1]_M2C_P

FMC_PL_DP[2]_M2C_P

FMC_PL_DP[3]_M2C_P

FMC_PL_DP[4]_M2C_P

FMC_PL_DP[5]_M2C_P

FMC_PL_DP[6]_M2C_P

FMC_PL_DP[7]_M2C_P

FMC_PL_DP[2]_M2C_N

FMC_PL_DP[3]_M2C_N

FMC_PL_DP[4]_M2C_N

FMC_PL_DP[5]_M2C_N

FMC_PL_DP[6]_M2C_N

FMC_PL_DP[7]_M2C_N

FMC_PL_DP[0]_C2M_P

FMC_PL_DP[1]_C2M_P

FMC_PL_DP[4]_C2M_P

FMC_PL_DP[5]_C2M_P

FMC_PL_DP[6]_C2M_P

FMC_PL_DP[7]_C2M_P

FMC_PL_DP[0]_C2M_N

FMC_PL_DP[1]_C2M_N

FMC_PL_DP[2]_C2M_N

FMC_PL_DP[3]_C2M_N

FMC_PL_DP[6]_C2M_N

FMC_PL_DP[7]_C2M_N

FMC_PL_DP[0]_M2C_N

FMC_PL_DP[1]_M2C_N

FMC_PL_DP[2]_C2M_P

FMC_PL_DP[3]_C2M_P

FMC_PL_DP[4]_C2M_N

FMC_PL_DP[5]_C2M_N

FMC_PL_GBTCLK[1]_M2C_P

FMC_PL_GBTCLK[1]_M2C_N

FMC_PL_PG_C2M

FMC_PL_GBTCLK[0]_M2C_P

FMC_PL_GBTCLK[0]_M2C_N

SCL_FMC

SDA_FMC

HTG-ZRF8

FMC+ PL sections A-E

1.0

34 of 48

A B

VCC

GND OE

SP

ST

12,35

+3.3V

FMC_PL_PRSNT_M2C_L

GND1_A

DP1_M2C_P

DP1_M2C_N

GND2_A

GND3_A

DP2_M2C_P

DP2_M2C_N

GND4_A

GND5_A

DP3_M2C_P

DP3_M2C_N

GND6_A

GND7_A

DP4_M2C_P

DP4_M2C_N

GND8_A

GND9_A

DP5_M2C_P

DP5_M2C_N

GND10_A

GND11_A

DP1_C2M_P

DP1_C2M_N

GND12_A

GND13_A

DP2_C2M_P

DP2_C2M_N

GND14_A

GND15_A

DP3_C2M_P

DP3_C2M_N

GND16_A

GND17_A

DP4_C2M_P

DP4_C2M_N

GND18_A

GND19_A

DP5_C2M_P

DP5_C2M_N

GND20_A

Gig

abit

Dat

a S

igna

ls

DP9_M2C_P

DP9_M2C_N

GND3_B

GND4_B

DP8_M2C_P

DP8_M2C_N

GND5_B

GND6_B

DP7_M2C_P

DP7_M2C_N

GND7_B

GND8_B

DP6_M2C_P

DP6_M2C_N

GND9_B

GND10_B

GBTCLK1_M2C_P

GBTCLK1_M2C_N

GND11_B

GND12_B

DP9_C2M_P

DP9_C2M_N

GND13_B

GND14_B

DP8_C2M_P

DP8_C2M_N

GND15_B

GND16_B

DP7_C2M_P

DP7_C2M_N

GND17_B

GND18_B

DP6_C2M_P

DP6_C2M_N

GND19_B

GND20_B

GND1_B

GND2_B

CLK_DIR

RES0

Gig

abit

Dat

a an

d C

lock

Sig

nals

GND1_C

DP0_C2M_P

DP0_C2M_N

GND2_C

GND3_C

DP0_M2C_P

DP0_M2C_N

GND4_C

GND5_C

LA06_P

LA06_N

GND6_C

GND7_C

LA10_P

LA10_N

GND8_C

GND9_C

LA14_P

LA14_N

GND10_C

GND11_C

LA18_P_CC

LA18_N_CC

GND12_C

GND13_C

LA27_P

LA27_N

GND14_C

GND15_C

SCL

SDA

GND16_C

GND17_C

GA0

12P0V_C1

GND18_C

GND19_C

GND20_C

12P0V_C2

3P3V_C1

PW

RI2

CU

ser

Dat

a an

d C

lock

Sig

nals

Gig

abit

Dat

a S

igna

ls

GBTCLK0_M2C_P

GBTCLK0_M2C_N

GND3_D

GND4_D

LA01_P_CC

LA01_N_CC

GND5_D

GND6_D

LA05_P

LA05_N

GND7_D

GND8_D

LA09_P

LA09_N

GND9_D

GND10_D

LA13_P

LA13_N

GND11_D

GND12_D

LA17_P_CC

LA17_N_CC

GND13_D

LA23_P

LA23_N

LA26_P

LA26_N

GND1_D

GND2_D

PG_C2M

TCK

TDI

TDO

3P3VAUX

TMS

TRST_L

GA1

3P3V_1D

3P3V_2D

3P3V_3D

PW

RJT

AG

Use

r D

ata

and

Clo

ck S

igna

lsG

igab

it C

lock

GND1_E

HA01_P_CC

HA01_N_CC

GND2_E

GND3_E

HA05_P

HA05_N

GND4_E

GND5_E

HA09_P

HA09_N

GND6_E

GND7_E

HA13_P

HA13_N

GND8_E

GND9_E

HA16_P

HA16_N

GND10_E

GND11_E

HA20_P

HA20_N

GND12_E

GND13_E

HB03_P

HB03_N

GND14_E

HB05_P

HB05_N

HB09_P

HB09_N

HB13_P

HB13_N

GND15_E

HB19_P

HB19_N

HB21_P

HB21_N

VADJ_E1

PW

RU

ser

Dat

a an

d C

lock

Sig

nals

15

FMC_PL_LA[9]_PFMC_PL_LA[10]_P

FMC_PL_LA[13]_P

FMC_PL_LA[14]_P

FMC_PL_LA[9]_NFMC_PL_LA[10]_N

FMC_PL_LA[13]_N

FMC_PL_LA[14]_N

FMC_PL_LA[17]_CC_P

FMC_PL_LA[18]_CC_P

FMC_PL_LA[17]_CC_N

FMC_PL_LA[18]_CC_N FMC_PL_LA[23]_P

FMC_PL_LA[26]_PFMC_PL_LA[27]_P

FMC_PL_LA[23]_N

FMC_PL_LA[26]_NFMC_PL_LA[27]_N

FMC_PL_LA[5]_P

FMC_PL_LA[6]_P

FMC_PL_LA[5]_N

FMC_PL_LA[6]_N

FMC_PL_LA[1]_CC_P

FMC_PL_LA[1]_CC_N

R430

0E

0E

R441

C367

0.1uF

TP3

NC7SZ66P5X

SC70

Single Switch

Fairchild

U43

43

5

21

J25

ASP-184329-01560 Pins, Pitch 1.27mm

Vita 57.4 Connector, Carrier Card

Samtec

A40

A39

A38

A37

A36

A35

A34

A33

A32

A31

A30

A29

A28

A27

A26

A25

A24

A23

A22

A21

A20

A19

A18

A17

A16

A15

A14

A13

A12

A11

A10

A9

A8

A7

A6

A5

A4

A3

A2

A1

J25

ASP-184329-01

Samtec

Vita 57.4 Connector, Carrier Card

560 Pins, Pitch 1.27mm

B40

B1

B3

B2

B39

B38

B37

B36

B35

B34

B33

B32

B31

B30

B29

B28

B27

B26

B25

B24

B23

B22

B21

B20

B19

B18

B17

B16

B15

B14

B13

B12

B11

B10

B9

B8

B7

B6

B5

B4

J25

ASP-184329-01

Samtec

Vita 57.4 Connector, Carrier Card

560 Pins, Pitch 1.27mm

C39

C37

C40

C38

C36

C35

C34

C33

C32

C31

C30

C29

C28

C27

C26

C25

C24

C23

C22

C21

C20

C19

C18

C17

C16

C15

C14

C13

C12

C11

C10

C9

C8

C7

C6

C5

C4

C3

C2

C1

J25

ASP-184329-01

Samtec

Vita 57.4 Connector, Carrier Card

560 Pins, Pitch 1.27mm

D40

D38

D36

D35

D34

D33

D32

D31

D30

D29

D1

D3

D2

D27

D26

D24

D23

D39

D21

D20

D37

D28

D18

D17

D25

D22

D15

D14

D19

D16

D12

D11

D13

D10

D9

D8

D7

D6

D5

D4

E38

E22

E21

E35

E32

E19

E18

E29

E26

E16

E15

E23

E20

E13

E12

E17

E14

E10

E9

E11

E8

E7

E6

E5

E4

E3

E2

E1

J25

ASP-184329-01

Samtec

Vita 57.4 Connector, Carrier Card

560 Pins, Pitch 1.27mm

E39

E37

E36

E34

E33

E40

E31

E30

E28

E27

E25

E24

TCK_FMC

TDO_FMC_PL

TMS_FMC

TDI_FMC_PL6

6

6

TDO_FMC_PLTDI_FMC_PL

6

4.7KNS

+3.3V

4.7KNS

+3.3V

R411

R451

Page 35: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

15

15

12,38

12,34

+3.3V+3.3V

FMC_PL_CLK[0]_M2C_N

FMC_PL_CLK[0]_M2C_P

+VADJ_FMC_PL

+VADJ_FMC_PL

+VADJ_FMC_PL

FMC_PL_PG_M2C

FMC_PL_PRSNT_M2C_L

+VREF_A_FMC_PL

HTG-ZRF8

FMC+ PL sections F-K

1.0

35 of 48

PG_M2C

GND1_F

GND2_F

HA00_P_CC

HA00_N_CC

GND3_F

GND4_F

HA04_P

HA04_N

GND5_F

GND6_F

HA08_P

HA08_N

GND7_F

GND8_F

HA12_P

HA12_N

GND9_F

GND10_F

HA15_P

HA15_N

GND11_F

GND12_F

HA19_P

HA19_N

GND13_F

HB02_P

HB02_N

HB04_P

HB04_N

HB08_P

HB08_N

GND14_F

HB12_P

HB12_N

HB16_P

HB16_N

VADJ_F1

HB20_P

HB20_N

Use

r D

ata

and

Clo

ck S

igna

lsP

WR

GND1_G

CLK1_M2C_P

CLK1_M2C_N

GND2_G

GND3_G

LA00_P_CC

LA00_N_CC

GND4_G

GND5_G

LA03_P

LA03_N

GND6_G

GND7_G

LA08_P

LA08_N

GND8_G

GND9_G

LA12_P

LA12_N

GND10_G

GND11_G

LA16_P

LA16_N

GND12_G

GND13_G

LA20_P

LA20_N

GND14_G

LA22_P

LA22_N

LA25_P

LA25_N

LA29_P

LA29_N

GND15_G

LA31_P

LA31_N

LA33_P

LA33_N

VADJ_G

Use

r D

ata

and

Clo

ck S

igna

lsD

iff. C

lock

PW

R

VREF_A_M2C

GND1_H

CLK0_M2C_P

CLK0_M2C_N

GND2_H

GND3_H

LA02_P

LA02_N

GND4_H

GND5_H

LA04_P

LA04_N

GND6_H

GND7_H

LA07_P

LA07_N

GND8_H

GND9_H

LA11_P

LA11_N

GND10_H

GND11_H

LA15_P

LA15_N

GND12_H

LA19_P

LA19_N

LA21_P

LA21_N

LA24_P

LA24_N

GND13_H

LA28_P

LA28_N

LA30_P

LA30_N

VADJ_H1

LA32_P

LA32_N

PRSNT_M2C_L

PW

RD

iff. C

lock

Use

r D

ata

and

Clo

ck S

igna

ls

GND1_J

CLK3_BIDIR_P

CLK3_BIDIR_N

GND2_J

GND3_J

HA03_P

HA03_N

GND4_J

GND5_J

HA07_P

HA07_N

GND6_J

GND7_J

HA11_P

HA11_N

GND8_J

GND9_J

HA14_P

HA14_N

GND10_J

GND11_J

HA18_P

HA18_N

GND12_J

GND13_J

HA22_P

HA22_N

GND14_J

HB01_P

HB01_N

HB07_P

HB07_N

HB11_P

HB11_N

GND15_J

HB15_P

HB15_N

HB18_P

HB18_N

VIO_B_M2C_J1

Use

r D

ata

and

Clo

ck S

igna

lsD

iff. C

lock

PW

R

VREF_B_M2C

GND1_K

GND2_K

CLK2_BIDIR_P

CLK2_BIDIR_N

GND3_K

GND4_K

HA02_P

HA02_N

GND5_K

GND6_K

HA06_P

HA06_N

GND7_K

GND8_K

HA10_P

HA10_N

GND9_K

GND10_K

HA17_P_CC

HA17_N_CC

GND11_K

GND12_K

HA21_P

HA21_N

GND13_K

HA23_P

HA23_N

HB00_P_CC

HB00_N_CC

HB06_P_CC

HB06_N_CC

GND14_K

HB10_P

HB10_N

HB14_P

HB14_N

VIO_B_M2C_K1

HB17_P_CC

HB17_N_CC

Use

r D

ata

and

Clo

ck S

igna

lsP

WR

Diff

. Clo

ck

15

FMC_PL_LA[0]_CC_P

FMC_PL_LA[0]_CC_N FMC_PL_LA[2]_P

FMC_PL_LA[3]_P

FMC_PL_LA[4]_P

FMC_PL_LA[7]_P

FMC_PL_LA[8]_P

FMC_PL_LA[11]_P

FMC_PL_LA[12]_P

FMC_PL_LA[15]_P

FMC_PL_LA[16]_P

FMC_PL_LA[2]_N

FMC_PL_LA[3]_N

FMC_PL_LA[4]_N

FMC_PL_LA[7]_N

FMC_PL_LA[8]_N

FMC_PL_LA[11]_N

FMC_PL_LA[12]_N

FMC_PL_LA[15]_N

FMC_PL_LA[16]_N

FMC_PL_LA[19]_P

FMC_PL_LA[20]_P

FMC_PL_LA[21]_P

FMC_PL_LA[22]_P

FMC_PL_LA[24]_P

FMC_PL_LA[25]_P

FMC_PL_LA[28]_P

FMC_PL_LA[29]_P

FMC_PL_LA[30]_P

FMC_PL_LA[31]_P

FMC_PL_LA[32]_P

FMC_PL_LA[33]_P

FMC_PL_LA[19]_N

FMC_PL_LA[20]_N

FMC_PL_LA[21]_N

FMC_PL_LA[22]_N

FMC_PL_LA[24]_N

FMC_PL_LA[25]_N

FMC_PL_LA[28]_N

FMC_PL_LA[29]_N

FMC_PL_LA[30]_N

FMC_PL_LA[31]_N

FMC_PL_LA[32]_N

FMC_PL_LA[33]_N

J25

ASP-184329-01

Samtec

Vita 57.4 Connector, Carrier Card

560 Pins, Pitch 1.27mm

F38

F37

F40

F35

F34

F32

F31

F39

F29

F28

F26

F25

F23

F22

F36

F20

F19

F33

F30

F17

F16

F27

F24

F14

F13

F21

F18

F11

F10

F15

F12

F8

F7

F9

F6

F5

F4

F3

F2

F1

J25

ASP-184329-01

Samtec

Vita 57.4 Connector, Carrier Card

560 Pins, Pitch 1.27mm

G39

G37

G36

G34

G33

G40

G31

G30

G28

G27

G25

G24

G38

G22

G21

G35

G32

G19

G18

G29

G26

G16

G15

G23

G20

G13

G12

G17

G14

G10

G9

G11

G8

G7

G6

G5

G4

G3

G2

G1

J25

ASP-184329-01

Samtec

Vita 57.4 Connector, Carrier Card

560 Pins, Pitch 1.27mm

H2

H38

H37

H40

H35

H34

H32

H31

H39

H29

H28

H26

H25

H23

H22

H36

H20

H19

H33

H30

H17

H16

H27

H24

H14

H13

H21

H18

H11

H10

H15

H12

H8

H7

H9

H6

H5

H4

H3

H1

Samtec

Vita 57.4 Connector, Carrier Card

560 Pins, Pitch 1.27mm

J39

J37

J36

J34

J33

J40

J31

J30

J28

J27

J25

J24

J38

J22

J21

J35

J32

J19

J18

J29

J26

J16

J15

J23

J20

J13

J12

J17

J14

J10

J9

J11

J8

J7

J6

J5

J4

J3

J2

J1

J25

ASP-184329-01

J25

ASP-184329-01

Samtec

Vita 57.4 Connector, Carrier Card

560 Pins, Pitch 1.27mm

K38

K37

K40

K35

K34

K32

K31

K39

K29

K28

K26

K25

K23

K22

K36

K20

K19

K33

K30

K17

K16

K27

K24

K14

K13

K21

K18

K11

K10

K15

K12

K8

K7

K9

K6

K5

K4

K3

K2

K1

R314

10K

R421

10K

Page 36: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

INFMC+ PL sections L, M, Y, Z

36 of 48

HTG-ZRF8

1.0

+12V

FMC_PL_REFCLK_C2M_P

FMC_PL_REFCLK_C2M_N22

22

12P0V_L1

USER_DEF0_N

USER_DEF0_P

SYNC_M2C_N

SYNC_M2C_P

REFCLK_M2C_N

REFCLK_M2C_P

RES1

GND1_L

GND2_L

GBTCLK4_M2C_P

GBTCLK4_M2C_N

GND3_L

GND4_L

GBTCLK3_M2C_P

GBTCLK3_M2C_N

GND5_L

GND6_L

GBTCLK2_M2C_P

GBTCLK2_M2C_N

GND7_L

GND8_L

SYNC_C2M_P

SYNC_C2M_N

GND9_L

GND10_L

REFCLK_C2M_P

REFCLK_C2M_N

GND11_L

GND12_L

GND13_L

GND14_L

GND15_L

GND16_L

GND17_L

GND18_L

12P0V_L2

GND19_L

GND20_L

12P0V_L3

PW

RC

lock

Gig

abit

Clo

ck

GND1_M

DP23_M2C_P

DP23_M2C_N

GND2_M

GND3_M

DP22_M2C_P

DP22_M2C_N

GND4_M

GND5_M

DP21_M2C_P

DP21_M2C_N

GND6_M

GND7_M

DP20_M2C_P

DP20_M2C_N

GND8_M

GND9_M

DP14_C2N_P

DP14_C2M_N

GND10_M

GND11_M

DP15_C2M_P

DP15_C2M_N

GND12_M

GND13_M

DP16_C2M_P

DP16_C2M_N

GND14_M

GND15_M

DP17_C2M_P

DP17_C2M_N

GND16_M

GND17_M

DP18_C2M_P

DP18_C2M_N

GND18_M

GND19_M

DP19_C2M_P

DP19_C2M_N

GND20_MG

igab

it D

ata

Sig

nals

GND1_Y

DP23_C2M_P

DP23_C2M_N

GND2_Y

GND3_Y

DP21_C2M_P

DP21_C2M_N

GND4_Y

GND5_Y

DP10_M2C_P

DP10_M2C_N

GND6_Y

GND7_Y

DP12_M2C_P

DP12_M2C_N

GND8_Y

GND9_Y

DP14_M2C_P

DP14_M2C_N

GND10_Y

GND11_Y

DP15_M2C_P

DP15_M2C_N

GND12_Y

GND13_Y

DP11_C2M_P

DP11_C2M_N

GND14_Y

GND15_Y

DP13_C2M_P

DP13_C2M_N

GND16_Y

GND17_Y

DP17_M2C_P

DP17_M2C_N

GND18_Y

GND19_Y

DP19_M2C_P

DP19_M2C_N

GND20_Y

Gig

abit

Dat

a S

igna

ls

HSPC_PRSNT_M2C_L

GND1_Z

GND2_Z

DP22_C2M_P

DP22_C2M_N

GND3_Z

GND4_Z

DP20_C2M_P

DP20_C2M_N

GND5_Z

GND6_Z

DP11_M2C_P

DP11_M2C_N

GND7_Z

GND8_Z

DP13_M2C_P

DP13_M2C_N

GND9_Z

GND10_Z

GBTCLK5_M2C_P

GBTCLK5_M2C_N

GND11_Z

GND12_Z

DP10_C2M_P

DP10_C2M_N

GND13_Z

GND14_Z

DP12_C2M_P

DP12_C2M_N

GND15_Z

GND16_Z

DP16_M2C_P

DP16_M2C_N

GND17_Z

GND18_Z

DP18_M2C_P

DP18_M2C_N

GND19_Z

GND20_Z

3P3V_1Z

Gig

abit

Dat

a S

igna

lsG

igab

it C

lock

Gig

abit

Dat

a S

igna

ls

+3.3V

FMC_PL_REFCLK_M2C_P

FMC_PL_REFCLK_M2C_N

FMC_PL_SYNC_M2C_P

FMC_PL_SYNC_M2C_N

FMC_PL_SYNC_C2M_P

FMC_PL_SYNC_C2M_N15

15

15

15

15

15

+3.3VHSPC_PL_PRSNT_M2C_L12

560 Pins, Pitch 1.27mm

Vita 57.4 Connector, Carrier Card

Samtec

ASP-184329-01

J25

L40

L39

L38

L37

L35

L34

L31

L30

L27

L26

L23

L22

L21

L20

L19

L18

L17

L16

L15

L14

L13

L12

L11

L10

L9

L8

L7

L6

L5

L4

L3

L2

L1

L24

L25

L28

L29

L32

L33

L36

560 Pins, Pitch 1.27mm

Vita 57.4 Connector, Carrier Card

Samtec

ASP-184329-01

J25

M40

M39

M38

M37

M36

M35

M34

M33

M32

M31

M30

M29

M28

M27

M26

M25

M24

M23

M22

M21

M20

M19

M18

M17

M16

M15

M14

M13

M12

M11

M10

M9

M8

M7

M6

M5

M4

M3

M2

M1

560 Pins, Pitch 1.27mm

Vita 57.4 Connector, Carrier Card

Samtec

ASP-184329-01

J25

Y40

Y39

Y38

Y37

Y36

Y35

Y34

Y33

Y32

Y31

Y30

Y29

Y28

Y27

Y26

Y25

Y24

Y23

Y22

Y21

Y20

Y19

Y18

Y17

Y16

Y15

Y14

Y13

Y12

Y11

Y10

Y9

Y8

Y7

Y6

Y5

Y4

Y3

Y2

Y1

560 Pins, Pitch 1.27mm

Vita 57.4 Connector, Carrier Card

Samtec

ASP-184329-01

J25

Z40

Z39

Z38

Z37

Z36

Z35

Z34

Z33

Z32

Z31

Z30

Z29

Z28

Z27

Z26

Z25

Z24

Z23

Z22

Z21

Z20

Z19

Z18

Z17

Z16

Z15

Z14

Z13

Z12

Z11

Z10

Z9

Z8

Z7

Z6

Z5

Z4

Z3

Z2

Z1

4.7K

R315

TP2

Page 37: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

MCX-P-P-H-RA-TH1

TH

MCX PCB Jack, 50E

1/2W1210

49.9E_1%

0.01uF

0.01uF

0402

10.0K_1%0603

060310.0K_1%

060310.0K_1%

0.1uF

IN-

OUT

G

V

IN+

LMV7235M5

SOT-23-5

Comparator, 45nsec

National Semiconductor

3

5

2

1

4

VIN CS_N

GND

SDOVDD

SCLK

AD

C

ADS7885SDBV

SOT-23

ADC, 8Bit, 3MSPS

TI

4

1 5

2

63

100K

1K

10.0K_1%0603

060310.0K_1%

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

1.0

A Y

GNDVCC

SN74AUP1G17DCKRDCK-5

Schmitt-Trigger Buffer

5 3

42

0.1uF

220E@100MHz, 2A

060310uFx6.3V 10uFx6.3V

0603

+3.3VA

+3.3V

IRIG

IRIG_COMP_OUT

IRIG_ADC_SCLK

IRIG_ADC_SDO

IRIG_ADC_CS_N

IRIG_TRIG_OUT

+3.3VA

+3.3VA

+3.3VA

1PPS (GPS sync.)

37 of 48

HTG-ZRF8

With FPGA IP core IRIG-A, IRIG-B and IRIG-G are supported.

+3.3V from DC/DC

12

12

12

12

12

J21

R517

C602

C624

R507

R506

R497

C535

U57

U61

R492

R100

R479

R480

U59

C588

FB17

C67 C522

0.1uF

C625

BAT54SWT1GSOT-23

Schottky DiodesD51

3

21

100E_1%0402

R518

Page 38: FINAL VERSION REV. 1 - Xilinx...IVI SIZE REV SCALE FSCM NO. DWG. NO. SHEET CONTRACT NO. APPROVALS DATE DRAWN CHECKED ISSUED 4 3 2 1 4 3 2 1 A C D D C B A SH. REV DWG. NO. C 1.0 IN

IVI

REVSIZE

SCALE

FSCM NO. DWG. NO.

SHEET

CONTRACT NO.

APPROVALS DATE

DRAWN

CHECKED

ISSUED

1234

4 3 2 1

A

C

DD

C

B

A

SH

.R

EV

DW

G. N

O.

C

IN

1.0

220E@100MHz, 2A

FB29

C698

0.01uF

GND_PCIE_BRACKET

38 of 48

HTG-ZRF8

PWR IN, User APP

P32

P1

ON

12

12

13

13

13

13

8

8

8

9

8

12

12

12

PL_USER_PB

+3.3V

User Applications

+1.2V

PL_USER_SW1

PL_USER_SW2

PL_USER_SW3

PL_USER_SW4

MIO23_USER_PB

+PS_500

PWR FMC

R570

330E

330E

R544

4.7K

R46

PB3

7914G-1-000ESMD Pushbutton

Bourns

1B2B

2A 1A

LED Green

D10

D8LED Red

S1

FHDS-8Pitch 1.27mm, SMD

DIP SWITCH FHDS-8

9

10

11

12

13

14

15

16

8

7

6

5

4

3

2

1

R12

64.

7K

4.7K

R12

7

4.7K

R12

4

R12

54.

7K

R12

24.

7K

R12

34.

7K

R11

64.

7K

R12

14.

7K

4.7K

R78

Bourns

SMD Pushbutton

PB4

7914G-1-000E

1B2B

2A 1A

R555

330E

D9LED Green

330E

R573

LED Red

D7

PL_USER_LED3_R

PL_USER_LED4_R

PL_USER_LED2_G

PL_USER_LED1_G

MIO21_USER_LED3_R

MIO22_USER_LED4_R

MIO20_USER_LED2_G

MIO13_USER_LED1_G

NDS331N

SOT-23 2

3

1

NDS331N

SOT-23 2

3

1

SOT-23

NDS331N2

3

1

NDS331N

SOT-23 2

3

1

330E LED Green

330E LED Green

330E LED Red

330E LED Red

+3.3V

+3.3V

+3.3V

+3.3V

8

8

8

8

MIO6_USER_SW1

MIO24_USER_SW2

MIO25_USER_SW3

MIO43_USER_SW4

+PS_501

+PS_500

NDS331N

SOT-23 2

3

1

330E LED Green

12,35

+3.3V

FMC_PL_PG_M2C

22-11-2022FAN CONNECTOR

Molex

1+12V

FAN Header

1N41

48W

S-7

1

3

2SOT-23

NDS331N

14

+1.8V

4.7K

FAN_PWM

Q25

Q24

Q26

Q27

R577 D6

R578 D5

R580 D4

R582 D3

Q16

R290 D27

J26

D55

Q20

R372

Input Power SupplyR291

1K

68uFx25V

TANTAL-E

C226

D32

LED Green

Schottky Diode, 8A, 40V

+12V+12V1

+12V3

COM1

COM2

+12V2

COM3

PCIe 75W PWR Connector6 Pins, Pitch 4.2mm45732-0001-PCIe

J29

Molex

6

2

5

4

3

1

D50