Failure Analysis and Principles Involved

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Failure Analysis and Principles Involved

Semiconductor Failure Analysis

Semiconductor Failure analysis (FA) is the process of determining how or why a semiconductor devicehas failed, often performed as a series of steps known as FA techniques. Device failure is defined asany non-conformance of the device to its electrical and/or visual/mechanical specifications. Failureanalysis is necessary in order to understand what caused the failure and how it can be prevented in thefuture.

Electrical failure can either be functional or parametric. Functional failure refers to the inability of adevice to perform its intended function. Parametric failure refers to the inability of a device to meet theelectrical specifications for a measurable characteristic (such as leakage current) that does not directlypertain to functionality. Thus, a parametric failure may be present even if the device is still functional orable to perform its intended function.

For example, a DAC that can convert digital data into the correct analog voltage but draws excessivesupply current is a parametric failure, but one that does not convert data at all is a functional failure. A

device is said to be failing catastrophically if it is grossly failing all parametric and functional test blocks.

Failure analysis starts with failure verification. It is important to validate the failure of a sample prior tofailure analysis in order to conserve valuable FA resources. Failure verification is also done tocharacterize the failure mode. Good characterization of the failure mode is necessary to make the FAefficient and accurate.

After failure verification, the analyst subjects the sample to various FA techniques step by step, collectingattributes and other observations along the way. Non-destructive FA techniques are done beforedestructive ones. Also, the results of these various FA techniques must be consistent or corroborative.Any inconsistency in results must be resolved before proceeding to the next step. For example, a pinthat exhibits a broken wire during X-ray inspection but also shows an acceptable curve trace during curvetracing can not happen, so this inconsistency must be resolved by verifying which of the two results is

correct.In general, the results of the various FA techniques would collectively point to the real failure site. The FAprocess is finished once there are enough information to make a conclusion about the location of thefailure site and cause or mechanism of failure. Click here to see the variousFA Techniques.

FA Terminology

Failure Mode- a description of how a device is failing, usually in terms of how much it is deviating fromthe specification that it is failing, e.g., excessive supply current, excessive offset voltage, excessive biascurrent

Failure Mechanism- the physical phenomenon behind the failure of a device, e.g., metal corrosion,electrostatic discharge, electrical overstress

Root Cause- the first event or condition that triggered, whether directly or indirectly, the occurrence ofthe failure, e.g., improper equipment grounding that resulted in ESD damage, a system problem thatcaused the usage of an incorrect mask set

The objective of a failure analyst when conducting FA is to determine the failure mechanism that led tothe failure mode of the device. Once the failure mechanism has been determined, the process owner orexpert can work with the failure analyst to determine the root cause of the problem. The process owner
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must always address the root cause of the failure mechanism, not just the intermediate failure causesthat occurred after the root cause has already happened.

Failure Analysis (FA) Techniques

Failure Analysis Techniques, or simply FA Techniques, are the individual analytical steps performed tocomplete the failure analysis process. Each FA technique in the FA process is designed to provide itsown, specialized information that will contribute to the determination of the failure mechanism of thesample. Although FA techniques are generally independent of each other, their results must nonethelessbe consistent and corroborative in order to arrive at a strong conclusion for the FA cycle.

During the FA process, all applicable non-destructive FA techniques must be performed prior to theconduct of any destructive FA technique. An FA technique that alters a sample permanently in whateverway (whether visual, mechanical, chemical, or electrical) is considered destructive. On the otherhand, non-destructive techniques are those which do not cause any permanent change in the sample,ideally speaking. Table 1 shows links to FA techniques commonly used in the semiconductor industry.

Table 1. Semiconductor FA TechniquesNon-destruc tive Techniqu es

Technique Application

Failure Verification validation of reported failure

Optical Microscopy external or internal visual inspection

X-ray Radiography internal x-ray imaging

Curve Tracing current-voltage characterization

Hermeticity Testing check for hermetic sealing

SAM detection of delaminations

Destructiv e Techniqu es

Technique Application

Decapsulation opening of the IC package

Sectioning cross-sectioning of the sample

Hot Spot Detection detection of heat-generating defects

LEM detection of light-emitting defects

Microprobing direct electrical analysis of the die circuit

SEM/TEM high magnification real-time imaging

EDX/WDX elemental analysis

Focused Ion Beam high resolution die sectioning/imaging

FTIR Spectroscopy chemical analysis

Auger Analysis surface analysis

SIMS

compositional analysisLIMS compositional analysis

ESCA or XPS surface analysis

AFM/STM high-resolution probe imaging

EBIC induced current imaging of defects

OBIC induced current imaging of defects

Chromatography chemical analysis

RGA residual gas/moisture analysis
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Note that some non-destructive techniques can become destructive if improperly performed on thesample. Examples of these are curve tracing and bench testing, which can lead to electricaloverstressing of the sample if improperly undertaken.

Basic Failure Analysis (FA) Flows

Every experienced failure analyst knows that every FA is unique. Nobody can truly say that he or shehas developed a standard failure analysis flow for every FA request that will come his or her way. FA'shave a tendency of directing themselves, with each subsequent step depending on the outcome of theprevious step.

The flow of failure analysis is influenced by a multitude of factors: the device itself, the application inwhich it failed, the stresses that the device has undergone prior to failure, the point of failure, the failurerate, the failure mode, the failure attributes, and of course, the failure mechanism. Nonetheless, FA isFA, so it is indeed possible to define to a certain degree a 'standard' FA flow for every failuremechanism.

This article aims to give the reader a basic idea of how the FA flow for a given failure mechanism may bestandardized. 'Standardization' in this context does not mean defining a step-by-step FA procedure tofollow, but rather what to look for when analyzing failures depending on what the observed or suspectedfailure mechanism is.

Basic Die-level FA Flow

1) Failure Information Review. Understand thoroughly the customer's description of the failure.Determine: a) the specific electrical failure mode that the customer is experiencing; b) the point of failureor where the failure was encountered (field or manufacturing line and at which step?); c) what conditionsthe samples have already gone through or been subjected to; and d) the failure rate observed by thecustomer.

2) Failure Verification. Verify the customer's failure mode by electrical testing. Check the datalog results

for consistency with what the customer is reporting.

3) External Visual Inspection. Perform a thorough external visual inspection on the sample. Note allmarkings on the package and look for external anomalies, i.e., missing/bent leads, packagediscolorations, package cracks/chip-outs/scratches, contamination, lead oxidation/corrosion, illegiblemarks, non-standard fonts, etc.

4) Bench Testing. Verify the electrical test results by bench testing to ensure that all ATE failures are notdue to contact issues only. The ideal case is for the customer's reported failure mode, ATE results, andbench test results to be consistent with each other.

5) Curve Tracing. Perform curve tracing to identify which pins exhibit current/voltage (I/V) anomalies.The objective of curve tracing is to look for open or shorted pins and pins with abnormal I/V

characteristics (excessive leakage, abnormal breakdown voltages, etc.). FA may then be focused oncircuits involving these anomalous pins. Dynamic curve tracing, wherein the unit is powered up whileundergoing curve tracing, may be performed if static curve tracing does not reveal any anomalies.

6)X-ray Inspection. Perform x-ray inspection to look for internal package anomalies such as brokenwires, missing wires, incorrect or missing die, excessive die attach voids, etc, without having to open thepackage. Xray inspection results must be consistent with curve trace results, e.g., if x-ray inspectionrevealed a broken wire at a pin, then curve tracing should reveal that pin to be open.


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7) CSAM. Perform CSAM on plastic packages to determine if the samples have any internaldelaminations that may lead to other failure attributes such as corrosion, broken wires, and lifted bonds.

8) Decapsulation. Once all the non-destructive steps such as those above have been completed, thesamples may be subjected to decapsulation to expose the die and other internal features of the devicefor further FA.

9) Internal Visual Inspection. Perform internal visual inspection after decap. This is usually done using alow-power microscope and a high-power microscope, proceeding from low magnification to higher ones.Look for wire/bond anomalies, die cracks, wire and die corrosion, die scratches, EOS/ESD sites, fabdefects, and the like. SEM inspection may be needed in some instances.

10) Hot Spot Detection. If curve trace results indicate some major discrepancies between the I/Vcharacteristics (especially with regard to power dissipation) of the samples and known good units, thenthe samples may have localized heating on the die. For example, an abnormally large current flowingbetween an input pin and GND may mean a short circuit from this input pin to GND. Shorts such as thiswill emit heat that can be located by hot spot detection techniques.

11) Light Emission Microscopy. If the device does not exhibit abnormalities in power dissipation thatmay indicate hot spots, light emission microscopy may be performed to look for defects that emit

light. Note that an emission site does not mean that it is the failure site.

12) Microprobing. Microprobing becomes necessary if no hot spots nor abnormal photoemissions wereseen from the samples. Microprobing may entail extensive circuit analysis wherein the failure site ispinpointed by analyzing the die circuit stage by stage or section by section. The thought process usedwhen troubleshooting a full-size circuit also applies to die circuit troubleshooting.

13) Die Deprocessing. Perform die deprocessing to look for subsurface damage or defects if the aboveFA steps were not successful in locating the failure site.

Basic Ball Lifting FA Flow

1)Failure Information Review.Check the customer's description of the failure for telltale signs of balllifting, i.e., a) functional or catastrophic failures that may indicate an open bond; b) pins that becomeintermittently open when pressure is applied to the package or if the device is subjected to elevated orextremely low temperature; or c) high-resistance or permanently open pins.

2)Device/Lot History Review.Check the FA history of the device to determine if it has exhibited balllifting returns previously. Check the assembly and test history of the lot to determine if the lot hasexhibited any yield or process issues potentially related to ball lifting. Sad to say, most ball lifting issueshave assignable causes and are non-random in nature, so containment or bounding of the problem mustbe meticulously pursued.

3) Failure Verification. Verify the customer's failure mode by electrical testing. If ball lifting is suspectedbut the unit is passing e-test, test the unit several times because the unit may have intermittently good

bonds that allow it to pass. E-test must also be performed at elevated temperature if possible.4) External Visual Inspection. Perform a thorough external visual inspection on the sample. Note allpackage anomalies that may indicate the unit having been subjected to thermo-mechanical stresses.

5) Bench Testing. Verify the electrical test results by bench testing at the temperature where the failurewas seen. If e-test at high temperature did not verify the failure reported by the customer, perform thebench test at elevated temperature as well.


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6) Curve Tracing. Perform curve tracing at ambient, elevated (125C-150C) and low temperature (-10Cto -40C). This is the turning point of any ball lifting FA, because a lifted ball bond should be seen as anopen pin at elevated, if not at ambient, temperature. Some lifted balls manifest at low temperature,although not as frequently. Note that the sample is unlikely to be a ball lifting failure if none of its pins isopen, whether permanently or intermittently.

7)X-ray Inspection. Perform x-ray inspection as part of the FA routine. Don't expect to find any liftedballs in the xray image if no open pins were seen during curve tracing. On the other hand, if you see alifted ball during xray inspection, then consider this as a gross case of ball lifting and ask yourself howthis could have passed electrical testing.

8) CSAM. Perform CSAM on plastic packages to determine if the samples have any internaldelaminations that may lead to ball lifting. Delaminations play an important part in aggravating, if notdirectly causing, lifted ball bonds. Movement of the plastic compound parallel to or away from the diesurface as a result of delamination can shear ball bonds off their bond pads.

9)Decapsulation/Internal Visual Inspection. Perform internal visual inspection after decap. SEMinspection is most useful in verifying lifted ball bonds, since some lifted balls may not be visible opticallydue to the poor depth of field of optical microscopes. Once a lifted ball is found, perform further visualinspection on the affected bond pad, looking for signs of contaminants, deep probe marks/exposed

oxide, cratering, metal lifting, corrosion, and other attributes that may lead to ball lifting.

10)Microprobing(optional). Some ball bonds will not appear to be 'lifted' visually, even under SEMinspection. In such cases, it is necessary to confirm that the ball bond has no electrical contact with thebond pad by microprobing. Of course, this works best if you've already identified which pin is anomalousduring curve tracing.

11)Aspect Ratio Quantification. Use your SEM to estimate the aspect ratio of your ball bond. Ball bondaspect ratio is defined as the ratio of the ball diameter to the ball height, so flatter bonds will exhibithigher aspect ratios. Well-formed ball bonds would exhibit aspect ratios between 3 to 5. Balls areconsidered underbonded (AR5.5) if way outside this range. Poorly formedbonds mean a processing problem at wirebond that can lead to ball lifting.

12) IMC Quantification. Use your optical microscope to quantify the intermetallic coverage (IMC) of theball bond. This is done by getting the percentage of the intermetallic formation on the ball bond surface.An IMC of at less than 50% (i.e., less than 50% of the bonded surface has intermetallics) indicateinsufficient intermetallic formation. Try to correlate the amount and geometry of the IMC with whatevervisual attributes are observed on the bond pad. Remember that poor IMC formation is most often due tobond pad anomalies that impede bonding.

13) EDX Analysis. Perform EDX analysis on the bond pads and ball bond surface to look forcontaminants that may have impeded intermetallic formation. Note that silicon over the bond pad(unetched glass or Si saw dust) is a very common cause of ball lifting, so don't immediately presume thatthe silicon peak came from the wafer/substrate. Silicon is on top of the bond pad if its peak increasesrelative to that of aluminum when the SEM EHT is lowered.

14) Wire Pull Test/Ball Shear Test. If only one or two bonds have lifted, it may be useful to check thestrengths of the other bonds of the sample(s). This will indicate whether the bonding problem is localizedto a particular area of the die or it affects all the bonds. This is highly destructive, and must only be doneas one of the last steps (if not the last one) of the analysis.

15) Conclusion. As may be discerned from above, the basic flow of a ball lifting FA consists of thefollowing: a) looking for intermittent or open pins prior decap; b) visually and electrically confirming theball lifting after decap; c) assessment of the IMC; d) identification of the physical and chemicalabnormalities on the bond pad and the ball itself that correlate with the IMC observed; and e)subsequent investigations/simulations/evaluations to identify the root cause of these anomalies.


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Basic Die Cracking FA Flow

1)Failure Information/Device and Lot History Review.Understand the customer's description of thefailure, i.e., the failure mode, where it was encountered, what conditions the sample was subjected to,etc. Check the FA history of the device to determine if it has exhibited die cracking returns before.Check the assembly and test history of the lot to determine if the lot has exhibited any yield or process

issues potentially related to die cracking.

2) Failure Verification. Verify the customer's failure mode by electrical testing.

3) External Visual Inspection. Perform a thorough external visual inspection on the sample. Note allpackage anomalies that may indicate the unit having been subjected to thermo-mechanical stresses,i.e., package cracks/chip-outs, tool marks, bent leads, discolored/burned package, etc.

4) Bench Testing. Verify the electrical test results by bench testing.

5) Curve Tracing. Perform curve tracing at ambient, elevated (125C-150C) and low temperature (-10Cto -40C). Look for open or shorted pins which may indicate gross die cracking. Note, however, thatsome die crack failures may only exhibit subtle I/V curve anomalies.

7)X-ray Inspection. Perform x-ray inspection on the sample. Check for die attach problems such asexcessive voids, die overhang, insufficient die attach coverage, and insufficient fillet. Check also formolding compound voids and cracks. Gross die cracks may also be found using sophisticated x-rayequipment.

8) CSAM. Perform CSAM on plastic packages to determine if the samples have any internaldelaminations that are indicative of the unit having been subjected to extremely high temperatures. Unitswith severe die attach abnormalities will exhibit die cracking upon exposure to temperature extremes.

9) Decapsulation/Internal Visual Inspection. Perform internal visual inspection after decap to confirm thedie crack. The crack pattern on the die surface as well as the die edge must be fully understood throughextensive optical and SEM inspection.

10)Full Decapsulation. Many die cracking issues involve die cracks that originate from the backside ofthe die. If SEM inspection of the die surface and die edge indicates that the cracks most likely originatedfrom the die backside, then full decapsulation must be done. Full decapsulation consists of immersingthe entire unit in acid to disintegrate the entire package, leaving behind the die only. The die backsidecrack pattern may then be inspected freely once full decap is completed.

11)Fractography. Fractography is the systematic and scientific process of determining the originationand propagation of the cracking mechanism by studying the attributes of the fracture surface of thedie. Fractography is a complicated process and can only be done reliably through years of study andexperience. Once mastered, fractography would be an indispensable tool for analyzing die crackissues.

Note that Steps 9, 10, and 11 all have one objective: to understand the crack origin and propagation

pattern to determine what stresses were applied to the die.

12) Conclusion. As may be discerned from above, the basic flow of a die cracking FA consists of thefollowing: a) taking note of all electrical and visual/mechanical attributes of the sample before decap; b)confirmation of the die crack after decap; c) determination of the point of origin and propagation patternof the die crack; d) determination of the points of application and direction of the stresses most likelyexperienced by the die based on the crack origin and propagation; and e) subsequent investigations,simulations, or evaluations to identify the root cause of the stresses.


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Basic Package Cracking FA Flow

1)Failure Information/Device and Lot History Review.Understand the customer's description of thepackage crack failure. Check the FA history of the device to determine if it has exhibited packagecracking occurrences before, whether in the field or in the manufacturing line. Check the assembly andtest history of the lot to determine if the lot has exhibited any yield or process issues potentially related to

package cracking.

2) Failure Verification. Perform external visual inspection on the sample to confirm the package cracksreported by the customer. Note the similarities and differences between the customer's description ofthe package crack and the actual package crack.

3)External Visual Inspection. Perform a more thorough external visual inspection on the sample tocompletely characterize the package crack. Check how many distinct crack lines there are, where theyoriginate and where they end, and how they propagated from these end points. Note also all otherpackage anomalies that may indicate the unit having been subjected to thermo-mechanical stresses,i.e., package chip-outs, tool marks, bent/non-coplanar leads, discolored/burned package, etc.

4) Look for Origin/Propagation Patterns. Check how many distinct crack lines there are, where theyoriginate and where they end, and how they propagated from these end points. If there are several units

affected, check for specific patterns with regard to how the cracks are localized. Are they on one side ofthe package only? Do they affect certain pins only? Do they always occur at certain features of thepackage only, e.g., at the top-bottom package interface, at the tie bar, at the leads, etc.?

5) CSAM. Perform CSAM on the samples to check for any internal delaminations that are indicative ofthe unit having been subjected to extremely high temperatures. Check also for localized delaminationsthat correlate with the locations of the package cracks.

6) Stress Analysis. Analyze the package crack characteristics and internal delaminations to formulateyour best hypothesis (or hypotheses) on how the unit was stressed. A good guideline to follow for this isthat fractures always occur under tensile stresses. List down as many possible scenarios or conditionsthat can result in these cracks. Pay particular attention to the possibility that these have been caused inthe manufacturing line. Be sure to enlist the help of the Back-end Assembly experts in generating the

list of hypotheses.

7) Simulations. Perform simulations on good units to verify each of your hypothetical root causes. Forexample, if you think that debris under the package during DTF caused the problem, then perform DTFon units with debris underneath them. You know you've pinned down the actual cause if you'veduplicated the exact package crack pattern.

Reliability Models for Failure Mechanisms

Failure Mechanism Reliability Modeling, orreliability modeling, oracceleration modeling, or simply

modeling, is the mathematical representation of a failure mechanism in terms of a set of algebraic ordifferential equations from the perspective of its reliability implications. The term failuremechanism refers to the actual physical phenomenon behind a failure occurrence. Modeling is a meansof determining and understanding the different variables or factors that bring out and accelerate a failuremechanism.

Being able to model a mechanism and quantify how it is affected by various environmental factors willallow a reliability engineer to develop appropriate reliability tests for estimating field failure rates andpredicting when failures will begin to occur. Modeling is often expressed in the form of time to failure,ortf, or the acceleration factor, AF.


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The Arrhenius Equation

Everything in this universe will decay or degrade with time, and the Second Law of Thermodynamics isthere to make sure of this. Destruction or degradation of matter is generally due to atomic or molecularchanges accelerated by external factors, one of which is temperature. The response dependence ofdegradation or failure mechanisms on temperature is given by the Arrhenius equation:

R = Ae

(-Ea/kT)

where R=reaction rate, A=constant, Ea=activation energy,k= Boltzmanns constant (8.6e-5 eV/K), T=absolute temperature

For any given reaction obeying the Arrhenius equation, R1t1=R2t2=constant, where R is the reactionrate and t is the elapsed reaction time. To illustrate this, consider a reaction process that occurs at a hightemperature T1 and low temperature T2. Since temperature increases the reaction rate, then R1 isfaster than R2, orR1 > R2 . However, the reaction process also takes a shorter duration at T1, or t1 VG) results in very high electric fields near the drain, which accelerate channelcarriers into the drain's depletion region. Studies have shown that the worst effects occur when VD =

2VG.The acceleration of the channel carriers causes them to collide with Si lattice atoms, creating dislodgedelectron-hole pairs in the process. This phenomenon is known asimp act ionization, with some of thedisplaced e-h pairs also gaining enough energy to overcome the electric potential barrier between thesilicon substrate and the gate oxide.

Under the influence of drain-to-gate field, hot carriers that surmount the substrate-gate oxide barrier getinjected into the gate oxide layer where they are sometimes trapped. This hot carrier injection processoccurs mainly in a narrow injection zone at the drain end of the device where the lateral field is at itsmaximum.

Hot carriers can be trapped at the Si-SiO2 interface (hence referred to as 'interface states') or within theoxide itself, forming a space charge (volume charge) that increases over time as more charges aretrapped. These trapped charges shift some of the characteristics of the device, such as its thresholdvoltage (Vth) and its conveyed conductance (gm).

Figure 1. DAHC injection involves impact ionization of carriers nearthe drain area; source: Hitachi Semiconductor Reliability Handbook

Injected carriers that do not get trapped in the gate oxide become gate current. On the other hand,majority of the holes from the e-h pairs generated by impact ionization flow back to the substrate,comprising a large portion of the substrate's drift current. Excessive substrate current may therefore bean indication of hot carrier degradation. In gross cases, abnormally high substrate current can upset thebalance of carrier flow and facilitate latch-up.

Channel hot electron (CHE) injection occurs when both the gate voltage and the drain voltage aresignificantly higher than the source voltage, with VGVD. Channel carriers that travel from the source to


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the drain are sometimes driven towards the gate oxide even before they reach the drain because of thehigh gate voltage.

Figure 2. CHE injection involves propelling of carriers in thechannel toward the oxide even before they reach the drain area; source: Hitachi Semiconductor Reliability Handbook

Substrate hot electron (SHE) injection occurs when the substrate back bias is very positive or verynegative, i.e., |VB|>> 0. Under this condition, carriers of one type in the substrate are driven by thesubstrate field toward the Si-SiO2 interface. As they move toward the substrate-oxide interface, they

further gain kinetic energy from the high field in surface depletion region. They eventually overcome thesurface energy barrier and get injected into the gate oxide, where some of them are trapped.

Figure 3. SHE injection involves trapping of carriers from thesubstrate; source: Hitachi Semiconductor Reliability Handbook

Secondary generated hot electron (SGHE) injection involves the generation of hot carriers from impactionization involving a secondary carrier that was likewise created by an earlier incident of impactionization. This occurs under conditions similar to DAHC, i.e., the applied voltage at the drain is highor VD>VG, which is the driving condition for impact ionization. The main difference, however, is theinfluence of the substrate's back bias in the hot carrier generation. This back bias results in a field thattends to drive the hot carriers generated by the secondary carriers toward the surface region, where theyfurther gain kinetic energy to overcome the surface energy barrier.

Figure 4. SGHE injection involves hot carriers generated by secondarycarriers; source: Hitachi Semiconductor Reliability Handbook

Hot carrier effects are brought about or aggravated by reductions in device dimensions withoutcorresponding reductions in operating voltages, resulting in higher electric fields internal to the device.


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Problems due to hot carrier injection therefore constitute a major obstacle towards higher circuitdensities. Recent studies have even shown that voltage reduction alone will not eliminate hot carriereffects, which were observed to manifest even at reduced drain voltages, e.g., 1.8 V.

Thus, optimum design of devices to minimize, if not prevent, hot carrier effects is the best solution for hotcarrier problems. Common design techniques for preventing hot carrier effects include: 1) increase inchannel lengths; 2) n+ / n-double diffusion of sources and drains; 3) use ofgraded drain junctions; 4)introduction of self-aligned n- regions between the channel and the n+ junctions to create an offset gate;and 5) use ofburied p+ channels.

Hot carrier phenomena are accelerated by low temperature, mainly because this condition reducescharge detrapping. A simple acceleration model for hot carrier effects is as follows:

AF = R2 / R1AF = e

([Ea/k] [1/T1-1/T2] + C [V2-V1])

where:AF = acceleration factor of the mechanism;R1 = rate at which the hot carrier effects occur under conditions V1 and T1;R2 = rate at which the hot carrier effects occur under conditions V2 and T2;

V1 and V2 = applied voltages for R1 and R2, respectively; T1 and T2 = applied temperatures (deg K) for R1 and R2, respectively; Ea = -0.2 eV to -0.06 eV; and C = a constant.

Junction Burn-out

Junction burn-out refers to the destruction of a p-n junction as a result of excessive power dissipationfrom anelectrical overstress(EOS) or electrostatic discharge (ESD) event. It is usually in the form of asilicon meltdown at the junction itself, causing the junction to become open or shorted.

Junction Spiking

See Contact Migration.

Metal Burn-out

Metal burn-out refers to the gross destruction of a metal line from excessive current or power dissipation.This is the most obvious attribute of grosselectrical overstress(EOS) damage, although not all EOS-damaged devices will exhibit a metal burn-out.

Metal burn-outs are often accompanied by carbonized plastic, metal reflow, anddiscoloration of the metal around it. Metal lines that become open after a metal burn-outare said to have 'fused.' The photo attached to the article onEOSshows metal burn-outs.On the right is another photo of a failure site with metal burn-outs.

Mobile Ionic Contamination

Mobile ionic contamination refers to the presence of mobile ions such as Na+, Cl-, and K+ in the devicestructures of an integrated circuit. These mobile ions can come from the environment, humans, waferprocessing materials, and packaging materials.

Mobile ionic contamination is commonly observed in the gate oxide of a MOS transistor. These ions canaccumulate and cause charge build-ups that can shift the gate threshold of the MOS transistor. Inversionchannels may also form in MOS transistors. In bipolar devices, mobile ions can affect carrierconcentrations, changing the beta of the transistor.
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Mobile ions respond to temperature and voltage, so failures due to mobile ionic contamination can beaccelerated by burn-in. Mobile ionic contamination failures can also be made to recover by subjecting thedevice to unbiased bake, since this will redistribute the ions by promoting their random movement. Thus,a device is most likely a mobile ionic contamination failure if it fails after burn-in but recovers afterunbiased bake.

Oxide Rupture

See Dielectric Breakdown.

Silicon Nodules

Silicon Nodules are silicon aggregates that come out of silicon-doped aluminum metal lines, causingthe device to fail in several ways. Here are some key points about silicon nodules:

1) The aluminum metal lines used in die circuits are doped with silicon atoms in a very controlledmanner to enhance their properties. A typical process involves sintering or alloying at 400-450 deg C,wherein the aluminum lines are doped with about 1-2% silicon.

2) During this alloying process, not all of the silicon dopants are dissolved in the aluminum metal lines.Instead of going into the solution, some Si atoms remain as silicon precipitates. Only about 0.4% silicondissolves in the aluminum solution.

3) As the metal is cooled down after the alloying process, more silicon atoms separate from and comeout of the aluminum solution.

4) The elemental silicon precipitates existing in the metal (as discussed in # 2) act as nucleation sitesfor silicon atoms that emerge from the solution during the cool-down phase. The silicon atoms thatnucleate eventually form larger aggregates of silicon that are known as silicon nodules.

5) Silicon nodules grow bigger with long exposure to elevated temperatures. Studies have shown thatsilicon nodules can attain diameters greater than 1 micron.

6) The growth of silicon nodules to large diameters exert stress on the metal lines. In fact, narrow metallines, i.e., those whose widths are less than 3 microns, can fracture and become open in the presence ofsilicon nodules with diameters greater than 1 micron. This phenomenon is often referred toas 'aluminum stress cracking.'

7) Aluminum stress cracking is aggravated by factors other than silicon nodules. Duringsputter-depositionof the aluminum, for instance, nitrogen may be trapped within the layer, producing additionalstrain on the aluminum. Differences among the coefficients of thermal expansion of silicon, silicondioxide, and aluminum also result in stresses within the die circuit that can aggravate aluminumcracking.

8) Aside from aluminum stress cracking, the formation of silicon nodules on bond pads also impede wire

bonding. As a result, excessive silicon nodule formation on bond pads has been confirmed to causeballbond liftingissues as well.

Slow Charge Trapping

Slow charge trapping refers to the long-term retention of electrons in the gate oxide of a MOS device dueto the presence of imperfections in the gate oxide interface. These imperfections or 'traps' includestructural damage, defects, and impurities in the oxide. Thus, improved oxide growth to minimize trapdensity will minimize the occurrence of slow trapping.
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Slow trapping is prevalent in memory devices that require carrier movement in the oxide for properoperation. Trapped charges in the oxide can shift the threshold voltage of the device.

Time-Dependent Dielectric Breakdown (TDDB)

Bond Lifting

Bond lifting refers to any of several phenomena in which a wire bond that connects the device to theoutside world becomes detached from its position, resulting in loss or degradation of electrical andmechanical connection between that bond and its bonding site.

In this context, a bond may be one that attaches to a bond pad of the die (also referred to as the firstbond) or one that attaches to a lead or post of the package (also referred to as the second bond). Firstbonds are usually in the form of gold ball bonds or aluminum wedge bonds, while second bonds areusually gold or aluminum crescent bonds (also known as 'fishtail' bonds).

Ball bond lifting, or simply ball lifting, is the detachment of a ball bond from the bond pad of a

semiconductor device. It can be due to a variety of factors. Poor wire bond equipment set-up and bondpad surface contamination are primary causes of ball lifting. Poor set-up includes improper wirebondparameter settings, unstable workpiece holders, and worn-out wirebonding tools. These result in poorinitial welding and inadequate intermetallic formation between the bond pad and the ball.

Ball lifting can also be due to contaminants on the bond pad, which act as barriers between the ball andthe bond pad. Common contaminants that inhibit good bonding include unetched glass, unremovedphotoresist, and Si saw dust. Resin bleed-out from the die attach material can also impede goodbonding and result in ball lifting. Halides such as Cl on the bond pad can trigger corrosion, which is againanother source of ball lifting.

A disturbed or uneven bond pad surface also inhibits bonding. Excessive probe digging results inaluminum heaps and an exposed substrate or barrier metal area, which prevent good intermetallic

formation.Silicon noduleson the surface of bond pads can also result in poor ball bonding.

Fig 1. Photo of alifted ball bond

Fig 2. Photos of bond pads w/contamination that prevented goodintermetallics and led to ball lifting

Lifted balls may also result from excessive interdiffusion between the bond pad and ball bond metals.Kirkendall voiding, which is the formation of voids underneath the ball bond due to excessive diffusion of

Al from the bond pad to the Au ball bond to form purple plague, is an example of this mechanism. Thereflow of thermoplastic die attach material at the bonding temperature also results in ball lifting, becauseit allows movement of the die during the thermosonic bonding itself.

Cratering, which is considered to be a different failure mechanism, can also manifest as a lifted ball, withthe Si underneath the bond pad coming off with the bond. Excessive probing and overbonding arecommon causes of cratering. Similarly, bond pad peel-off, or the mechanism wherein the bond padmetal peels off from the barrier metal or substrate, can result in ball lifting.
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Fig 3. Photo of abond pad crater

Fig 4. Photo of a bond padmetal peel-off that led to balllifting

Wedge lifting is the detachment of a wedge bond from the bond pad or bonding post, or the crescentbond from the leadframe bonding finger. Like ball lifting, it can be due to a variety of factors, primarilypoor wirebonder set-up and bond pad surface contamination. Poor set-up includes improper parametersettings, unstable workpiece holders, and worn-out tools. These result in poor bonding between thebond pad, post, or finger and the wedge.

Wedge lifting can also be due to contaminants on the bond pad, post, or bonding finger. Contaminantsact as barriers between the wedge and the bonding area. Common contaminants that inhibit goodbonding include unetched glass, unremoved photoresist, and Si saw dust. Halides such as Cl on thebond pad can also trigger corrosion, which is another cause of wedge lifting. Silicon nodules on the

surface of bond pads with no barrier metallization underneath can also result in poor ball bonding.

Sub-bond pad cratering, which is considered to be a different failure mechanism, can also manifest as alifted wedge, with the Si underneath the bond pad coming off with the bond. Similarly, bond pad peel-offfrom the barrier metal can result in wedge lifting. Wedge lifting due to metallization peeloff from thebonding post and fingers are likewise possible. Studies have also shown that excessive probingdamage on the bond pad can cause wedge lifting.

Failure Analysis and Principles Involved

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