ENSC 495/851 Lab Electrical and Device …glennc/e495/e495la2n-testing.pdfFigure 12: NPN Bipolar, N...
Transcript of ENSC 495/851 Lab Electrical and Device …glennc/e495/e495la2n-testing.pdfFigure 12: NPN Bipolar, N...
ENSC 495/851 Lab Electrical and Device Measurements V1.0 Mar. 25 2015 Glenn Chapman
Testing the devices is done after level 4 has been completed and wafers ENSC 495 students will do at least parts 1 to 5 on one chip. Graduates with a minor project the full set of tests on many positions. For the curve tracer use a digital camera to take the curve traces for the characteristics. Download the Tektronix 576 manuals to consult on using the curve tracer. Basic Chip Layout The ENSC 495/851 test chip layout (Figure 1) is a 5mm x 6mm (W x H). There will be more than 200 copies of this test chip on each wafer. The smallest feature size of these devices is 20 microns. Most lines are 40 microns wide. Figure 2 shows the labelled structures for the chip. Start with chips near the wafer centre.
Figure 1: 5x6 mm ENSC 495/851 chip
Alig
P c
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Layer #
495/851 test
step coverag
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ge
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N MOS
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ell
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Prober (Micromanipluators) The probes or micromanipulators (see Fig 2) consist of 3 axis controllers for X, Y and Z (up down) control (see Fig 2) at one end. Note the direction of motion is set by the arrows on the prober and may be different for different probes. The probe needle (Fig. 3) at the end is what makes contact and is roughly 5 um in size in this case. The probers can position within a micron if used right.
Figure 2: Micromanipulator probe
Figure 3: Probe needle in the prober
PBthsetr
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1) SubstrateTest the Alumecond on thene in the IV
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Figure 5
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Figure 4: Con
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Then check feverse breakracer number
heet Resista0-micron Vaet resistance for the volta
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Figure 6: V
ode bstrate contameasure the screen to recno leakage reverse voltaoltage (Fig. for reverse lkdown voltars and do no
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gh curve trac> -5V, grea
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probe contake a photogck for diodemeasurementreverse leakades or bottom.5 V. Final
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acts and the graph of the curve, and ts at a few age current, m of wafer. lly measure g the curve
F (4Uanvohoso
igure 7: IV d
4) Solar CelUse a curve tnd the Solaoltage. Repow much theolar cell (Fig
diode curve
ll tracer measur cell contaeat with mice diode movg. 10, 11). M
ure the solar act pad for tcroscope lighves into negaMeasure the o
cell first as the measureht turned on ative currentopen circuit
Figure 9:
Figur
a diode (in ement. Mea
at different t. The squarvoltage and
Solar Cell c
e 8: Reverse
the dark). Uasure reverslevels (cont
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e Breakdown
Use the substse leakage ctrol knob seta below showit current.
n
tract contactcurrent and ttings 1, 2 anws the effici
t (Figure 9) breakdown
nd 3). Note iency of the
Figure 10: Solar cell diode Figure 11: Solar cell with light on. (5) NPN Transistor Test Test the dual-base-contact NPN transistor using the curve tracer. Use the substrate transistor contact as the collector (See Figure 12 for the Collector, Base and Emitter contacts). Measure the transistor characteristics (in the dark). Measure the Base Collector, Base Emitter and Collector Emitter IV characteristics (Fig 13-15). Watch for breakdown of CE curve (it may be bidirectional diode). The put curve tracer in NPN transistor mode and take full characteristics (Fig. 16) What do the transistor action characteristic curves look like (note the base current, collector current etc)? Calculate the transistor beta (current gain) at collector currents around 100µA and 3mA.
Figure 12: NPN Bipolar, N Mosfet and P Mosfet pads